Analogic AAT1162 12v, 1.5a step-down dc/dc converter Datasheet

PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
General Description
Features
The AAT1162 is an 800kHz high efficiency step-down
DC/DC converter. With a wide input voltage range of
4.0V to 13.2V, the AAT1162 is an ideal choice for dualcell Lithium-ion battery-powered devices and mid-power-range regulated 12V-powered industrial applications.
The internal power switches are capable of delivering up
to 1.5A to the load.
• Input Voltage Range: 4.0V to 13.2V
• Up to 1.5A Load Current
• Fixed or Adjustable Output:
▪ Output Voltage: 0.6V to VIN
• Low 115μA No-Load Operating Current
• Less than 1μA Shutdown Current
• Up to 96% Efficiency
• Integrated Power Switches
• 800kHz Switching Frequency
• Soft Start Function
• Short-Circuit and Over-Temperature Protection
• Minimum External Components
• TDFN34-16 Package
• Temperature Range: -40°C to +85°C
The AAT1162 is a highly integrated device, simplifying
system-level design. Minimum external components are
required for the converter.
The AAT1162 optimizes efficiency throughout the entire
load range. It operates in a combination PWM/Light Load
mode for improved light-load efficiency. The high switching frequency allows the use of small external components. The low current shutdown feature disconnects the
load from VIN and drops shutdown current to less than
1μA.
The AAT1162 is available in a Pb-free, space-saving,
thermally-enhanced 16-pin TDFN34 packageand is rated
over an operating temperature range of -40°C to +85°C.
Applications
•
•
•
•
•
•
•
Distributed Power Systems
Industrial Applications
Laptop Computers
Portable DVD Players
Portable Media Players
Set-Top Boxes
TFT LCD Monitors and HDTVs
Typical Application
L1
Input:
4.0V ~ 13.2V
IN
C6
10μF
R4
10
C2
0.1μF
LX
2.2 to 4.7μH
EN
DGND
AIN
AAT1162
FB
C8
1μF
C3
22μF
R5
24k
C7
330pF
1162.2008.01.1.3
Output:
0.6V min,
1.5A max
COMP
PGND
LDO
AGND
C9
1μF
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1
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Pin Descriptions
Pin #
Symbol
1, 2, EP2
LX
3, 12
N/C
4, 5
IN
6, 13,
14, EP1
DGND
7
AIN
8
LDO
9
FB
10
11
COMP
AGND
15
EN
16
PGND
Function
Power switching node. LX is the drain of the internal P-channel switch and N-channel synchronous rectifier. Connect the output inductor to the two LX pins and to EP2. A large exposed copper pad under the
package should be used for EP2.
Not connected.
Power source input. Connect IN to the input power source. Bypass IN to DGND with a 22μF or greater
capacitor. Connect both IN pins together as close to the IC as possible. An additional 100nF ceramic
capacitor should also be connected between the two IN pins and DGND, pin 6
Exposed Pad 1 Digital Ground, DGND. The exposed thermal pad (EP1) should be connected to board
ground plane and pins 6, 13, and 14. The ground plane should include a large exposed copper pad under
the package for thermal dissipation (see package outline).
Internal analog bias input. AIN supplies internal power to the AAT1162. Connect AIN to the input source
voltage and bypass to AGND with a 0.1μF or greater capacitor. For additional noise rejection, connect to
the input power source through a 10Ω or lower value resistor.
Internal LDO bypass node. The output voltage of the internal LDO is bypassed at LDO. The internal
circuitry of the AAT1162 is powered from LDO. Do not draw external power from LDO. Bypass LDO to
AGND with a 1μF or greater capacitor.
Output voltage feedback input. FB senses the output voltage for regulation control. For fixed output
versions, connect FB to the output voltage. For adjustable versions, drive FB from the output voltage
through a resistive voltage divider. The FB regulation threshold is 0.6V.
Control compensation node. Connect a series RC network from COMP to AGND, R = 51k and C = 150pF.
Analog signal ground. Connect AGND to PGND at a single point as close to the IC as possible.
Active high enable input. Drive EN high to turn on the AAT1162; drive it low to turn it off. For automatic
startup, connect EN to IN through a 4.7kΩ resistor. EN must be biased high, biased low, or driven to a
logic level by an external source. Do not let the EN pin float when the device is powered.
Power ground. Connect AGND to PGND at a single point as close to the IC as possible.
Pin Configuration
TDFN34-16
(Top View)
2
16
PGND
15
EN
N/C
3
14
DGND
IN
4
13
DGND
IN
5
12
N/C
DGND
6
11
AGND
AIN
7
10
COMP
LDO
8
9
LX
1
LX
2
EP2
EP1
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FB
1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Absolute Maximum Ratings1
Symbol
VIN, VAIN
VLX
VFB
VEN
TJ
Description
Input Voltage
LX to GND Voltage
FB to GND Voltage
EN to GND Voltage
Operating Junction Temperature Range
Value
Units
-0.3 to 14
-0.3 to VIN + 0.3
-0.3 to VIN + 0.3
-0.3 to VIN + 0.3
-40 to 150
V
V
V
V
°C
Value
Units
2.7
37
W
°C/W
Thermal Information3
Symbol
PD
θJA
Description
Maximum Power Dissipation4
Thermal Resistance
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions
specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Based on long-term current density limitation.
3. Mounted on an FR4 board.
4. Derate 2.7mW/°C above 25°C.
1162.2008.01.1.3
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3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Electrical Characteristics1
4.0V < VIN < 13.2V. CIN = COUT = 22μF; L = 2.2 or 3.8μH, TA = -40°C to +85°C, unless otherwise noted. Typical values
are at TA = 25°C.
Symbol
VIN
Description
Input Voltage Range
VUVLO
Input Under-Voltage Lockout
IQ
ISHDN
Supply Current
Shutdown Current
VOUT
Output Voltage Range
VOUT
ΔVOUT/
VOUT/ΔVIN
ΔVOUT/
IOUT
VFB
IFBLEAK
FOSC
VIN = 4.5V to 13.2V
Load Regulation
VIN = 12V, VOUT = 5V, IOUT = 0A to 1.5A
Feedback Reference Voltage (adjustable version)
No Load, TA = 25°C
Adjustable Version
VOUT = 1.2V
Fixed Version
FB Leakage Current
P-Channel On Resistance
RDS(ON)L
N-Channel On Resistance
ILXLEAK
TSD
THYS
VIL
VIH
IEN
0.3
150
0.6
Line Regulation
RDS(ON)H
Typ
4.0
IOUT = 0A to 1.5A
DC
TON
TS
Min
Rising
Hysteresis
No Load
VEN = GND
Output Voltage Accuracy
PWM Oscillator Frequency
Foldback Frequency
Maximum Duty Cycle
Minimum Turn-On Time
Soft-Start Time
η
ILIM
Conditions
-2.5
0.023
Max
Units
13.2
4.0
V
300
1
0.94
VIN
2.5
μA
μA
0.100
%/V
0.4
0.59
0.60
0.6
2
0.8
200
Efficiency
PMOS Current Limit
LX Leakage Current
Over-Temperature Shutdown Threshold
Over-Temperature Shutdown Hysteresis
EN Logic Low Input Threshold
EN Logic High Input Threshold
EN Input Current
=
=
=
=
=
12V
6V
12V
6V
12V, VOUT = 5V, IOUT = 1.5A
4.0
0.61
0.2
1
100
200
0.12
0.15
0.06
0.08
90
6.0
VIN = 13.2V, VLX = 0 to VIN
V
μA
MHz
kHz
%
ns
ms
Ω
1
0.4
VEN = 0V, VEN = 13.2V
%
Ω
140
25
1.4
-1.0
V
%
94
VIN
VIN
VIN
VIN
VIN
V
1.0
%
A
μA
°C
°C
V
V
μA
1. The AAT1162 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured by design, characterization, and correlation with statistical process controls.
4
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1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Typical Characteristics
Test circuit of Figure 2, unless otherwise specified.
Load Regulation
(VOUT = 5V)
(VOUT = 5V)
100
90
Efficiency (%)
80
70
60
50
VIN = 6V
VIN = 8.4V
VIN = 10V
VIN = 12V
VIN = 13.2V
40
30
20
10
0
0.0001
0.001
0.01
0.1
1
10
Output Voltage Difference (%)
Efficiency vs. Output Current
0.5
VIN = 6V
VIN = 8.4V
VIN = 10V
VIN = 12V
VIN = 13.2V
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
0.0001
0.001
0.01
Output Current (A)
Efficiency vs. Output Current
Load Regulation
(VOUT = 3.3V)
(VOUT = 3.3V)
0.6
Output Voltage Error (%)
90
Efficiency (%)
1
80
70
60
50
VIN = 5V
VIN = 8.4V
VIN = 10V
VIN = 12V
VIN = 13.2V
40
30
20
10
0
0.0001
0.001
0.01
0.1
1
VIN = 5V
VIN = 8.4V
VIN = 10V
VIN = 12V
VIN = 13.2V
0.4
0.2
0.0
-0.2
-0.4
-0.6
1
10
10
100
Output Current (A)
0.3
0.2
0.1
0
-0.1
1.5A
1mA
10mA
100mA
-0.2
-0.3
-0.4
9
10
11
12
Output Voltage Difference (%)
(VOUT = 3.3V)
0.4
8
0.05
1.5A
1mA
10mA
100mA
0.04
0.03
0.02
0.01
0
-0.01
-0.02
-0.03
-0.04
Input Voltage (V)
1162.2008.01.1.3
10000
Line Regulation
(VOUT = 5V)
7
1000
Output Current (A)
Line Regulation
6
10
Output Current (A)
100
Output Voltage Difference (%)
0.1
5
6
7
8
9
10
11
12
Input Voltage (V)
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5
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Typical Characteristics
Supply Current vs. Input Voltage
Switching Current vs. Temperature
(VOUT = 5V)
(VOUT = 5V)
170
170
160
160
150
140
130
85°C
25°C
-40°C
120
110
6
7
8
9
10
11
On Time (ns)
Quiescent Current (µA)
Test circuit of Figure 2, unless otherwise specified.
150
140
130
VIN = 12V
VIN = 6V
120
110
12
-40
-15
10
Input Voltage (V)
35
60
85
Temperature (°C)
N-Channel RDS(ON) vs. Temperature
P-Channel RDS(ON) vs. Temperature
(VIN = 6V)
200
180
100
Resistance (mΩ
Ω)
Resistance (mΩ
Ω)
120
80
60
40
VIN = 12V
VIN = 6V
20
160
140
120
100
80
60
40
VIN = 6V
VIN = 12V
20
0
0
-40
-15
10
35
60
85
-40
-15
10
85
Start-up Time
(VOUT = 5.0V; CFF = 100pF; RLOAD = 1.5A;
CIN = 10µF; COUT = 22µF; L = 3.8µH)
Enable Voltage (top) (V)
810
805
800
795
790
785
780
VIN = 6V
VIN = 12V
775
-15
10
35
60
6
5
6
5
VEN
4
4
VOUT
3
2
1
3
2
I LOAD
1
0
0
Input Current (bottom) (A)
Switching Frequency (Hz)
Switching Frequency vs. Temperature
85
Time (500µs/div)
Temperature (°C)
6
60
Temperature (°C)
Temperature (°C)
770
-40
35
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1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Typical Characteristics
Line Transient
Load Transient
(VOUT = 5.0V; CFF = 100pF; VIN = 7.6V to 11V;
IOUT = 1.5A; CIN = 10µF; COUT = 22µF; L = 3.8µH)
(VOUT = 3.3V; CFF = 100pF; COUT = 66µF)
11
5.25
10
5.20
9
5.15
8
5.10
7
5.05
6
5.00
5
4.95
4
4.90
3.6
Output Voltage (top) (V)
5.30
3.4
3.2
3
1.5A
2.8
10mA
2.6
2.4
2.2
2
Time (100µs/div)
Load Transient
Load Transient
(VOUT = 5V; CFF = 100pF; COUT = 66µF)
3
1.5A
2.8
2.6
10mA
2.4
2.2
2
Output Voltage (top) (V)
3.2
5.4
5.1
4.8
4.5
1.5A
4.2
3.9
10mA
3.6
3.3
3
Time (50µs/div)
Time (50µs/div)
Load Transient
VOUT vs. Temperature
(VOUT = 5V; COUT = 66µF; No CFF)
4.8
4.5
1.5A
4.2
3.9
10mA
3.6
3.3
3
Output Voltage Difference (%)
5.1
(VOUT = 3.3V; ILOAD = 1.5A)
Load and Inductor Current
(bottom) (1A/div)
5.4
1
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
Time (50µs/div)
1162.2008.01.1.3
Load and Inductor Current
(bottom) (1A/div)
3.4
Load and Inductor Current
(bottom) (1A/div)
Output Voltage (top) (V)
Time (50µs/div)
(VOUT = 3.3V; COUT = 66µF; No CFF)
3.6
Output Voltage (top) (V)
Load and Inductor Current
(bottom) (1A/div)
12
Output Voltage (bottom) (V)
Input Voltage (top) (V)
Test circuit of Figure 2, unless otherwise specified.
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80
90
Temperature (°C)
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7
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Typical Characteristics
Test circuit of Figure 2, unless otherwise specified.
Load Transient
Load Transient
(VOUT = 3.3V; CFF = 100pF; COUT = 22µF)
(VOUT = 3.3V; COUT = 22µF; No CFF)
3
1.5A
2.7
2.4
10mA
2.1
1.8
1.5
Output Voltage (top) (V)
Output Voltage (top) (V)
3.3
3.7
3.3
2.9
2.5
1.7
0.9
0.5
Time (50µs/div)
Load Transient
Load Transient
(VOUT = 5V; COUT = 22µF; No CFF)
4.5
1.5A
4.2
10mA
3.6
3.3
3
Output Voltage (top) (V)
4.8
5.4
5.1
4.8
1.5A
4.5
4.2
10mA
3.9
3.6
3.3
3
Time (50µs/div)
Load and Inductor Current
(bottom) (1A/div)
5.1
Load and Inductor Current
(bottom) (1A/div)
Output Voltage (top) (V)
10mA
1.3
(VOUT = 5V; CFF = 100pF; COUT = 22µF)
5.4
8
1.5A
2.1
Time (50µs/div)
3.9
Load and Inductor Current
(bottom) (1A/div)
3.6
Load and Inductor Current
(bottom) (1A/div)
3.9
Time (50µs/div)
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1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Functional Block Diagram
LDO
AIN
IN
Note 1
FB
LDO
Current
Sense Amp
+
+
+
Error
Amp
Current
Mode
Comparator
-
Control
Logic
Reference
LX
PGND
AGND
EN
DGND
COMP
. to the
Note 1: For fixed output voltage versions, FB is connected
error amplifier through the resistive voltage divider shown.
Functional Description
The AAT1162 is a current-mode step-down DC/DC converter that operates over a wide 4V to 13.2V input voltage range and is capable of supplying up to 1.5A to the
load with the output voltage regulated as low as 0.6V.
Both the P-channel power switch and N-channel synchronous rectifier are internal, reducing the number of
external components required. The output voltage is
adjusted by an external resistor divider; fixed output
voltage versions are available upon request. The regulation system is externally compensated, allowing the circuit to be optimized for each application. The AAT1162
includes cycle-by-cycle current limiting, frequency fold-
1162.2008.01.1.3
back for improved short-circuit performance, and thermal overload protection to prevent damage in the event
of an external fault condition.
Control Loop
The AAT1162 regulates the output voltage using constant frequency current mode control. The AAT1162
monitors current through the high-side P-channel
MOSFET and uses that signal to regulate the output voltage. This provides improved transient response and
eases compensation. Internal slope compensation is
included to ensure the current “inside loop” stability.
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PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
High efficiency is maintained under light load conditions
by automatically switching to variable frequency Light
Load control. In this condition, transition losses are
reduced by operating at a lower frequency at light
loads.
Short-Circuit Protection
The AAT1162 uses a cycle-by-cycle current limit to protect itself and the load from an external fault condition.
When the inductor current reaches the internally set
3.0A current limit, the P-channel MOSFET switch turns
off and the N-channel synchronous rectifier is turned on,
limiting the inductor and the load current.
During an overload condition, when the output voltage
drops below 50% of the regulation voltage (0.3V at FB),
the AAT1162 switching frequency drops by a factor of 4.
This gives the inductor current ample time to reset during the off time to prevent the inductor current from
rising uncontrolled in a short-circuit condition.
Applications Information
Setting the Output Voltage
Figure 1 shows the basic application circuit for the
AAT1162 and output setting resistors. Resistors R1 and
R2 program the output to regulate at a voltage higher
than 0.6V. To limit the bias current required for the
external feedback resistor string while maintaining good
noise immunity, the minimum suggested value for R2 is
5.9kΩ. Although a larger value will further reduce quiescent current, it will also increase the impedance of the
feedback node, making it more sensitive to external
noise and interference. Table 1 summarizes the resistor
values for various output voltages with R2 set to either
5.9kΩ for good noise immunity or 59kΩ for reduced no
load input current.
EP2
VIN 4.5V- 13.2V
C6
10μF
Thermal Protection
The AAT1162 includes thermal protection that disables
the regulator when the die temperature reaches 140ºC.
It automatically restarts when the temperature decreases by 25ºC or more.
R4
10Ω
C8
1μ F
C2
0.1μ F
3
EN
4
IN
5
IN
7
AIN
6 DGND
13
DGND
16
PGND
LX
LX
LX
AAT1162
FB
1
2
9
COMP 10
AGND 11
DGND
DGND
EP1
LDO
14
L1
3.8μH
C1
100pF
VOUT
5V, 1.5A
R3
432kΩ
R5
24kΩ
C3
22μF
R6
59kΩ
8
C9
1μ F
C7
330pF
Figure 1: Typical Application Circuit.
The adjustable feedback resistors, combined with an
external feed forward capacitor (C1 in Figure 1), deliver
enhanced transient response for extreme pulsed load
applications. The addition of the feed forward capacitor
typically requires a larger output capacitor C3 for stability. Larger C1 values reduce overshoot and undershoot
during startup and load changes. However, do not
exceed 470pF to maintain stable operation.
10
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1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
The external resistors set the output voltage according
to the following equation:
⎛
R1 ⎞
VOUT = 0.6V 1 +
⎝
R2 ⎠
or
⎛ VOUT ⎞
R1 = V
-1 · R2
⎝ REF ⎠
Table 1 shows the resistor selection for different output
voltage settings.
VOUT (V)
R2 = 5.9(kΩ)
R1 (kΩ)
R2 = 59(kΩ)
R1 (kΩ)
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.8
1.85
2.0
2.5
3.3
5.0
1.96
2.94
3.92
4.99
5.90
6.81
7.87
8.87
11.8
12.4
13.7
18.7
26.7
43.2
19.6
29.4
39.2
49.9
59.0
68.1
78.7
88.7
118
124
137
187
267
432
Table 1: Resistor Selection for Different Output
Voltage Settings. Standard 1% Resistors are
Substituted for Calculated Values.
Inductor Selection
For most designs, the AAT1162 operates with inductors
of 2μH to 4.7μH. Low inductance values are physically
smaller, but require faster switching, which results in
some efficiency loss. The inductor value can be derived
from the following equation:
L1 =
1162.2008.01.1.3
VOUT
· 3.8µH
3.3
Where ∆IL is inductor ripple current. Large value inductors lower ripple current and small value inductors result
in high ripple currents. Choose inductor ripple current
approximately 32% of the maximum load current 1.5A,
or ∆IL = 480mA. For output voltages above 3.3V, the
minimum recommended inductor is 3.8μH. For 3.3V and
below, use a 2 to 3.8μH inductor. For optimum voltagepositioning load transients, choose an inductor with DC
series resistance in the 15mΩ to 20mΩ range. For
higher efficiency at heavy loads (above 1A), or minimal
load regulation (but some transient overshoot), the
resistance should be kept below 18mΩ. The DC current
rating of the inductor should be at least equal to the
maximum load current plus half the ripple current to
prevent core saturation (1.5A + 280mA). Table 2 lists
some typical surface mount inductors that meet target
applications for the AAT1162.
Manufacturer’s specifications list both the inductor DC
current rating, which is a thermal limitation, and the
peak current rating, which is determined by the saturation characteristics. The inductor should not show any
appreciable saturation under normal load conditions.
Some inductors may meet the peak and average current
ratings yet result in excessive losses due to a high DCR.
Always consider the losses associated with the DCR and
its effect on the total converter efficiency when selecting
an inductor. For example, the 4.7μH WE-TPC series
inductor selected from Wurth has an 38mΩ DCR and a
2.4ADC current rating. At full load, the inductor DC loss
is 85mW which gives only a 1.1% loss in efficiency for a
1.5A, 5V output.
Input Capacitor Selection
The input capacitor reduces the surge current drawn
from the input and switching noise from the device. The
input capacitor impedance at the switching frequency
shall be less than the input source impedance to prevent
high frequency switching current passing to the input. A
low ESR input capacitor sized for maximum RMS current
must be used. Ceramic capacitors with X5R or X7R
dielectrics are highly recommended because of their low
ESR and small temperature coefficients. A 10μF ceramic
capacitor is sufficient for most applications.
www.analogictech.com
11
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Manufacturer
Part Number
L (μH)
Max DCR
(mΩ)
Rated DC
Current (A)
Size WxLxH
(mm)
Sumida
Sumida
Coilcraft
Cooper Bussman
Wurth
CDRH103RNP-2R2N
CDR7D43MNNP-3R7NC
MSS1038-382NL
DR73-4R7-R
7440530047
2.2
3.7
3.8
4.7
4.7
16.9
18.9
13
29.7
38
5.10
4.3
4.25
3.09
2.40
10.3x10.5x3.1
7.6x7.6x4.5
10.2x7.7x3.8
6.0x7.6x3.55
5.8x5.8x2.8
Table 2: Typical Surface Mount Inductors.
To estimate the required input capacitor size, determine
the acceptable input ripple level (VPP) and solve for C.
The calculated value varies with input voltage and is a
maximum when VIN is double the output voltage.
CIN =
V ⎞
VO ⎛
· 1- O
VIN ⎝
VIN ⎠
⎛ VPP
⎞
- ESR · FOSC
⎝ IO
⎠
VO ⎛
V ⎞
1
· 1 - O = for VIN = 2 · VO
VIN ⎝
VIN ⎠
4
CIN(MIN) =
1
⎛ VPP
⎞
- ESR · 4 · FOSC
⎝ IO
⎠
Always examine the ceramic capacitor DC voltage coefficient characteristics when selecting the proper value.
For example, the capacitance of a 10μF, 16V, X5R ceramic capacitor with 12V DC applied is actually about
8.5μF.
The maximum input capacitor RMS current is:
IRMS = IO ·
VO ⎛
V ⎞
· 1- O
VIN ⎝
VIN ⎠
The input capacitor RMS ripple current varies with the
input and output voltage and will always be less than or
equal to half of the total DC load current:
VO ⎛
V ⎞
· 1- O =
VIN ⎝
VIN ⎠
for VIN = 2 · VO
12
D · (1 - D) =
0.52 =
1
2
IRMS(MAX) =
VO
IO
2
⎛
V ⎞
· 1- O
The term V ⎝ V ⎠ appears in both the input voltage
ripple and input capacitor RMS current equations and is
at maximum when VO is twice VIN. This is why the input
voltage ripple and the input capacitor RMS current ripple
are a maximum at 50% duty cycle. The input capacitor
provides a low impedance loop for the edges of pulsed
current drawn by the AAT1162. Low ESR/ESL X7R and
X5R ceramic capacitors are ideal for this function. To
minimize stray inductance, the capacitor should be
placed as closely as possible to the IC. This keeps the
high frequency content of the input current localized,
minimizing EMI and input voltage ripple. The proper
placement of the input capacitor (C6) can be seen in the
evaluation board layout in Figure 3. Additional noise filtering for proper operation is accomplished by adding a
small 0.1μF capacitor on the IN pins (C2).
IN
IN
A laboratory test set-up typically consists of two long
wires running from the bench power supply to the evaluation board input voltage pins. The inductance of these
wires, along with the low-ESR ceramic input capacitor,
can create a high Q network that may affect converter
performance. This problem often becomes apparent in
the form of excessive ringing in the output voltage during load transients. Errors in the loop phase and gain
measurements can also result. Since the inductance of a
short PCB trace feeding the input voltage is significantly
lower than the power leads from the bench power supply, most applications do not exhibit this problem. In
applications where the input power source lead inductance cannot be reduced to a level that does not affect
the converter performance, a high ESR tantalum or aluminum electrolytic should be placed in parallel with the
low ESR, ESL bypass ceramic. This dampens the high Q
network and stabilizes the system.
www.analogictech.com
1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Output Capacitor Selection
The output capacitor is required to keep the output voltage ripple small and to ensure regulation loop stability.
The output capacitor must have low impedance at the
switching frequency. Ceramic capacitors with X5R or
X7R dielectrics are recommended due to their low ESR
and high ripple current. The output ripple VOUT is determined by:
ΔVOUT ≤
⎞
VOUT · (VIN - VOUT) ⎛
1
· ESR +
⎝
VIN · FOSC · L
8 · FOSC · COUT⎠
The output capacitor limits the output ripple and provides holdup during large load transitions. A 10μF to
47μF X5R or X7R ceramic capacitor typically provides
sufficient bulk capacitance to stabilize the output during
large load transitions and has the ESR and ESL characteristics necessary for low output ripple. The output voltage droop due to a load transient is dominated by the
capacitance of the ceramic output capacitor. During a
step increase in load current, the ceramic output capacitor alone supplies the load current until the loop
responds. Within two or three switching cycles, the loop
responds and the inductor current increases to match
the load current demand. The relationship of the output
voltage droop during the three switching cycles to the
output capacitance can be estimated by:
COUT =
IRMS(MAX) =
1
VOUT · (VIN(MAX) - VOUT)
L · FOSC · VIN(MAX)
2· 3
·
Dissipation due to the RMS current in the ceramic output
capacitor ESR is typically minimal, resulting in less than
a few degrees rise in hot-spot temperature.
Compensation
The AAT1162 step-down converter uses peak current
mode control with slope compensation scheme to maintain stability with lower value inductors for duty cycles
greater than 50%. The regulation feedback loop in the
IC is stabilized by the components connected to the
COMP pin, as shown in Figure 1.
To optimize the compensation components, the following
equations can be used. The compensation resistor RCOMP
(R5) is calculated using the following equation:
RCOMP (R5)=
2πVOUT · COUT · FOSC
10GEA · GCOMP · VFB
Where VFB = 0.6V, GCOMP = 40.1734 and GEA = 9.091 ·
10-5.
FOSC is the switching frequency and COUT is based on the
output capacitor calculation. The CCOMP value can be
determined from the following equation:
3 · ΔILOAD
VDROOP · FOSC
Once the average inductor current increases to the DC
load level, the output voltage recovers. The above equation establishes a limit on the minimum value for the
output capacitor with respect to load transients. The
internal voltage loop compensation also limits the minimum output capacitor value to 22μF. This is due to its
effect on the loop crossover frequency (bandwidth),
phase margin, and gain margin. Increased output capacitance will reduce the crossover frequency with greater
phase margin.
1162.2008.01.1.3
The maximum output capacitor RMS ripple current is
given by:
CCOMP (C7) =
4
2πRCOMP (R5) ·
⎛ FOSC⎞
⎝ 10 ⎠
The feed forward capacitor CFF (C1) provides faster
transient response for pulsed load applications. The
addition of the feed forward capacitor typically requires
a larger output capacitor C1 for stability. Larger C1 values reduce overshoot and undershoot during startup
and line/load changes. The CFF value can be from 100pF
to 470pF, but do not exceed 470pF to maintain stable
operation.
www.analogictech.com
13
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Layout Guidance
4.
Figure 2 is the schematic for the evaluation board. When
laying out the PC board, the following layout guideline
should be followed to ensure proper operation of the
AAT1162:
5.
1.
2.
3.
14
Exposed pad EP1 must be reliably soldered to PGND/
DGND/AGND. The exposed thermal pad should be
connected to board ground plane and pins 6, 11, 13,
14 and 16. The ground plane should include a large
exposed copper pad under the package for thermal
dissipation.
The power traces, including GND traces, the LX
traces and the VIN trace should be kept short, direct
and wide to allow large current flow. The L1 connection to the LX pins should be as short as possible.
Use several via pads when routing between layers.
Exposed pad pin EP2 must be reliably soldered to the
LX pins 1 and 2. The exposed thermal pad should be
connected to the board LX connection and the inductor L1 and also pins 1 and 2. The LX plane should
include a large exposed copper pad under the package for thermal dissipation.
6.
7.
8.
The input capacitors (C9 and C1) should be connected as close as possible to IN (Pins 4 and 5) and
DGND (Pin 6) to get good power filtering.
Keep the switching node LX away from the sensitive
FB node.
The feedback trace for the FB pin should be separate
from any power trace and connected as closely as
possible to the load point. Sensing along a highcurrent load trace will degrade DC load regulation.
The feedback resistors should be placed as close as
possible to the FB pin (Pin 9) to minimize the length
of the high impedance feedback trace.
The output capacitors C3, 4, and 5 and L1 should be
connected as close as possible and there should not
be any signal lines under the inductor.
The resistance of the trace from the load return to
the PGND (Pin 16) should be kept to a minimum.
This will help to minimize any error in DC regulation
due to differences in the potential of the internal
signal ground and the power ground.
www.analogictech.com
1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
JP1
Enable
TP1
GND
TP14
GND
R1
R2
4.75K
4.75K
TP2
TP3
VIN
TP7
VIN
R4
10Ω
VIN
TB1
7
AIN
6 DGND
13 DGND
16
PGND
AGND
N/C
DGND
LDO
EP1
TP9
C8
1μF
EN
LX
IN
AAT1162 LX
IN
FB
N/C
COMP
GND
VIN
C6
10μF
C2
0.1μF
15
4
5
3
LX
LX
TP5
U1
EP2
Enable
*
VOUT
L1
1
2
9
10
3.8μH
C1
100pF
11
12
R5
24K
VOUT
TP6
R3
432K
R6
59K
14
8
TP4
C3
22μF
C4
NP
C5
NP
C7
330pF
VOUT
TB2
VOUT
TP8
C9
1μF
TP11
GND
TP13
GND
TP12
GND
GND
GND
DGND
*Note: Connect GND, DGND, and AGND at IC EP1
Figure 2: AAT1162 Evaluation Board Schematic.
Figure 3: AAT1162 Evaluation Board
Component Side Layout.
1162.2008.01.1.3
Figure 4: AAT1162 Evaluation Board
Solder Side Layout.
www.analogictech.com
15
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Design Example
Specifications
VOUT
VIN
FOSC
TAMB
5V @ 1.5A, Pulsed Load ΔILOAD = 1.5A
12V nominal
800kHz
85°C in TDFN34-16 Package
Output Inductor
L=
VOUT
· 3.8µH = 5.75µH; use 4.7µH (see Table 2)
3.3
ΔIL = 0.32 · ILOAD = 480mA
For Cooper Bussman inductor DR73-4R7-R 4.7μH DCR = 29.7mW max.
⎛
VOUT
5V
5V ⎞
⎛ V ⎞
⋅ 1 - O1 =
⋅ 1= 480mA
L1 ⋅ FOSC ⎝ VIN ⎠ 4.7µH ⋅ 800kHz ⎝ 12V⎠
ΔI1 =
IPK1 = ILOAD +
ΔI1
= 1.5A + 0.480A = 1.98A
2
PL1 = ILOAD2 ⋅ DCR = 3A2 ⋅ 13mΩ = 117mW
Output Capacitor
VDROOP = 0.2V
COUT =
3 · ΔILOAD
3 · 1.5A
=
= 28µF; use 22µF
0.2V · 800kHz
VDROOP · FOSC
IRMS(MAX) =
(VOUT) · (VIN(MAX) - VOUT)
1
5V · (12V - 5V)
·
= 139mArms
=
4.7µH
· 800kHz · 12V
·
V
L
·
F
·
2
3
2· 3
OSC
IN(MAX)
1
·
Pesr = esr · IRMS2 = 5mΩ · (277mA)2 = 384µW
Input Capacitor
Input Ripple VPP = 50mV
CIN =
1
1
=
= 11µF; use 10µF
⎛ VPP
⎞
⎛ 50mV
⎞
- 5mΩ · 4 · 800kHz
- ESR · 4 · FOSC
⎝ ILOAD
⎠
⎝ 1.5A
⎠
IRMS(MAX) =
ILOAD
= 0.75Arms
2
P = esr · IRMS2 = 5mΩ · (0.75A)2 = 2.81mW
16
www.analogictech.com
1162.2008.01.1.3
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
AAT1162 Losses
Total losses can be estimated by calculating the dropout (VIN = VO) losses where the power MOSFET RDS(ON) will be at
the maximum value. All values assume an 85°C ambient temperature and a 140°C junction temperature with the TDFN
37°C/W package.
PLOSS = ILOAD2 · RDS(ON)H = 1.5A2 · 0.158Ω = 0.355W
TJ(MAX) = TAMB + ΘJA · PLOSS = 85°C + (37°C/W) · 355mW = 96.6°C
The total losses are also investigated at the nominal input voltage (12V). The simplified version of the RDS(ON) losses
assumes that the N-channel and P-channel RDS(ON) are equal.
PTOTAL = ILOAD2 · RDS(ON) + [(tsw · FOSC · ILOAD + IQ) · VIN]
= 1.5A2 · 100mΩ + [(5ns · 800kHz · 1.5A + 150µA) · 12V] = 299mW
TJ(MAX) = TAMB + ΘJA · PLOSS = 85°C + (37°C/W) · 299mW = 96°C
1162.2008.01.1.3
www.analogictech.com
17
PRODUCT DATASHEET
AAT1162
SwitchRegTM
12V, 1.5A Step-Down DC/DC Converter
Ordering Information
Package
Marking1
Part Number (Tape and Reel)2
TDFN34-16
YYXYY
AAT1162IRN-0.6-T1
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means semiconductor
products that are in compliance with current RoHS standards, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. For more information, please visit our website at
http://www.analogictech.com/about/quality.aspx.
Package Information
TDFN34-16
1.600 ± 0.050
0.35 REF
0.450 ± 0.050
0.230 ± 0.050
4.000 ± 0.050
Index Area
2.350 ± 0.050
0.070 ± 0.050
3.000 ± 0.050
0.25 REF
0.430 ± 0.050
1.600 ± 0.050
Top View
0.750 ± 0.050
Bottom View
0.230 ± 0.050
0.050 ± 0.050
Side View
All dimensions in millimeters.
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
Advanced Analogic Technologies, Inc.
3230 Scott Boulevard, Santa Clara, CA 95054
Phone (408) 737-4600
Fax (408) 737-4611
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual
property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech’s terms and
conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate
design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to
support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other
brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
18
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1162.2008.01.1.3