PD - 97681
AUTOMOTIVE GRADE
AUIRFR4620
HEXFET® Power MOSFET
Features
●
●
●
●
●
●
●
●
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dV/dT Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
VDSS
RDS(on) typ.
max.
ID
D
G
S
200V
64m:
78m:
24A
D
Description
S
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching
speed and improved repetitive avalanche rating . These features
combine to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide variety of other
applications.
G
D-Pak
AUIRFR4620
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
c
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally limited)
Avalanche Current
Repetitive Avalanche Energy
c
e
c
d
54
-55 to + 175
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
dv/dt
TJ
TSTG
Units
24
17
100
144
0.96
± 20
113
See Fig. 14, 15, 22a, 22b,
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300
Thermal Resistance
Symbol
RθJC
RθJA
RθJA
Parameter
j
Junction-to-Case
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
i
Typ.
Max.
Units
–––
–––
–––
1.045
50
110
°C/W
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
06/10/11
AUIRFR4620
Static Electrical @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
gfs
RG(int)
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Internal Gate Resistance
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
200
–––
–––
3.0
37
–––
–––
–––
–––
–––
–––
0.23
64
–––
–––
2.6
–––
–––
–––
–––
Conditions
–––
V VGS = 0V, ID = 250μA
––– V/°C Reference to 25°C, ID = 5mA
78
mΩ VGS = 10V, ID = 15A
5.0
V VDS = VGS, ID = 100μA
–––
S VDS = 50V, ID = 15A
–––
Ω
VDS = 200V, VGS = 0V
20
μA
250
VDS = 200V, VGS = 0V, TJ = 125°C
100
VGS = 20V
nA
-100
VGS = -20V
c
f
Dynamic Electrical @ TJ = 25°C (unless otherwise specified)
Symbol
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Min. Typ. Max. Units
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
g
h
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
25
8.2
7.9
17
13.4
22.4
25.4
14.8
1710
125
30
113
317
38
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Conditions
ID = 15A
VDS = 100V
nC
VGS = 10V
ID = 15A, VDS =0V, VGS = 10V
VDD = 130V
ID = 15A
ns
RG = 7.3Ω
VGS = 10V
VGS = 0V
VDS = 50V
pF ƒ = 1.0MHz (See Fig.5)
VGS = 0V, VDS = 0V to 160V (See Fig.11)
VGS = 0V, VDS = 0V to 160V
f
f
h
g
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
VSD
trr
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
c
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 1.0mH
RG = 25Ω, IAS = 15A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 15A, di/dt ≤ 634A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
2
Min. Typ. Max. Units
–––
–––
24
–––
–––
100
Conditions
MOSFET symbol
A
showing the
integral reverse
D
G
p-n junction diode.
TJ = 25°C, IS = 15A, VGS = 0V
TJ = 25°C
VR = 100V,
TJ = 125°C
IF = 15A
di/dt = 100A/μs
TJ = 25°C
S
f
––– –––
1.3
V
–––
78
–––
ns
–––
99
–––
––– 294 –––
nC
TJ = 125°C
––– 432 –––
–––
7.6
–––
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
f
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C
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AUIRFR4620
Qualification Information
†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device
Model
RoHS Compliant
††
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
D-PAK
MSL1
Class M3 (+/- 400V)
AEC-Q101-002
†††
Class H1B (+/- 1000V)
AEC-Q101-001
Class C5 (+/- 2000V)
AEC-Q101-005
†††
†††
Yes
Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions to AEC-Q101 requirements are noted in the qualification report.
Highest passing voltage.
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3
AUIRFR4620
1000
1000
100
BOTTOM
10
1
5.0V
0.1
≤60μs PULSE WIDTH
Tj = 25°C
100
BOTTOM
10
5.0V
1
≤60μs PULSE WIDTH
Tj = 175°C
0.1
0.01
0.1
1
10
0.1
100
Fig 1. Typical Output Characteristics
100
3.5
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
1000
TJ = 175°C
T J = 25°C
10
1
VDS = 50V
≤60μs PULSE WIDTH
0.1
ID = 15A
VGS = 10V
3.0
2.5
2.0
1.5
1.0
0.5
2
4
6
8
10
12
14
16
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
14.0
100000
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
10000
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Ciss
1000
Coss
100
Crss
ID= 15A
12.0
VDS= 160V
VDS= 100V
VDS= 40V
10.0
8.0
6.0
4.0
2.0
0.0
10
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
0
5
10
15
20
25
30
35
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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AUIRFR4620
1000
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
T J = 25°C
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100μsec
1msec
10
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
1.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1
1.6
VSD, Source-to-Drain Voltage (V)
ID, Drain Current (A)
25
20
15
10
5
0
75
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
30
50
T C , Case Temperature (°C)
1000
260
Id = 5mA
250
240
230
220
210
200
190
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
3.0
EAS , Single Pulse Avalanche Energy (mJ)
500
2.5
2.0
Energy (μJ)
100
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
25
10
VDS, Drain-to-Source Voltage (V)
1.5
1.0
0.5
0.0
-50
0
50
100
150
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
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200
ID
TOP
2.05A
2.94A
BOTTOM 15A
450
400
350
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
5
AUIRFR4620
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
Ci= τi/Ri
Ci i/Ri
1E-005
0.0001
τ
τi (sec)
0.000311
0.589
0.003759
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
τ2
Ri (°C/W)
0.456
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
120
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 15A
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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6.0
90
5.5
80
5.0
70
4.5
IF = 10A
V R = 100V
TJ = 25°C
TJ = 125°C
60
4.0
3.5
IRRM (A)
VGS(th), Gate threshold Voltage (V)
AUIRFR4620
ID = 100μA
ID = 250uA
ID = 1.0mA
ID = 1.0A
3.0
2.5
2.0
50
40
30
20
10
1.5
0
1.0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
600
800
1000
diF /dt (A/μs)
T J , Temperature ( °C )
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
2000
90
IF = 15A
V R = 100V
80
70
IF = 10A
V R = 100V
1800
1600
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
1400
QRR (A)
60
IRRM (A)
400
1200
50
1000
40
30
800
20
600
10
400
200
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/μs)
diF /dt (A/μs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
2000
IF = 15A
V R = 100V
1800
1600
TJ = 25°C
TJ = 125°C
QRR (A)
1400
1200
1000
800
600
400
200
0
200
400
600
800
1000
diF /dt (A/μs)
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Fig. 20 - Typical Stored Charge vs. dif/dt
7
AUIRFR4620
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
8
Fig 24a. Gate Charge Test Circuit
Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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AUIRFR4620
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
Part Number
AUFR4620
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
AUIRFR4620
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFR4620
Ordering Information
Base part number
AUIRFR4620
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Package Type
Dpak
Standard Pack
Form
Tube
Tape and Reel
Tape and Reel Left
Tape and Reel Right
Complete Part Number
Quantity
75
2000
3000
3000
AUIRFR4620
AUIRFR4620TR
AUIRFR4620TRL
AUIRFR4620TRR
11
AUIRFR4620
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve
the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products
and applications using IR components. To minimize the risks with customer products and applications, customers should
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For technical support, please contact IR’s Technical Assistance Center
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WORLD HEADQUARTERS:
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12
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