NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc ISL28271, ISL28272 DATASHEET Rev X.00 Dual Micropower, Single Supply, Rail-to-Rail Input and Output (RRIO) Instrumentation Amplifier The ISL28271 and ISL28272 are dual micropower instrumentation amplifiers (in-amps) optimized for single supply operation over the +2.4V to +5.5V range. Both devices feature an Input Range Enhancement Circuit (IREC) which maintains CMRR performance for input voltages equal to the positive and negative supply rails. The input signal is capable of swinging 10% above the positive supply rail and to 100mV below the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The ISL28271 is compensated for a minimum gain of 10 or more. For higher gain applications, the ISL28272 is compensated for a minimum gain of 100. The in-amps have CMOS input devices for maximum input common voltage range. The amplifiers can be operated from one lithium cell or two Ni-Cd batteries. Ordering Information PART NUMBER (Note) PART MARKING Features • 120µA typical supply current for both channels • 30pA max input bias current • 100dB CMRR, PSRR • 0.7µV/°C offset voltage temperature coefficient • 180kHz 3dB Bandwidth - ISL28271 • 100kHz 3dB Bandwidth - ISL28272 • 0.5V/µs slew rate • Single supply operation • Rail-to-rail input and output (RRIO) • Input is capable of swinging above V+ and below V(ground sensing) • 0.081%1 typical gain error - ISL28271 • -0.19%1 typical gain error - ISL28272 PACKAGE (Pb-free) PKG. DWG. # • Pb-free available (RoHS compliant) ISL28271FAZ* 28271 FAZ 16 Ld QSOP MDP0040 Applications ISL28272FAZ* 28272 FAZ 16 Ld QSOP MDP0040 • Battery- or solar-powered systems ISL28271INEVAL1Z Evaluation Platform • Strain gauge ISL28272INEVAL1Z Evaluation Platform • Sensor signal conditioning *Add “-T7” suffix for tape and reel. Please refer to TB347 for details on reel specifications. • Medical devices NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. • Industrial instrumentations Related Literature • AN1290, ISL2827xINEVAL1Z Evaluation Board User’s Guide • AN1298, Instrumentation Amplifier Application Note Pinout ISL28271, ISL28272 (16 LD QSOP) TOP VIEW 16 V+ NC 1 15 OUT_B OUT_A 2 FB+_A 3 - + 14 FB+_B 13 FB-_B IN-_A 5 12 IN-_B IN+_A 6 11 IN+_B EN_A 7 10 EN_B V- 8 Rev X.00 + - FB-_A 4 9 NC Page 1 of 14 ISL28271, ISL28272 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn-on Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs Input Current (IN, FB) ISL28272 . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage (IN, FB) ISL28272 . . . . . . . . . . . . . . . 0.5V Input Current (IN, FB) ISL28271 . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input (IN, FB) Voltage ISL28271 . . . . . . . . . . . . . . . 1.0V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Resistance JA (°C/W) 16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 112 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VOS TCVOS V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. DESCRIPTION Input Offset Voltage CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT ISL28271 -600 -1200 ±35 600 1200 µV ISL28272 -500 -750 ±35 500 750 µV Input Offset Voltage Temperature Coefficient -40°C to +125°C 0.7 µV/°C IOS Input Offset Current between IN+ and IN-, and between FB+ and FB- See graphs for extended temperature range -40°C to +85°C -30 -80 ±5 30 80 pA IB Input Bias Current (IN+, IN-, FB+, and FB- terminals) See graphs for extended temperature range -40°C to +85°C -30 -80 ±10 30 80 pA eN Input Noise Voltage ISL28271 f = 0.1Hz to 10Hz ISL28272 Input Noise Voltage Density ISL28271 fo = 1kHz ISL28272 iN Input Noise Current Density ISL28271 fo = 1kHz ISL28272 RIN Input Resistance VIN Input Voltage Range V+ = 2.4V to 5.0V Common Mode Rejection Ratio ISL28271 CMRR PSRR EG µVP-P 6 µVP-P 240 nV/Hz 78 nV/Hz 0.92 pA/Hz 0.2 pA/Hz 1 G 0 VCM = 0V to 5V V+ V 80 70 100 dB ISL28272 80 75 100 dB Power Supply Rejection Ratio V+ = 2.4V to 5V 80 75 100 dB Gain Error ISL28271 +0.081 % ISL28272 Rev X.00 10 RL = 100k to 2.5V -0.19 Page 2 of 14 ISL28271, ISL28272 Electrical Specifications PARAMETER VOUT V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) DESCRIPTION Maximum Voltage Swing CONDITIONS MIN (Note 1) Output low, RL = 100k Output low, RL = 1k SR -3db BW TYP MAX (Note 1) UNIT 3 6 30 mV 130 175 225 mV Output high, RL = 100k 4.980 4.980 4.99 V Output high, RL = 1k 4.85 4.80 4.88 V Slew Rate RL = 1k to GND 0.4 0.35 0.5 -3dB Bandwidth RL = 10k 0.7 0.75 V/µs ISL28271 180 kHz ISL28272 100 kHz IS,EN Supply Current, Enabled Both A and B channels enabled, EN = V- 120 156 200 µA IS,DIS Supply Current, Disabled Both A and B channels disabled, EN = V+ 4 7 9 µA VINH EN Enable Pin High Level VINL EN Enable Pin Low Level IENH EN Input Current High EN = V+ IENL EN Input Current Low EN = V- Supply Operating Range V+ to V- (Note 2) 2.4 ISC+ Short Circuit Output Current V+ = 5V, RL = 10 28 25 31 mA ISC- Short Circuit Output Current V+ = 5V, RL = 10 24 20 26 mA VSUPPLY 2 V 0.8 V 0.8 1 1.3 µA 26 50 100 nA 5.5 V NOTE: 1. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested. 2. VSUPPLY = +5.25V max when VENL = +V (device in disable state). Rev X.00 Page 3 of 14 ISL28271, ISL28272 Typical Performance Curves 70 GAIN = 500 GAIN (dB) GAIN (dB) GAIN = 100 40 GAIN = 50 30 GAIN = 10,000 80 GAIN = 200 50 GAIN = 20 GAIN = 5,000 70 GAIN = 1,000 60 GAIN = 500 50 GAIN = 200 GAIN = 100 40 1 10 100 1k 10k 100k 30 1M 1 10 FREQUENCY (Hz) FIGURE 1. ISL28271 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = VCM = 5V 70 GAIN = 500 GAIN = 200 GAIN = 100 40 GAIN = 50 30 10 100 GAIN = 5,000 70 10k 100k GAIN = 200 GAIN = 100 1 10 FREQUENCY (Hz) 70 GAIN = 1000 60 GAIN = 500 GAIN = 50 GAIN = 10 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M 100k 1M GAIN = 1,000 60 30 VCM = +10mV VOUT = 10mVP-P RL = 10k GAIN = 2,000 GAIN = 500 GAIN = 200 GAIN = 100 40 FIGURE 5. ISL28271 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = 5V, VCM = 10mV Rev X.00 GAIN = 5,000 70 50 GAIN = 20 20 GAIN = 10,000 80 GAIN = 100 30 10 90 VCM = +10mV VOUT = 10mVP-P RL = 10k GAIN = 200 40 100 1k 10k FREQUENCY (Hz) FIGURE 4. ISL28272 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = 1/2V+ GAIN (dB) GAIN (dB) 50 VCM = 2.5V VOUT = 10mVP-P RL = 10k GAIN = 500 30 1M FIGURE 3. ISL28271 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = 5V, VCM = 1/2V+ 1M GAIN = 1,000 60 40 1k 100k GAIN = 2,000 50 GAIN = 10 1 GAIN = 10,000 80 GAIN = 20 20 10 90 GAIN (dB) GAIN (dB) 50 100 1k 10k FREQUENCY (Hz) FIGURE 2. ISL28272 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = V+ VCM = 2.5V VOUT = 10mVP-P RL = 10k GAIN = 1000 60 VCM = 5V VOUT = 10mVP-P RL = 10k GAIN = 2,000 GAIN = 10 20 10 90 VCM = 5V VOUT = 10mVP-P RL = 10k GAIN = 1000 60 V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 6. ISL28272 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = V- Page 4 of 14 ISL28271, ISL28272 Typical Performance Curves V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. 45 25 30 V+ = 2.4V 15 10 AV = 10 RL = 10k CL = 10pF 5 RF/RG = 10 RF = 1k RG = 100 0 10 100 V+ = 5V 35 GAIN (dB) GAIN (dB) 40 V+ = 5V 20 V+ = 2.4V 25 20 AV = 100 RL = 10k CL = 10pF RF/RG = 100 RF = 10k RG = 100 15 10 5 1k 10k 100k 0 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 7. ISL28271 FREQUENCY RESPONSE vs SUPPLY VOLTAGE 25 FIGURE 8. ISL28272 FREQUENCY RESPONSE vs SUPPLY VOLTAGE 50 470pF 820pF 2200pF 45 20 15 AV = 10 R = 10k CL = 10pF RF/RG = 10 RF = 1k RG = 100 10 5 10 100 40 GAIN (dB) GAIN (dB) 1200pF 220pF 100pF 820pF 35 AV = 100 R = 10k CL = 10pF RF/RG = 100 RF = 10k RG = 100 30 1k 10k 100k 25 1M 10 100 56pF 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. ISL28271 FREQUENCY RESPONSE vs CLOAD FIGURE 10. ISL28272 FREQUENCY RESPONSE vs CLOAD 90 120 80 100 70 CMRR (dB) CMRR (dB) 60 50 40 AV = 10 30 20 10 80 60 AV = 100 40 20 0 -10 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 11. ISL28271 CMRR vs FREQUENCY Rev X.00 1M 0 10 100 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 12. ISL28272 CMRR vs FREQUENCY Page 5 of 14 ISL28271, ISL28272 Typical Performance Curves 120 120 100 100 80 80 PSRR+ PSRR (dB) PSRR (dB) V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. 60 PSRR40 AV = 10 PSRR+ 60 PSRR- 40 AV = 100 20 20 0 10 100 1k 10k 100k 0 10 1M 100 FREQUENCY (Hz) 100k 1M FIGURE 14. ISL28272 PSRR vs FREQUENCY 700 INPUT VOLTAGE NOISE (nV/Hz) 1400 INPUT VOLTAGE NOISE (nV/Hz) 10k FREQUENCY (Hz) FIGURE 13. ISL28271 PSRR vs FREQUENCY 1200 1000 800 600 AV = 10 400 200 0 1 1k 10 100 1k 10k 600 500 400 300 100 0 100k AV = 100 200 1 10 FREQUENCY (Hz) 100 1k 10k 100k FREQUENCY (Hz) FIGURE 15. ISL28271 INPUT VOLTAGE NOISE SPECTRAL DENSITY FIGURE 16. ISL28272 INPUT VOLTAGE NOISE SPECTRAL DENSITY 2.0 6 CURRENT NOISE (pA/Hz) CURRENT NOISE (pA/Hz) 1.8 5 4 3 2 AV = 10 1 0 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 17. ISL28271 INPUT CURRENT NOISE SPECTRAL DENSITY Rev X.00 1.6 1.4 1.2 1.0 0.8 0.6 AV = 100 0.4 0.2 0.0 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 18. ISL28272 INPUT CURRENT NOISE SPECTRAL DENSITY Page 6 of 14 ISL28271, ISL28272 V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. VOLTAGE NOISE (5µV/DIV) VOLTAGE NOISE (2µV/DIV) Typical Performance Curves TIME (1s/DIV) TIME (1s/DIV) FIGURE 19. ISL28271 0.1Hz TO 10Hz INPUT VOLTAGE NOISE, GAIN = 10 FIGURE 20. ISL28272 0.1Hz TO 10Hz INPUT VOLTAGE NOISE, GAIN = 100 160 n = 3000 MAX 170 150 MEDIAN 130 MAX 150 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 190 n = 3000 110 MIN 90 140 130 MEDIAN 120 110 MIN 100 70 50 -40 -20 0 20 40 60 80 100 90 -40 120 -20 0 5.0 100 120 6 4.0 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 80 n = 3000 MAX 4.5 MEDIAN 3.5 3.0 MIN 0 20 40 60 80 MAX 5 4 3 MIN MEDIAN 2 1 100 120 TEMPERATURE (°C) FIGURE 23. ISL28271 SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = ±2.5V, VIN = 0V Rev X.00 60 7 n = 3000 -20 40 FIGURE 22. ISL28272 SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = ±2.5V, VIN = 0V FIGURE 21. ISL28271 SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = ±2.5V, VIN = 0V 2.5 -40 20 TEMPERATURE (°C) TEMPERATURE (°C) 0 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 FIGURE 24. ISL28272 SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = ±2.5V, VIN = 0V Page 7 of 14 ISL28271, ISL28272 Typical Performance Curves 160 V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. 190 n = 3000 150 170 MAX MAX 130 CMRR (dB) CMRR (dB) 140 120 MEDIAN 110 100 90 MIN -20 0 20 40 60 80 150 130 MEDIAN 110 MIN 90 80 70 -40 n = 3000 100 70 -40 120 -20 0 FIGURE 25. ISL28271 CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V 150 180 MAX PSRR (dB) PSRR (dB) 120 110 MEDIAN 90 80 100 120 n = 3000 MAX 140 120 MEDIAN 100 MIN MIN -20 0 20 40 60 80 100 60 -40 120 -20 0 TEMPERATURE (°C) 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 27. ISL28271 PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.5V FIGURE 28. ISL28272 PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.5V 4.91 4.91 n = 3000 n = 3000 4.90 4.90 MAX MAX 4.89 VOUT (V) 4.89 VOUT (V) 80 80 70 60 -40 60 160 130 100 40 FIGURE 26. ISL28272 CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V n = 3000 140 20 TEMPERATURE (°C) TEMPERATURE (°C) 4.88 4.87 MEDIAN 4.88 MEDIAN 4.87 MIN 4.86 4.86 MIN 4.85 4.84 -40 4.85 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 29. ISL28271 VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = ±2.5V Rev X.00 4.84 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 30. ISL28272 VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = ±2.5V Page 8 of 14 ISL28271, ISL28272 Typical Performance Curves 4.9980 n = 3000 4.9975 VOUT (V) 4.9970 MAX 4.9965 MIN 4.9955 4.9950 -40 4.9970 MAX 4.9965 -20 0 MIN 4.9955 20 40 60 80 TEMPERATURE (°C) 100 120 4.9950 -40 -20 0 180 170 n = 3000 170 MAX VOUT (mV) 130 MEDIAN 120 MAX 140 130 120 MEDIAN 110 110 100 MIN 100 MIN 90 90 -40 -20 0 20 40 60 80 100 80 -40 120 -20 0 6.0 5.8 MAX VOUT (mV) 5.0 4.8 5.0 4.8 4.4 4.2 4.2 0 20 40 60 80 100 TEMPERATURE (°C) FIGURE 35. ISL28271 VOUT LOW vs TEMPERATURE, RL = 100k, V+, V- = ±2.5V Rev X.00 120 MEDIAN MIN 4.6 MIN -20 100 5.2 4.4 4.0 -40 80 MAX 5.4 MEDIAN 4.6 60 n = 3000 5.6 5.4 5.2 40 FIGURE 34. ISL28272 VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = ±2.5V n = 3000 5.6 20 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 33. ISL28271 VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = ±2.5V VOUT (mV) 120 150 140 5.8 100 n = 3000 160 150 6.0 20 40 60 80 TEMPERATURE (°C) FIGURE 32. ISL28272 VOUT HIGH vs TEMPERATURE, RL = 100k, V+, V- = ±2.5V FIGURE 31. ISL28271 VOUT HIGH vs TEMPERATURE, RL = 100k, V+, V- = ±2.5V VOUT (mV) MEDIAN 4.9960 4.9960 160 n = 3000 4.9975 MEDIAN VOUT (V) 4.9980 V+ = +5V, V- = GND, VFB+ = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. 120 4.0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 36. ISL28272 VOUT LOW vs TEMPERATURE, RL = 100k, V+, V- = ±2.5V Page 9 of 14 ISL28271, ISL28272 Pin Descriptions ISL28271 16 Ld QSOP ISL28272 16 Ld QSOP 2, 15 2, 15 OUT_A, OUT_B Circuit 3 Output Voltage. A complementary Class AB common-source output stage drives the output of each channel. When disabled, the outputs are in a high impedance state. 3, 14 3, 14 FB+_A, FB+_B Circuit 1A, Circuit 1B Positive Feedback high impedance terminals. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. PIN NAME EQUIVALENT CIRCUIT PIN FUNCTION ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 4, 13 4, 13 FB-_A, FB-_B Circuit 1A, Circuit 1B Negative Feedback high impedance terminals. The FB- pins connect to an external resistor divider to individually set the desired gain of the in-amp. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 5, 12 5, 12 IN-_A, IN-_B Circuit 1A, Circuit 1B High impedance Inverting input terminals. Connect to the low side of the input source signal. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 6, 11 6, 11 IN+_A, IN+_B Circuit 1A, Circuit 1B High impedance Non-inverting input terminals. Connect to the high side of the input source signal. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B. ISL28271: to avoid offset drift, it is recommended that the terminals of the ISL28271 are not overdriven beyond 1V and the input current must never exceed 5mA. 7, 10 7, 10 EN_A, EN_B Circuit 2 Active LOW logic pins. When pulled above 2V, the corresponding channel turns off and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built-in pull downs define each EN pin LOW when left floating. 16 16 V+ Circuit 4 Positive Supply terminal shared by all channels. 8 8 V- Circuit 4 Negative Supply terminal shared by all channels. Grounded for single supply operation. 1, 9 1, 9 NC No Connect, pins can be left floating or grounded. V+ V+ IN+ FB+ INFB- V+ LOGIC PIN CAPACITIVELY COUPLED ESD CLAMP OUT V- V- V- CIRCUIT 1A V+ CIRCUIT 2 VCIRCUIT 3 CIRCUIT 4 V+ INFB- IN+ FB+ V- CIRCUIT 1B Rev X.00 Page 10 of 14 ISL28271, ISL28272 Application Information Product Description charts. IREC also cures the abrupt change and even reverse polarity of the input bias current over the whole range of input. The ISL28271 and ISL28272 are dual channel micropower instrumentation amplifiers (in-amps) which deliver rail-to-rail input amplification and rail-to-rail output swing. The in-amps also deliver excellent DC and AC specifications while consuming only about 120µA for both channels. Because the independent pair of feedback terminals set the gain and adjust the output zero level, the ISL28271 and ISL28272 achieve high CMRR regardless of the tolerance of the gain setting resistors. The ISL28271 is internally compensated for a minimum gain of 10. The ISL28272 is internally compensated for a minimum gain of 100. Output Stage and Output Voltage Range EN pins are available to independently enable or disable a channel. When all channels are off, current consumption is down to typically 4µA. VIN, the potential difference across IN+ and IN-, is replicated (less the input offset voltage) across FB+ and FB-. The function of the in-amp is to maintain the differential voltage across FB- and FB+ equal to IN+ and IN-; (FB- - FB+) = (IN+ IN-). Consequently, the transfer function can be derived. The in-amp gain is set by two external resistors, the feedback resistor RF, and the gain resistor RG. Input Protection All input terminals and feedback terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Input signals originating from low impedance sources should have current limiting resistors in series with the IN+ and IN- pins to prevent damaging currents during power supply sequencing and other transient conditions. The ISL28272 has additional back-to-back diodes across the input terminals and also across the feedback terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. External series resistors may be used as an external protection to limit excessive external voltage and current from damaging the inputs. On the other hand, the ISL28271 has no clamps to limit the differential voltage on the input terminals allowing higher differential input voltages at lower gain applications. It is recommended however, that the terminals of the ISL28271 are not overdriven beyond 1V to avoid offset drift. Input Stage and Input Voltage Range The input terminals (IN+ and IN-) of the in-amps are a single differential pair of CMOS devices aided by an Input Range Enhancement Circuit, IREC, to increase the headroom of operation of the common-mode input voltage. The feedback terminals (FB+ and FB-) also have a similar topology. As a result, the input common-mode voltage range is rail-to-rail regardless of the feedback terminal settings and regardless of the gain settings. They are able to handle input voltages that are at or slightly beyond the supply and ground sensing making these in-amps well suited for single 5V down to 2.4V supply systems. The IREC enables rail-to-rail input amplification without the problems usually associated with the dual differential stage topology. The IREC ensures that there are no drastic changes in offset voltage over the entire range of the input. See Input Offset Voltage vs Common-Mode Input Voltage in performance Rev X.00 A Class AB common-source output stage drives the output. The pair of complementary MOSFET devices drive the output VOUT to within a few millivolts of the supply rails. At a 100k load, the PMOS sources current and pulls the output up to 4mV below the positive supply. The NMOS sinks current and pulls the output down to 4mV above the negative supply, or ground in the case of a single supply operation. The current sinking and sourcing capability are internally limited to 31mA. When disabled, the outputs are in a high impedance state. Gain Setting 2.4V TO 5.5V IN+ IN+ IN- IN- FB+ FB- VCM RG + V+ EN EN - VOUT + - VISL28271 ISL28272 RF FIGURE 37. GAIN IS SET BY TWO EXTERNAL RESISTORS, RF AND RG VIN = IN+ – INRF VOUT = 1 + -------- VIN R G (EQ. 1) In Figure 37, the FB+ pin and one end of resistor RG are connected to GND. With this configuration, Equation 1 is only true for a positive swing in VIN; negative input swings will be ignored because the output will be at ground. Reference Connection Unlike a three op amp in-amp realization, a finite series resistance seen at the REF terminal does not degrade the high CMRR performance eliminating the need for an additional external buffer amplifier. Figure 38 uses the FB+ pin to provide a high impedance REF terminal. Page 11 of 14 ISL28271, ISL28272 2.4V TO 5.5V IN+ IN+ IN- IN- FB+ FB- 2.9V to 5.5V VCM R1 + + - V+ EN EN VOUT ISL28271 VISL28271 ISL28272 RG RF FIGURE 38. GAIN SETTING AND REFERENCE CONNECTION . VIN = IN+ – INRF RF VOUT = 1 + -------- VIN + 1 + -------- VREF R R G G (EQ. 2) The FB+ pin is used as a REF terminal to center or to adjust the output. Because the FB+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the REF terminal without degrading or affecting the CMRR performance. Any voltage applied to the REF terminal will shift VOUT by VREF times the closed loop gain, which is set by resistors RF and RG. See Figure 38. The FB+ pin can also be connected to the other end of resistor, RG. See Figure 39. Keeping the basic concept that the in-amp maintains constant differential voltage across the input terminals and feedback terminals (FB- - FB+) = (IN+ - IN-), the transfer function of Figure 39 can be derived. 2.4V TO 5.5V IN+ IN+ IN- IN- FB+ FB- VCM + + - V+ EN EN ISL28271 VOUT VISL28271 ISL28272 Because of the independent pair of feedback terminals provided by the in-amps, the CMRR is not degraded by any resistor mismatches. Hence, unlike a three op amp and especially a two op amp in-amp realization, the ISL28271 and ISL28272 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing CMRR performance. The CMRR will be typically 110dB regardless of the tolerance of the resistors used. Instead, a resistor mismatch results in a higher deviation from the theoretical gain - Gain Error. Gain Error and Accuracy The gain error indicated in the “Electrical Specifications” table on page 2 is the inherent gain error alone. The gain error specification listed does not include the gain error contributed by the resistors. There is an additional gain error due to the tolerance of the resistors used. The resulting non-ideal transfer function effectively becomes: RF VOUT = 1 + -------- 1 E RG + E RF + E G VIN R G (EQ. 5) Where: ERG = Tolerance of RG ERF = Tolerance of RF EG = Gain Error of the ISL28271 The term [1 - (ERG +ERF +EG)] is the deviation from the theoretical gain. Thus, (ERG +ERF +EG) is the total gain error. For example, if 1% resistors are used, the total gain error would be: TotalGainError = E RG + E RF + E G typical Disable/Power-Down RG RF FIGURE 39. REFERENCE CONNECTION WITH AN AVAILABLE VREF VIN = IN+ – INRS + RF VOUT = 1 + ---------------------- + VREF RG Rev X.00 A finite resistance RS in series with the VREF source, adds an output offset of VIN*(RS/RG). As the series resistance RS approaches zero, Equation 3 is simplified to Equation 4 for Figure 39. VOUT is simply shifted by an amount VREF. TotalGainError = 0.01 + 0.01 + 0.005 = 2.5% RS VREF (EQ. 4) External Resistor Mismatches REF R2 RF VOUT = 1 + -------- VIN + VREF R G The ISL28271 and ISL28272 have an enable/disable pin for each channel. They can be powered down to reduce the supply current to typically 4µA when all channels are off. When disabled, the corresponding output is in a high impedance state. The active low EN pin has an internal pull down and hence can be left floating and the in-amp enabled by default. When the EN is connected to an external logic, the in-amp will shutdown when EN pin is pulled above 2V, and will power up when EN bar is pulled below 0.8V. (EQ. 3) Page 12 of 14 ISL28271, ISL28272 Unused Channels The ISL28271 and ISL28272 are Dual channel op amps. If the application only requires one channel when using the ISL28271 or ISL28272, the user must configure the unused channel to prevent it from oscillating. The unused channel will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to configure the feedback pins (FB+, FB-) with the minimum gain stable values for the amplifier with RF and RG resistors and tieing the input terminals to ground (as shown in Figure 40). IN+ INFB+ FB- RG + + RF FIGURE 40. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Rev X.00 Page 13 of 14 ISL28271, ISL28272 Quarter Size Outline Plastic Packages Family (QSOP) MDP0040 A QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY D (N/2)+1 N INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES E PIN #1 I.D. MARK E1 1 (N/2) B 0.010 C A B e H C SEATING PLANE 0.007 0.004 C b C A B A 0.068 0.068 0.068 Max. - A1 0.006 0.006 0.006 ±0.002 - A2 0.056 0.056 0.056 ±0.004 - b 0.010 0.010 0.010 ±0.002 - c 0.008 0.008 0.008 ±0.001 - D 0.193 0.341 0.390 ±0.004 1, 3 E 0.236 0.236 0.236 ±0.008 - E1 0.154 0.154 0.154 ±0.004 2, 3 e 0.025 0.025 0.025 Basic - L 0.025 0.025 0.025 ±0.009 - L1 0.041 0.041 0.041 Basic - N 16 24 28 Reference Rev. F 2/07 NOTES: L1 A 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. c SEE DETAIL "X" 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L A1 4°±4° DETAIL X © Copyright Intersil Americas LLC 2006-2007. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Rev X.00 Page 14 of 14