HV7022 34-Channel Symmetric Row Driver Features Description • High-Voltage CMOS technology • Symmetric row drive (reduces latent imaging in ACTFEL displays) • Output voltage up to +230V • Low power level shifting • Source/sink current minimum 70 mA • Shift register speed 4.0 MHz • Pin-programmable shift direction HV7022 is a low-voltage serial to high-voltage parallel converter with push-pull outputs. It is especially suited for use as a symmetric row driver in AC thin-film electroluminescent (ACTFEL) displays. HV7022 offers 34 output lines, a direction (DIR) pin to give CW or CCW shift register loading, output enable (OE), and polarity (POL) control. After data is entered on the falling edge of CLK, a logic high will cause the output to swing to VPP if POL is high, or to GND if POL is low. Package Type 6 1 44 40 44-Lead PLCC See Table 2-1 for pin information 2016 Microchip Technology Inc. DS20005428A-page 1 HV7022 Functional Block Diagram VPP OE POL VDD P Level Translator DATA INPUT HVOUT1 N P CLK S/R Level Translator HVOUT2 N DIR P Level Translator DATA OUT HVOUT34 N GND DS20005428A-page 2 2016 Microchip Technology Inc. HV7022 1.0 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS† Supply voltage, VDD ...................................................................................................................................-0.3V to +15V Supply voltage, VPP .................................................................................................................................-0.3V to +250V Logic input levels ............................................................................................................................... -0.3V to VDD+0.3V Ground current1 ....................................................................................................................................................... 1.5A Continuous total power dissipation2 .................................................................................................................. 1200mW Operating temperature range.................................................................................................................. -40°C to +85°C Storage temperature range ................................................................................................................... -65°C to +150°C † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1: 2: Duty cycle is limited by the total power dissipated in the package. For operation above 25°C ambient derate linearly to maximum operating temperature at 25 mW/°C. ELECTRICAL CHARACTERISTICS Recommended Operating Conditions: VPP = 230V, VDD = 12V, TA = 25°C, unless otherwise noted Symbol Parameter DC Characteristics IDD VDD supply current IPP VPP supply current IDDQ Quiescent VDD supply current HVOUT VOH High-level output DATA OUT HVOUT Low-level output VOL DATA OUT IIH High-level logic input current IIL Low-level logic input current AC Characteristics fCLK Clock frequency tWH,tWL Pulse duration clock width high or low tSUD Data set-up time before falling clock tHD Data hold time after falling clock Setup time clock low before VPP↑ or tSUC GND↓ Setup time enable high before VPP↑ tSUE or GND↓ Setup time polarity high or low before tSUP VPP↑ or GND↓ Hold time clock high after VPP↑ or tHC GND↓ Hold time enable high after VPP↑ or tHE GND↓ Hold time polarity high or low after tHP VPP↑ or GND↓ 2016 Microchip Technology Inc. Min Max Units Conditions 195 11 - 10 4.0 100 750 100 30 1.0 1.0 -1.0 mA mA 125 100 100 4.0 - MHz ns ns ns 300 - ns 300 - ns 300 - ns 500 - ns 300 - ns 300 - ns µA µA V V V V µA µA fCLK= 4.0MHz, VDD=13.2V One output high (Note 1) All outputs low or High-Z All outputs low or High-Z (125°C) All VIN= GND or VDD IO= -70mA IO= -500µA IO= +70mA IO= +500µA VIH= 12V VIL= 0V – – – – – – – – – – DS20005428A-page 3 HV7022 ELECTRICAL CHARACTERISTICS (CONTINUED) Recommended Operating Conditions: VPP = 230V, VDD = 12V, TA = 25°C, unless otherwise noted Symbol tDHL tDLH tTHL tTLH tONH tONL tOFFH tOFFL SR Parameter Min Max - 150 ns CL= 10pF - 200 ns CL = 10pF - 200 ns CL= 15pF - 100 ns CL= 15pF - 500 ns VOH= 195V, RL= 2.0kΩ to 95V - 500 ns VOH= 130V, RL= 2.0kΩ to 30V - 1000 ns VOH= 195V, RL= 2.0kΩ to 95V - 500 ns VOH= 130V, RL= 2.0kΩ to 30V - 45 V/µs Delay time high to low-level output from clock Delay time low to high-level output from clock Transition time high to low-level serial output Transition time low to high-level serial output High-level turn-on time HVOUT from enable Low-level turn-on time HVOUT from enable High-level turn-off time HVOUT from enable Low-level turn-off time HVOUT from enable Slew rate, VPP or GND Units Conditions One active output driving 4.7nF load to VPP or GND Note 1: The total number of ON outputs times the duty cycle must not exceed the allowable package power dissipation. TEMPERATURE SPECIFICATIONS Parameter Symbol Min Typ Max Units Conditions Operating Temperature – -40 – 85 °C – Storage Temperature – -65 – 150 °C – θja – 37 – °C/W Temperature Ranges Package Thermal Resistances Thermal Resistance, 44-Lead PLCC DS20005428A-page 4 – 2016 Microchip Technology Inc. HV7022 1.1 Power up and Recommended Operating Conditions To power-up HV7022, perform the following power-up sequence: 1. 2. 3. 4. Connect ground Apply VDD Set all inputs (Data, CLK, Enable, etc) to a known state. Apply VPP (VPP should not drop below VDD or float during operation). To power-down the device, reverse the steps above. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Units VDD Logic supply voltage 10.8 13.2 V VPP High voltage supply – 230 V VIH High-level input voltage VIL Low-level input voltage fCLK Clock frequency VDD = 10.8 8.1 – VDD = 13.2 9.9 – VDD = 10.8 - 2.7 VDD = 13.2 - 3.3 TA Operating free-air temperature IOD Allowable pulsed current through output diode. 2016 Microchip Technology Inc. V V - 4.0 MHz -40 +85 °C – ±300 mA DS20005428A-page 5 HV7022 2.0 PIN DESCRIPTION The locations of the pins are listed in Package Type. TABLE 2-1: PIN DESCRIPTION Pin # HV7022 1 HVOUT18/17 2 HVOUT17/18 3 HVOUT16/19 4 HVOUT15/20 5 HVOUT14/21 6 HVOUT13/22 7 HVOUT12/23 8 HVOUT11/24 Description 9 HVOUT10/25 10 HVOUT9/26 11 HVOUT8/27 12 HVOUT7/28 13 HVOUT6/29 14 HVOUT5/30 15 HVOUT4/31 16 HVOUT3/32 17 HVOUT2/33 18 HVOUT1/34 19 Data OUT 20 OE Output enable input. When OE is Low, all HV outputs are forced into a High-Z state, regardless of data in each channel. When OE is High, all HV outputs reflect data latched. 21 CLK Data shift register clock Input are shifted into the shift register on the negative edge of the clock. 22 GND Logic and high voltage ground. 23 DIR Direction. 24 VDD Low voltage logic power rail. 25 POL Polarity. 26 DATA INPUT 27 VPP High voltage power rail. 28 NC No Connect. 29 HVOUT34/1 30 HVOUT33/2 31 HVOUT32/3 32 HVOUT31/4 33 HVOUT30/5 34 HVOUT29/6 DS20005428A-page 6 High voltage outputs. Serial data output. Data output for cascading to the data input of the next device. Serial data input. Data needs to be present before each falling edge of the clock. High voltage outputs 2016 Microchip Technology Inc. HV7022 TABLE 2-1: PIN DESCRIPTION Pin # HV7022 35 HVOUT28/7 36 HVOUT27/8 37 HVOUT26/9 38 HVOUT25/10 39 HVOUT24/11 40 HVOUT23/12 41 HVOUT22/13 42 HVOUT21/14 43 HVOUT20/15 44 HVOUT19/16 Description High voltage outputs. Note 1: Pin designation for DIR H/L Example: for DIR = H, pin 1 is HVOUT18 for DIR = L, pin 1 is HVOUT17 2016 Microchip Technology Inc. DS20005428A-page 7 HV7022 3.0 FUNCTIONAL DESCRIPTION Table 3-1 provides functional information about HV7022. TABLE 3-1: FUNCTIONAL TABLE CLK Inputs I/O Relations CLK DIR DATA Outputs POL OE Shift Reg HVOUT DATA OUT O/P HIGH X X H H H * H * O/P OFF X X L H H * HIGH-Z * O/P LOW X X H L H * L * O/P OFF X X L L H * HIGH-Z * O/P OFF X X X X L * All O/P HIGH-Z * ↓ L X X X Qn→Qn+1 * Q34 ↓ H X X X Qn→Qn-1 * Q1 No ↓ X X X X * No Change No Change Load S/R, set DIR Note 1: H = logic high level, L = logic low level, X = irrelevant, ↓ = high-to-low transition Q1 = HVOUT1, Qn = HVOUTn, etc. * = dependent on previous state and whether an O/P or S/R command occurred. Output N-Channel Characteristics through FET Output P-Channel Characteristics through FET Temp = 25OC 180 140 VDD = 12V VDD = 14V 100 I (mA) 140 I (mA) Temp = 25OC 180 VDD = 10V 60 VPP > 40V VDD = 12V & 14V 100 60 20 20 0 20 40 60 80 100 0 20 Volts FIGURE 3-1: 40 60 80 100 Volts (VPP - HVOUT) HVOUT Characteristics VDD VDD VPP DATA INPUT DATA OUT GND GND Logic Inputs FIGURE 3-2: DS20005428A-page 8 HVOUT GND Logic Data Output High Voltage Outputs Input and Output Equivalent Circuits 2016 Microchip Technology Inc. HV7022 1/fCLK tWL CLK 50% 50% tSUD DATA INPUT tWH VIH 50% VIL tHD VIH 50% 50% VIL tDLH tDHL 90% DATA OUT VOH 90% 10% 10% tTLH tTHL VOL VOH HVOUT P-CH 10% VOL tHC tSUC VOH 90% HVOUT N-CH VOL VIH 50% POL 50% VIL VOH 90% HVOUT N-CH VOL tHP tSUP HVOUT P-CH SUP VOH 10% VOL VIH 50% OE 50% VOH 90% HVOUT 10% High Impedence tONH tOFFH 10% tONL VOL High Impedence 90% HVOUT FIGURE 3-3: VIL tHE tSUE VOH VOL tOFFL Switching Waveforms 2016 Microchip Technology Inc. DS20005428A-page 9 HV7022 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 44-lead PLCC XXXXXXXXXXX XXXXXXXXXXX XXXXXXXXX e3 YYWWNNN Legend: XX...X Y YY WW NNN e3 * Note: DS20005428A-page 10 Example HV7022PJ-C e3 1526343 Product Code or Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 2016 Microchip Technology Inc. HV7022 44-Lead PLCC Package Outline (PJ) .653x.653in body, .180in height (max), .050in pitch D D1 1 44 .048/.042 x 45O 6 .150 MAX .056/.042 x 45O 40 Note 1 (Index Area) .075 MAX E1 E Note 2 .020max (3 Places) Top View Vertical Side View View B b1 A Base Plane A2 .020 MIN Seating Plane e A1 b Horizontal Side View R View B Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging. Notes: 1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU a printed indicator. 2. $FWXDOVKDSHRIWKLVIHDWXUHPD\YDU\ Symbol MIN Dimension (inches) A A1 A2 b b1 D D1 E E1 .165 .090 .062 .013 .026 .685 .650 .685 .650 NOM .172 .105 - - - .690 .653 .690 .653 MAX .180 .120 .083 .021 .036† .695 .656 .695 .656 e R .025 .050 BSC .035 .045 JEDEC Registration MS-018, Variation AC, Issue A, June, 1993. † This dimension differs from the JEDEC drawing. Drawings not to scale. 2016 Microchip Technology Inc. DS20005428A-page 11 HV7022 APPENDIX A: REVISION HISTORY Revision A (February 2016) • Updated Supertex Doc.# DSFP-HV7022C to Microchip DS20005428A. • Changed part number from HV7022C to HV7022. • Removed 44-Lead Quad Cerpac package. • Minor text changes throughout. DS20005428A-page 12 2016 Microchip Technology Inc. HV7022 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. - PART NO. XX Device Package Options X Version - X - Environmental X Media Type Device: HV7022 = 34-Channel Symmetric Row Driver Package: PJ = 44-Lead PLCC Version C = Revision C Environmental G = Lead (Pb)-free/ROHS-compliant package Media Type: (blank) = 27/Tube for PJ package 2016 Microchip Technology Inc. Examples: a) HV7022PJ-C-G 44-Lead PLCC package, 27/Tube DS20005428A-page 13 Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == DS20005428A-page 14 Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0267-1 2016 Microchip Technology Inc. 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