NSC MM74C150J 16-line to 1-line multiplexer, tri-state16-line to 1-line Datasheet

MM54C150/MM74C150 16-Line to 1-Line Multiplexer
MM72C19/MM82C19 TRI-STATEÉ 16-Line to 1-Line
Multiplexer
General Description
The MM54C150/MM74C150 and MM72C19/MM82C19
multiplex 16 digital lines to 1 output. A 4-bit address code
determines the particular 1-of-16 inputs which is routed to
the output. The data is inverted from input to output.
A strobe override places the output of MM54C150/
MM74C150 in the logical ‘‘1’’ state and the output of
MM72C19/MM82C19 in the high-impedance state.
All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
Features
Y
Y
Y
Y
Wide supply voltage range
Guaranteed noise margin
High noise immunity
TTL compatibility
3.0V to 15V
1.0V
0.45 VCC (typ.)
Drive 1 TTL Load
Connection Diagram
Dual-In-Line Package
TL/F/5891 – 1
Order Number MM54C150, MM74C150, MM72C19 or MM82C19
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/5891
RRD-B30M105/Printed in U. S. A.
MM54C150/MM74C150 16-Line to 1-Line Multiplexer
MM72C19/MM82C19 TRI-STATE 16-Line to 1-Line Multiplexer
February 1988
Absolute Maximum Ratings
(Note 1)
Voltage at Any Pin
b 0.3V to VCC a 0.3V
Operating Temperature Range
MM54C150, MM72C19
MM74C150, MM82C19
b 65§ C to a 150§ C
Storage Temperature Range
Power Dissipation
Dual-In-Line
Small Outline
Operating VCC Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
b 55§ C to a 125§ C
b 40§ C to a 85§ C
700 mW
500 mW
VCC
Lead Temperature (soldering, 10 seconds)
3.0V to 15V
18V
260§ C
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS to CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VCC e 5.0V
VCC e 10V
VIN(0)
Logical ‘‘0’’ Input Voltage
VCC e 5.0V
VCC e 10V
VOUT(1)
Logical ‘‘1’’ Output Voltage
VCC e 5.0V, IO e b10 mA
VCC e 10V, IO e b10 mA
VOUT(0)
Logical ‘‘0’’ Output Voltage
VCC e 5.0V, IO e a 10 mA
VCC e 10V, IO e a 10 mA
IIN(1)
Logical ‘‘1’’ Input Current
VCC e 15V, VIN e 15V
IIN(0)
Logical ‘‘0’’ Input Current
VCC e 15V, VIN e 0V
b 1.0
b 0.005
IOZ
Output Current in High
Impedance State
MM72C19/MM82C19
VCC e 15V, VO e 15V
VCC e 15V, VO e 0V
b 1.0
b 0.005
ICC
Supply Current
3.5
8.0
V
V
1.5
2.0
4.5
9.0
V
V
0.5
1.0
0.005
0.005
VCC e 15V
V
V
0.05
1.0
V
V
V
mA
1.0
mA
mA
300
mA
CMOS/LPTTL Interface
VIN(1)
Logical ‘‘1’’ Input Voltage
54C, 72C, VCC e 4.5V
74C, 82C, VCC e 4.75V
VIN(0)
Logical ‘‘0’’ Input Voltage
54C, 72C, VCC e 4.5V
74C, 82C, VCC e 4.75V
VOUT(1)
Logical ‘‘1’’ Output Voltage
54C, 72C, VCC e 4.5V, IO e b1.6 mA
74C, 82C, VCC e 4.75V, IO e b1.6 mA
VOUT(0)
Logical ‘‘0’’ Output Voltage
54C, 72C, VCC e 4.5V, IO e 1.6 mA
74C, 82C, VCC e 4.75V, IO e 1.6 mA
VCCb1.5
VCCb1.5
V
V
0.8
0.8
2.4
2.4
V
V
V
V
0.4
0.4
V
V
Output Drive (Short Circuit Current)
ISOURCE
Output Source Current
(P-Channel)
VCC e 5.0V, VOUT e 0V, TA e 25§ C
ISOURCE
Output Source Current
(P-Channel)
VCC e 10V, VOUT e 0V, TA e 25§ C
ISINK
Output Sink Current
(N-Channel)
ISINK
Output Sink Current
(N-Channel)
b 4.35
b8
mA
b 20
b 40
mA
VCC e 5.0V, VOUT e VCC, TA e 25§ C
4.35
8
mA
VCC e 10V, VOUT e VCC, TA e 25§ C
20
40
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
2
AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
Typ
Max
Units
250
110
290
120
600
300
650
330
ns
ns
ns
ns
VCC e 5.0V
VCC e 10V
290
120
650
330
ns
ns
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’
from Strobe to Output
MM54C150/MM74C150
VCC e 5.0V
VCC e 10V
120
55
300
150
ns
ns
t1H, t0H
Delay from Strobe to High
Impedance State
MM72C19/MM82C19
VCC e 5.0V, RL e 10k, CL e 5 pF
VCC e 10V, RL e 10k, CL e 5 pF
80
60
200
150
ns
ns
tH1, tH0
Delay from Strobe to Logical
‘‘1’’ Level or to Logical ‘‘0’’
Level (from High Impedance State)
MM72C19/MM82C19
VCC e 5.0V, RL e 10k, CL e 5 pF
VCC e 10V, RL e 10k, CL e 5 pF
80
30
250
120
ns
ns
CIN
Input Capacitance
Any Input (Note 2)
5.0
pF
COUT
Output Capacitance
MM72C19/MM82C19
(Note 2)
11.0
pF
CPD
Power Dissipation Capacitance
(Note 3)
100
pF
tpd0, tpd1
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’
from Data Inputs to Output
VCC
VCC
VCC
VCC
tpd0, tpd1
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’
from Data Select Inputs to
Output
tpd0, tpd1
e
e
e
e
5.0V
10V
5.0V, CL e 150 pF
10V, CL e 150 pF
Min
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics, application note
AN-90.
3
Truth Table
MM54C150/MM74C150
Inputs
Output
D
C
B
A
STROBE
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
W
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
1*
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
*For MM72C19/MM82C19 this would be Hi-Z, everything else is the same.
Switching Time Waveforms
CMOS to CMOS
TL/F/5891 – 2
4
Switching Time Waveforms (Continued)
t1H and tH1
t1H
TL/F/5891 – 3
TL/F/5891 – 4
tH1
t0H and tH0
TL/F/5891 – 6
TL/F/5891 – 5
t0H
tH0
TL/F/5891 – 7
Note: Delays measured with input tr, tf s 20 ns.
TL/F/5891 – 8
5
Logic Diagrams
MM54C150/MM74C150
TL/F/5891 – 9
6
Logic Diagrams (Continued)
MM72C19/MM82C19
TL/F/5891 – 10
7
MM54C150/MM74C150 16-Line to 1-Line Multiplexer
MM72C19/MM82C19 TRI-STATE 16-Line to 1-Line Multiplexer
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C150J or MM74C150J, MM72C19J or MM82C19J
NS Package Number J24A
Molded Dual-In-Line Package (N)
Order Number MM54C150N, MM74C150N, MM72C19N or MM82C19N
NS Package Number N24A
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