TI1 BQ771800DPJT Internal delay timer Datasheet

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bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
bq7718xy Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries
with Internal Delay Timer
1 Features
3 Description
•
The bq7718xy family of products provides an
overvoltage monitor and protector for Li-Ion battery
pack systems. Each cell is monitored independently
for an overvoltage condition. For quicker productionline testing, the bq7718xy device provides a
Customer Test Mode (CTM) with greatly reduced
delay time.
1
•
•
•
•
•
•
2-, 3-, 4-, and 5-Series Cell Overvoltage
Protection
Internal Delay Timer
Fixed OVP Threshold
High-Accuracy Overvoltage Protection:
± 10 mV
Low Power Consumption ICC ≈ 1 µA
(VCELL(ALL) < VPROTECT)
Low Leakage Current Per Cell Input < 100 nA
Small Package Footprint
– 8-pin QFN (3.00 mm × 4.00 mm)
2 Applications
•
Protection in Li-Ion Battery Packs in:
– Power Tools
– UPS Battery Backup
– Light Electric Vehicles (eBike, eScooter, Pedal
Assist Bicycles)
In the bq7718xy device, an internal delay timer is
initiated upon detection of an overvoltage condition
on any cell. Upon expiration of the delay timer, the
output is triggered into its active state (either high or
low depending on the configuration).
Device Information Table(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
bq771800
QFN (8)
3.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet and the Device Comparison Table.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
6.1 Pin Details ................................................................. 4
10.1 Application Information.......................................... 11
10.2 Typical Applications .............................................. 12
10.3 Customer Test Mode ............................................ 12
7
Specifications......................................................... 6
11 Device and Documentation Support ................. 16
7.1 Absolute Maximum Ratings .....................................
7.2 Handling Ratings ......................................................
7.3 Recommended Operating Conditions......................
7.4 Thermal Information ..................................................
7.5 DC Characteristics ...................................................
8
1
1
1
2
3
4
6
6
6
6
7
Typical Characteristics.......................................... 9
9
Detailed Description ............................................ 10
9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
10 Application and Implementation........................ 11
11.1
11.2
11.3
11.4
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
16
16
16
16
12 Mechanical, Packaging, and Orderable
Information ........................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (August 2014) to Revision D
Page
•
Added the bq771815 device to Production Data.................................................................................................................... 3
•
Changed the Handling Ratings table ..................................................................................................................................... 6
•
Added note to the Application and Implementation section ................................................................................................ 11
Changes from Revision B (October 2013) to Revision C
Page
•
Changed the data sheet format ............................................................................................................................................. 1
•
Added the bq771807 device to Production Data.................................................................................................................... 3
Changes from Revision A (September 2013) to Revision B
•
Page
Added the bq771809 device to Production Data.................................................................................................................... 3
Changes from Original (December 2012) to Revision A
•
2
Page
Added the bq771808 device to Production Data.................................................................................................................... 3
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bq771809, bq771815
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5
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
Device Comparison Table
TA
–40°C to
110°C
OVP (V)
OV Hysteresis
(V)
Output
Delay
Output Drive
Tape and Reel
(Large)
Tape and Reel
(Small)
bq771800
4.300
0.300
4s
CMOS Active
High
bq771800DPJR
bq771800DPJT
bq771801
4.275
0.050
3s
NCH Active Low,
Open Drain
bq771801DPJR
bq771801DPJT
bq771802
4.225
0.300
1s
NCH Active Low,
Open Drain
bq771802DPJR
bq771802DPJT
bq771803
4.275
0.050
1s
NCH Active Low,
Open Drain
bq771803DPJR
bq771803DPJT
bq771804 (1)
4.225
0.300
3s
CMOS Active
High
bq771804DPJR
bq771804DPJT
bq771805 (1)
4.325
0.300
3s
CMOS Active
High
bq771805DPJR
bq771805DPJT
bq771806 (1)
4.350
0.300
3s
CMOS Active
High
bq771806DPJR
bq771806DPJT
bq771807
4.450
0.300
3s
CMOS Active
High
bq771807DPJR
bq771807DPJT
4.200
0.050
1s
NCH Active Low
bq771808DPJR
bq771808DPJT
bq771809DPJR
bq771809DPJT
Part Number
bq771808
Package
8-Pin QFN
Package
Designator
DPJ
bq771809
4.200
0.050
1s
CMOS Active
High
bq771810 (1)
4.200
0.250
1s
CMOS Active
High
bq771810DPJR
bq771810DPJT
bq771811 (1)
4.225
0.050
1s
CMOS Active
High
bq771811DPJR
bq771811DPJT
bq771812 (1)
4.250
0.050
1s
CMOS Active
High
bq771812DPJR
bq771812DPJT
bq771813 (1)
4.250
0.050
1s
CMOS Active
High
bq771813DPJR
bq771813DPJT
bq771814 (1)
3.900
0.300
3s
CMOS Active
High
bq771814DPJR
bq771814DPJT
bq771815
4.225
0.050
1s
NCH Active Low
bq771815DPJR
bq771815DPJT
bq771816 (1)
4.250
0.050
1s
NCH Active Low
bq771816DPJR
bq771816DPJT
1s
NCH, Active
Low, Open Drain
bq7718xyDPJR
bq7718xyDPJT
bq7718xy (2)
(1)
(2)
3.850–4.650
0–0.300
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Future option, contact TI.
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bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
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6 Pin Configuration and Functions
VDD
1
8
OUT
V5
2
7
VSS
V4
3
6
V1
V3
4
5
V2
Pin Functions
bq7718xy
Pin Name
Type I/O
1
VDD
P
Power supply
Description
2
V5
I
Sense input for positive voltage of the fifth cell from the bottom of the stack
3
V4
I
Sense input for positive voltage of the fourth cell from the bottom of the stack
4
V3
I
Sense input for positive voltage of the third cell from the bottom of the stack
5
V2
I
Sense input for positive voltage of the second cell from the bottom of the stack
6
V1
I
Sense input for positive voltage of the lowest cell in the stack
7
VSS
P
Electrically connected to IC ground and negative terminal of the lowest cell in the stack
8
OUT
O
Output drive for overvoltage fault signal
6.1 Pin Details
In the bq7718xy device, each cell is monitored independently. Overvoltage is detected by comparing the actual
cell voltage to a protection voltage reference, VOV. If any cell voltage exceeds the programmed OV value, a timer
circuit is activated. When the timer expires, the OUT pin goes from inactive to active state.
Cell Voltage (V)
(V5–V4, V4–V3, V 3–V2, V2–V1, V1–VSS)
For NCH Open Drain Active Low configurations, the OUT pin pulls down to VSS when active (OV present) and is
high impedance when inactive (no OV).
VOV
VOV –VHYS
tDELAY
OUT (V)
Figure 1. Timing for Overvoltage Sensing
6.1.1 Sense Positive Input for Vx
This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for
each input is required for noise filtering and stable voltage monitoring.
4
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SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
Pin Details (continued)
6.1.2 Output Drive, OUT
This pin serves as the fault signal output, and may be ordered in either active HIGH or LOW options.
6.1.3 Supply Input, VDD
This pin is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a
capacitor is connected to ground for noise filtering.
Copyright © 2012–2014, Texas Instruments Incorporated
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bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
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7 Specifications
7.1
Absolute Maximum Ratings
Over-operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Supply voltage range
VDD–VSS
–0.3
30
V
Input voltage range
V5–VSS or V4–VSS or
V3–VSS or V2–VSS or V1–VSS
–0.3
30
V
Output voltage range
OUT–VSS
–0.3
30
V
Continuous total power dissipation,
PTOT
See package dissipation rating.
Functional temperature
–40
110
°C
Storage temperature range, TSTG
–65
150
°C
Lead temperature (soldering, 10 s),
TSOLDER
300
(1)
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum–rated conditions for extended periods may affect device reliability.
7.2 Handling Ratings
TSTG
V(ESD)
Rating
(1)
(2)
Storage temperature range
Electrostatic discharge
Human body model (HBM) ESD stress voltage (1)
Charged device model (CDM) ESD stress voltage (2)
MIN
MAX
–65
150
UNIT
°C
–2
2
kV
–500
500
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3
Recommended Operating Conditions
Over-operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (1)
Input voltage range
V5–V4 or V4–V3 or
V3–V2 or V2–V1 or V1–VSS
Operating ambient temperature range, TA
(1)
MIN
MAX
UNIT
3
25
V
0
5
V
–40
110
°C
See Typical Applications.
7.4 Thermal Information
THERMAL METRIC (1)
bq7718xy
8 PINS
RθJA
Junction-to-ambient thermal resistance
56.6
RθJCtop
Junction-to-case(top) thermal resistance
56.4
RθJB
Junction-to-board thermal resistance
30.6
ψJT
Junction-to-top characterization parameter
1.0
ψJB
Junction-to-board characterization parameter
37.8
RθJCbot
Junction-to-case(bottom) thermal resistance
11.3
(1)
6
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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7.5
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
DC Characteristics
Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V
to 25 V (unless otherwise noted).
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Voltage Protection Threshold VCx
bq771800
4.300
V
bq771801
4.275
V
bq771803
4.275
V
bq771802
4.225
V
(1)
4.225
V
bq771805 (1)
4.325
V
bq771806 (1)
4.350
V
bq771807
4.450
V
bq771808
4.200
V
bq771809
4.200
V
(1)
4.200
V
bq771811 (1)
4.225
V
bq771812 (1)
4.250
V
bq771813 (1)
4.250
V
(1)
bq771804
V(PROTECT) Overvoltage
Detection
VOV
bq771810
bq771814
VHYS
OV Detection Hysteresis
3.900
V
bq771815
4.225
V
bq771816 (1)
4.250
V
bq771800
250
300
400
bq771801
0
50
100
V
bq771802
250
300
400
mV
bq771803
0
50
100
V
bq771804 (1)
250
300
400
mV
bq771805 (1)
250
300
400
mV
bq771806 (1)
250
300
400
mV
bq771807
250
300
400
mV
bq771808
0
50
100
V
bq771809
0
50
100
V
bq771810
OV Detection Accuracy
VOADRIFT
OV Detection Accuracy Across
Temperature
(1)
200
250
250
mV
bq771811 (1)
0
50
100
V
bq771812 (1)
0
50
100
V
bq771813
VOA
mV
(1)
0
50
100
V
bq771814 (1)
250
300
400
mV
bq771815
0
50
100
V
bq771816 (1)
0
50
100
V
TA = 25°C
–10
10
mV
TA = –40°C
–40
44
mV
TA = 0°C
–20
20
mV
TA = 60°C
–24
24
mV
TA = 110°C
–54
54
mV
2
µA
0.1
µA
Supply and Leakage Current
ICC
Supply Current
(V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) =
(V1–VSS) = 4.0 V (See Figure 12.)
IIN
Input Current at Vx Pins
(V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) =
(V1–VSS) = 4.0 V (See Figure 12.)
(1)
1
–0.1
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DC Characteristics (continued)
Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V
to 25 V (unless otherwise noted).
SYMBOL
PARAMETER
CONDITION
MIN
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V, IOH = 100 µA
6
TYP
MAX
UNIT
Output Drive OUT, CMOS Active HIGH Versions Only
Output Drive Voltage, Active
High
VOUT1
If three of four cells are short circuited and
only one cell remains powered and > VOV,
VDD = Vx (cell voltage), IOH = 100 µA
V
VDD – 0.3
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V, IOL = 100 µA
measured into pin
IOUTH1
OUT Source Current (during
OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V. OUT = 0 V.
Measured out of OUT pin
IOUTL1
OUT Sink Current (no OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V, OUT = VDD.
Measured into OUT pin
250
0.5
V
400
mV
4.5
mA
14
mA
400
mV
14
mA
100
nA
Output Drive OUT, NCH Open Drain Active LOW Versions Only
VOUT2
Output Drive Voltage, Active
Low
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V, IOL = 100 µA
measured into OUT pin
IOUTH2
OUT Sink Current (during OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V. OUT = VDD.
Measured into OUT pin
IOUTL2
OUT Source Current (no OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V. OUT = VDD.
Measured out of OUT pin
250
0.5
Delay Timer
tDELAY
OV Delay Time
XCTMDELAY
8
Fault Detection Delay Time
during Customer Test Mode
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bq771800
3.2
4
4.8
s
bq771801, bq771807
2.4
3
3.6
s
bq771802, bq771803, bq771815
0.8
1
1.2
s
Preview option only. Contact TI.
4.4
5.5
6.6
s
See Customer Test Mode.
15
ms
Copyright © 2012–2014, Texas Instruments Incorporated
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bq771803, bq771807, bq771808
bq771809, bq771815
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SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
8 Typical Characteristics
4.40
4.39
4.38
0.316
Mean
Min
Max
0.315
4.36
VHYS (V)
VOUT (V)
4.37
4.35
4.34
4.33
0.314
0.313
4.32
4.31
4.30
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.312
−50
−25
0
G001
Figure 2. Overvoltage Threshold (OVT) vs. Temperature
25
50
Temperature (°C)
75
100
125
G002
Figure 3. Hysteresis VHYS vs. Temperature
1.8
1.6
1.5
1.6
1.4
1.4
1.2
ICELL (µA)
IDD (µA)
1.3
1.1
1.0
1.2
1.0
0.9
0.8
0.8
0.7
0.6
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.6
−50
Figure 4. IDD Current Consumption vs.
Temperature at VDD = 16 V
8
−3.70
7
−3.72
25
50
Temperature (°C)
75
100
125
G004
6
−3.74
−3.76
VOUT (V)
IOUT (mA)
0
Figure 5. ICELL vs. Temperature
at VCELL= 9.2 V
−3.68
−3.78
−3.80
−3.82
5
4
3
2
−3.84
1
−3.86
−3.88
−50
−25
G003
−25
0
25
50
Temperature (°C)
75
Figure 6. Output Current IOUT vs.
Temperature
Copyright © 2012–2014, Texas Instruments Incorporated
100
125
G005
0
0
5
10
15
VDD (V)
20
25
30
G006
Figure 7. VOUT vs. VDD
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SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
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9 Detailed Description
9.1 Overview
In the bq7718xy family of devices, each cell is monitored independently and an external delay timer is initiated if
an overvoltage condition is detected on any cell.
For quicker production-line testing, the device provides a Customer Test Mode with greatly reduced delay time.
9.2 Functional Block Diagram
PACK+
RVD
C VD
VDD
RIN
V5
CIN
RIN
CIN
RIN
V3
CIN
RIN
V2
Sensing Circuit
V4
REG
INT_EN
VOV
Delay
Timer
OUT
CIN
RIN
V1
OSC
CIN
VSS
PACK–
10
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bq771803, bq771807, bq771808
bq771809, bq771815
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SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
In the case of an Open Drain Active Low configuration, an external pull-up resistor is required on the OUT pin.
Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements.
C VD
VDD
OUT
V5
VSS
V4
V1
V3
V2
RVD
Cell5
R IN
Cell4
R IN
Cell3
CIN
CIN
R IN
CIN
Cell2
R IN
CIN
Cell1
R IN
CIN
Figure 8. Application Configuration
Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Figure 8 shows each
external component.
Table 1. Parameters
PARAMETER
EXTERNAL COMPONENT
MIN
NOM
MAX
Voltage monitor filter resistance
RIN
900
1000
1100
UNIT
Ω
Voltage monitor filter capacitance
CIN
0.01
0.1
µF
Supply voltage filter resistance
RVD
100
Supply voltage filter capacitance
CVD
1K
0.1
CD external delay capacitance
0.1
OUT Open drain version pull-up resistance
to PACK+
100
Ω
µF
1
µF
kΩ
NOTE
The device is calibrated using an RIN value = 1 kΩ. Using a value other than this
recommended value changes the accuracy of the cell voltage measurements and VOV
trigger level.
Copyright © 2012–2014, Texas Instruments Incorporated
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11
bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
www.ti.com
10.2 Typical Applications
In these application examples, an external pull-up resistor is required on the OUT pin to configure for an Open
Drain Active Low operation.
C VD
C VD
VDD
OUT
VSS
V5
VSS
V4
V1
V4
V1
V3
V2
V3
V2
VDD
OUT
V5
RVD
R VD
Cell 4
RIN
CIN
RIN
RIN
CIN
Cell3
RIN
CIN
Cell2
RIN
CIN
Cell1
Cell 3
Cell 2
Cell 1
CIN
RIN
RIN
CIN
CIN
Figure 10. 3-Series Cell Configuration with Fixed Delay
Figure 9. 4-Series Cell Configuration
C VD
VDD
OUT
V5
VSS
V4
V1
V5
V2
RVD
Cell2
RIN
CIN
RIN
CIN
Cell1
Figure 11. 2-Series Cell Configuration with Internal Fixed Delay
10.3 Customer Test Mode
Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay timer parameter once
the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10 V higher than V5
(see Figure 12). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal
operation. To exit Customer Test Mode, remove the VDD to a V5 voltage differential of 10 V so that the decrease
in this value automatically causes an exit.
12
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bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
www.ti.com
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
Customer Test Mode (continued)
CAUTION
Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part
into Customer Test Mode. Also avoid exceeding Absolute Maximum Voltages for the
individual cell voltages (V5–V4), (V4–V3), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS).
Stressing the pins beyond the rated limits may cause permanent damage to the
device.
Figure 12 shows the timing for the Customer Test Mode.
Cell Voltage (V)
(V5–V4, V4–V3, V3–V2, V2–V1, V1–VSS)
10 V
VOV
VOV – VHYS
> 10 ms
OUT (V)
Figure 12. Timing for Customer Test Mode
Copyright © 2012–2014, Texas Instruments Incorporated
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bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
www.ti.com
Customer Test Mode (continued)
Figure 13 shows the measurement for current consumption for the product for both VDD and Vx.
VDD
OUT
V5
VSS
I IN
V4
V1
I IN
V3
V2
ICC
I IN
Cell5
Cell 4
Cell 3
I IN
Cell 2
IIN
Cell 1
Figure 13. Configuration for IC Current Consumption Test
14
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bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
www.ti.com
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
Customer Test Mode (continued)
10.3.1 Application Curves
4.40
4.39
4.38
0.316
Mean
Min
Max
0.315
4.36
VHYS (V)
VOUT (V)
4.37
4.35
4.34
4.33
0.314
0.313
4.32
4.31
4.30
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.312
−50
−25
0
G001
Figure 14. Overvoltage Threshold (OVT) vs. Temperature
25
50
Temperature (°C)
75
100
125
G002
Figure 15. Hysteresis VHYS vs. Temperature
1.6
1.8
1.5
1.6
1.4
1.4
1.2
ICELL (µA)
IDD (µA)
1.3
1.1
1.0
1.2
1.0
0.9
0.8
0.8
0.7
0.6
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.6
−50
Figure 16. IDD Current Consumption vs.
Temperature at VDD = 16 V
8
−3.70
7
−3.72
25
50
Temperature (°C)
75
100
125
G004
6
−3.74
−3.76
VOUT (V)
IOUT (mA)
0
Figure 17. ICELL vs. Temperature
at VCELL= 9.2 V
−3.68
−3.78
−3.80
−3.82
5
4
3
2
−3.84
1
−3.86
−3.88
−50
−25
G003
−25
0
25
50
Temperature (°C)
75
100
Figure 18. Output Current IOUT vs.
Temperature
Copyright © 2012–2014, Texas Instruments Incorporated
125
G005
0
0
5
10
15
VDD (V)
20
25
30
G006
Figure 19. VOUT vs. VDD
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bq771800, bq771801, bq771802
bq771803, bq771807, bq771808
bq771809, bq771815
SLUSAX1D – DECEMBER 2012 – REVISED NOVEMBER 2014
www.ti.com
11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
bq771800
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bq771801
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bq771802
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bq771803
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bq771807
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bq771808
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bq771809
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bq771815
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11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Feb-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ771800DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771800
BQ771800DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771800
BQ771801DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771801
BQ771801DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771801
BQ771802DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771802
BQ771802DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771802
BQ771803DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771803
BQ771803DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
771803
BQ771807DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771807
BQ771807DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771807
BQ771808DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771808
BQ771808DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771808
BQ771809DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771809
BQ771809DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771809
BQ771815DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771815
BQ771815DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771815
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Feb-2016
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Feb-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
BQ771800DPJR
WSON
DPJ
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771800DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771801DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771801DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771802DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771802DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771803DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771803DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771807DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771807DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771808DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771808DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771809DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771809DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771815DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771815DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Feb-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ771800DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771800DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771801DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771801DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771802DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771802DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771803DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771803DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771807DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771807DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771808DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771808DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771809DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771809DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771815DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771815DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
Pack Materials-Page 2
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