Intersil CA0723CE Voltage regulators adjustable from 2v to 37v at output currents up to 150ma without external pass transistor Datasheet

CA723, CA723C
Data Sheet
Voltage Regulators Adjustable from 2V to
37V at Output Currents Up to 150mA
without External Pass Transistors
The CA723 and CA723C are silicon monolithic integrated
circuits designed for service as voltage regulators at output
voltages ranging from 2V to 37V at currents up to 150mA.
Each type includes a temperature-compensated reference
amplifier, an error amplifier, a power series pass transistor,
and a current-limiting circuit. They also provide
independently accessible inputs for adjustable current
limiting and remote shutdown and, in addition, feature low
standby current drain, low temperature drift, and high ripple
rejection.
The CA723 and CA723C may be used with positive and
negative power supplies in a wide variety of series, shunt,
switching, and floating regulator applications. They can
provide regulation at load currents greater than 150mA and
in excess of 10A with the use of suitable NPN or PNP
external pass transistors.
Ordering Information
PART
NUMBER
TEMP. RANGE
(oC)
April 1999
File Number
Features
• Up to 150mA Output Current
• Positive and Negative Voltage Regulation
• Regulation in Excess of 10A with Suitable Pass
Transistors
• Input and Output Short-Circuit Protection
• Load and Line Regulation . . . . . . . . . . . . . . . . . . . .0.03%
• Direct Replacement for 723 and 723C Industry Types
• Adjustable Output Voltage . . . . . . . . . . . . . . . . . 2V to 37V
Applications
• Series and Shunt Voltage Regulator
• Floating Regulator
• Switching Voltage Regulator
• High-Current Voltage Regulator
• Temperature Controller
Pinouts
PACKAGE
CA723 (PDIP)
TOP VIEW
PKG. NO.
CA0723E
-55 to 125
14 Ld PDIP
E14.3
CA0723T
-55 to 125
10 Pin Can
T10.C
0 to 70
14 Ld PDIP
E14.3
14 NC
NC 1
CA0723CE
788.4
CURRENT 2
LIMIT
13 FREQ
COMP
CURRENT 3
SENSE
12 V+ UNREG
INPUT
INV 4
INPUT
-
11 VC
+
10 VO
ERROR
AMP
NON-INV 5
INPUT
VOLT
REF
VREF 6
9 VZ
8 NC
V- 7
CA723C (CAN)
TOP VIEW
CURRENT LIMIT
TAB
10
CURRENT
FREQ
9 COMP
SENSE 1
INV
INPUT 2
V+
8 UNREG
INPUT
+
ERROR
AMP
NON-INV 3
INPUT
-
7 VC
VOLT
REF
VREF 4
6
5
VO
V-, (CASE INTERNALLY
CONNECTED TO TERM 5)
3-3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
CA723, CA723C
Functional Block Diagram
V+
TEMPERATURECOMPENSATED
ZENER
FREQUENCY
UNREGULATED COMPENSATION
INPUT
INVERTING
INPUT
VOLT
REF
AMP
VC
ERROR
AMP
+
VREF
SERIES PASS
TRANSISTOR
NON-INVERTING
INPUT
VO REGULATED
OUTPUT
VZ
CURRENT
SENSE
CURRENT
LIMITER
CURRENT
LIMIT
V-
V+
VC
UNREGULATED
INPUT
R1
500Ω
R5
1kΩ
R4
1kΩ
R3
25kΩ
Q8
Q3
Q7
D3
D1
6.2V
R2
15kΩ
Q4
Q14
Q15
Q9
R12
15kΩ
R6
100Ω
C1
5pF
Q1
D4
Q10
D2
6.2V
Q6
R7
30kΩ
VO
Q11 Q12
Q5
R9
300Ω
R8
5kΩ
VREF
VZ
Q13
R10
20kΩ
R11
150Ω
Q16
CURRENT
SENSE
NON-INVERTING VINPUT
INVERTING
INPUT
FIGURE 1. EQUIVALENT SCHEMATIC DIAGRAM OF THE CA723 AND CA723C
3-4
FREQUENCY
COMPENSATION
CURRENT
LIMIT
CA723, CA723C
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40V
(Between V+ and V- Terminals)
Pulse Voltage for 50ms
Pulse Width (Between V+ and V- Terminals) . . . . . . . . . . . . . .50V
Differential Input-Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . .40V
Differential Input Voltage
Between Inverting and Noninverting Inputs . . . . . . . . . . . . . . ±5V
Between Noninverting Input and V- . . . . . . . . . . . . . . . . . . . . . .8V
Current From Zener Diode Terminal (VZ) . . . . . . . . . . . . . . . . 25mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
120
N/A
Metal Can. . . . . . . . . . . . . . . . . . . . . . .
136
65
Device Dissipation
CA723T, Up to TA = 25oC . . . . . . . . . . . . . . . . . . . . . . . . .900mW
CA723E, CA723CE, Up to TA = 25oC . . . . . . . . . . . . . . .1000mW
CA723T, Above TA = 25oC . . . . . . . . . . . . . . . . . . . . . . 7.4mW/oC
CA723E, CA723CE, Above TA = 25oC . . . . . . . . . . . . 8.3mW/oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature, During Soldering . . . . . . . . . . 265oC
At a distance 1/16” ± 1/32” (1.59mm ± 0.79mm) from case
for 10s Max
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
TA = 25oC, V+ = VC = VI = 12V, V- = 0, VO = 5V, IL = 1mA, C1 = 100pF, CREF = 0, RSCP = 0,
Unless Otherwise Specified. Divider impedance R1 R2 ÷ R1 + R2 at noninverting input,
Terminal 5 = 10kΩ. (Figure 20)
CA723
PARAMETER
TEST CONDITION
CA723C
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
-
2.3
3.5
-
2.3
4
mA
9.5
-
40
9.5
-
40
V
Output Voltage Range, VO
2
-
37
2
-
37
V
Differential Input-Output Voltage, VI - VO
3
-
38
3
-
38
V
6.95
7.15
7.35
6.8
7.15
7.5
V
VI = 12V to 40V
-
0.02
0.2
-
0.1
0.5
% VO
VI = 12V to 15V
-
0.01
0.1
-
0.01
0.1
% VO
VI = 12V to 15V,
TA = -55oC to 125oC
-
-
0.3
-
-
-
% VO
VI = 12V to 15V,
TA = 0oC to 70oC
-
-
-
-
-
0.3
% VO
IL = 1mA to 50mA
-
0.03
0.15
-
0.03
0.2
% VO
IL = 1mA to 50mA,
TA = -55oC to 125oC
-
-
0.6
-
-
-
% VO
IL = 1mA to 50mA,
TA = 0oC to 70oC
-
-
-
-
-
0.6
% VO
TA = -55oC to 125oC
-
0.002
0.015
-
-
-
%/oC
TA = 0oC to 70oC
-
-
-
-
0.003
0.015
%/oC
f = 50Hz to 10kHz
-
74
-
-
74
-
dB
f = 50Hz to 10kHz,
CREF = 5µF
-
86
-
-
86
-
dB
RSCP = 10Ω, VO = 0
-
65
-
-
65
-
mA
DC CHARACTERISTICS
Quiescent Regulator Current, IQ
IL = 0, VI = 30V
Input Voltage Range, VI
Reference Voltage, VREF
Line Regulation (Note 2)
Load Regulation (Note 2)
Output-Voltage Temperature Coefficient,
∆VO
Ripple Rejection (Note 3)
Short Circuit Limiting Current, ILIM
3-5
CA723, CA723C
DC Electrical Specifications
TA = 25oC, V+ = VC = VI = 12V, V- = 0, VO = 5V, IL = 1mA, C1 = 100pF, CREF = 0, RSCP = 0,
Unless Otherwise Specified. Divider impedance R1 R2 ÷ R1 + R2 at noninverting input,
Terminal 5 = 10kΩ. (Figure 20) (Continued)
CA723
PARAMETER
TEST CONDITION
CA723C
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Equivalent Noise RMS Output Voltage, VN BW = 100Hz to 10kHz,
(Note 3)
CREF = 0
-
-20
-
-
20
-
µV
BW = 100Hz to 10kHz,
CREF = 5µF
-
2.5
-
-
2.5
-
µV
NOTES:
2. Line and load regulation specifications are given for condition of a constant chip temperature. For high dissipation condition, temperature drifts
must be separately taken into account.
3. For CREF (See Figure 20)
MAX JUNCTION TEMP (TJ) = 150oC
THERMAL RESISTANCE = 150oC/W
QUIESCENT DISSIPATION (PQ) = 60mW
(NO HEAT SINK)
150
AMBIENT TEMPERATURE (TA) = 25oC
100
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
0.05
50
LOAD REGULATION (VO)
MAXIMUM LOAD CURRENT (mA)
Typical Performance Curves (CA723)
0
AMBIENT TEMPERATURE
(TA) = 25oC
-0.05
-55oC
-0.1
125oC
-0.15
125oC
-0.2
0
0
10
20
30
40
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
FIGURE 2. MAX LOAD CURRENT vs DIFFERENTIAL INPUTOUTPUT VOLTAGE
0.05
-0.1
-55oC
AMBIENT TEMP (TA) = 25oC
-0.15
125oC
-0.2
0
5
10
15
20
OUTPUT CURRENT (mA)
25
30
FIGURE 4. LOAD REGULATION WITH CURRENT LIMITING
3-6
100
0
AMBIENT TEMPERATURE (TA) = -55oC
-0.1
0.2
25oC
-0.3
-0.25
40
60
80
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
0.1
LOAD REGULATION (VO)
-0.05
20
FIGURE 3. LOAD REGULATION WITHOUT CURRENT LIMITING
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10Ω
0
LOAD REGULATION (VO)
0
125oC
-0.4
0
20
40
60
80
100
OUTPUT CURRENT (mA)
FIGURE 5. LOAD REGULATION WITH CURRENT LIMITING
CA723, CA723C
Typical Performance Curves (CA723)
(Continued)
0.4
125oC
0.2
0
0
20
40
60
80
QUIESCENT CURRENT (mA)
0.6
AMBIENT TEMPERATURE (TA) = -55oC
0.8
25oC
OUTPUT VOLTAGE (V)
1.0
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10Ω
1.2
OUTPUT VOLTAGE (VO) = REFERENCE
VOLTAGE (VREF)
LOAD CIRCUIT (IL) = 0
5
4
AMBIENT TEMPERATURE (TA) = -55oC
3
25oC
2
125oC
1
0
100
0
10
OUTPUT CURRENT (mA)
CURRENT LIMITING CHARACTERISTICS
MAX. JUNCTION TEMP. (TJ) = 150oC
THERMAL RESISTANCE = 150oC/W
QUIESCENT DISSIPATION (PQ) = 60mW
TO-5 STYLE PACKAGE WITH NO HEAT SINK
150
40
100
AMBIENT TEMPERATURE (TA) = 25oC
50
MAX. JUNCTION TEMP. (TJ) = 125oC
THERMAL RESISTANCE = 125oC/W
QUIESCENT DISSIPATION (PQ) = 60mW
DUAL - IN - LINE PLASTIC PACKAGE
WITH NO HEAT SINK
150
100
AMBIENT TEMPERATURE (TA) = 25oC
50
70oC
70oC
0
0
0
10
20
30
40
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
FIGURE 8. MAX LOAD CURRENT vs DIFFERENTIAL INPUTOUTPUT VOLTAGE
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
AMBIENT TEMPERATURE (TA) = 25oC
0
0oC
70oC
-0.1
20
40
10
30
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
FIGURE 9. MAX LOAD CURRENT vs DIFFERENTIAL INPUTOUTPUT VOLTAGE FOR CA723CE
LOAD REGULATION (VO)
0
LOAD REGULATION (VO)
30
FIGURE 7. QUIESCENT CURRENT vs INPUT VOLTAGE
MAXIMUM LOAD CURRENT (mA)
MAXIMUM LOAD CURRENT (mA)
FIGURE 6.
20
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10Ω
AMBIENT TEMPERATURE (TA) = 25oC
0
0oC
-0.1
70oC
-0.2
0
20
40
60
80
100
OUTPUT CURRENT (mA)
FIGURE 10. LOAD REGULATION WITHOUT CURRENT
LIMITING
3-7
-0.2
0
10
20
OUTPUT CURRENT (mA)
30
FIGURE 11. LOAD REGULATION WITH CURRENT LIMITING
CA723, CA723C
1.2
OUTPUT VOLTAGE (VO) = 5V
INPUT VOLTAGE (VI) = 12V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10
AMBIENT TEMPERATURE (TA) = 25oC
1.0
OUTPUT VOLTAGE (V)
(Continued)
0.8
0.6
0.4
QUIESCENT CURRENT (mA)
Typical Performance Curves (CA723)
0.2
OUTPUT VOLTAGE (VO) = REFERENCE
VOLTAGE (VREF)
LOAD CURRENT (IL) = 0
5
4
AMBIENT TEMPERATURE (TA) = 25oC
3
0oC
2
70oC
1
70oC
0oC
0
0
0
10
FIGURE 12.
20
40
60
OUTPUT CURRENT (mA)
80
0
100
CURRENT LIMITING CHARACTERISTICS
10
20
30
INPUT VOLTAGE (V)
40
FIGURE 13. QUIESCENT CURRENT vs INPUT VOLTAGE
Typical Performance Curves (CA723 and CA723C)
INPUT VOLTAGE (VI) = 12V
OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = I TO 50mA
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
0
-0.1
0.1
0
-0.2
-0.1
-0.3
-0.2
-5
5
15
25
35
45
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
-5
5
15
25
35
45
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
LOAD CURRENT (IL)
10
10
0
5
OUTPUT VOLTAGE (VO)
-10
0
-20
5
-30
10
-5
5
15
25
TIME (µs)
35
45
FIGURE 16. LINE TRANSIENT RESPONSE
3-8
LOAD DEVIATION (mA)
15
INPUT VOLTAGE (V I) = 12V, OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = 40mA
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PROTECTION RESISTANCE (RSCP) = 0
FIGURE 15. LINE REGULATION vs DIFFERENTIAL INPUTOUTPUT VOLTAGE
CURRENT LIMITING SENSE VOLTAGE (V)
FIGURE 14. LOAD REGULATION vs DIFFERENTIAL INPUTOUTPUT VOLTAGE
OUTPUT VOLTAGE DEVIATION (mA)
0.2
0.8
200
CURRENT LIMITING
SENSE VOLTAGE
160
0.7
120
0.6
0.5
0.4
SHORT CIRCUIT LIMITING
CURRENT WITH RSCP = 5Ω
WITH RSCP = 10Ω
0.3
80
40
0
-50
0
50
100
150
JUNCTION TEMPERATURE (oC)
FIGURE 17. CURRENT LIMITING CHARACTERISTIC vs
JUNCTION TEMPERATURE
SHORT CIRCUIT LIMITING CURRENT (mA)
0.1
0.3
LINE REGULATION (VO)
LOAD REGULATION (VO)
0.2
OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = 1mA
AMBIENT TEMPERATURE (TA) = 25oC
DIFFERENTIAL INPUT VOLTAGE (∆VT) = 3V
SHORT CIRCUIT PROTECTION RESISTANCE
(RSCP) = 0
CA723, CA723C
Typical Performance Curves (CA723 and CA723C)
(Continued)
6
INPUT VOLTAGE (VI)
2
4
0
2
OUTPUT VOLTAGE (VO)
-2
0
INPUT VOLTAGE (VI) = 12V
OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = 1mA
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PROTECTION RESISTANCE
(RSCP) = 0
-2
-4
-5
5
15
FIGURE 18.
25
TIME (µs)
35
-4
-6
45
LOAD TRANSIENT RESPONSE
OUTPUT IMPEDANCE (W)
4
INPUT VOLTAGE DEVIATION (V)
OUTPUT VOLTAGE DEVIATION (mA)
10
8 INPUT VOLTAGE (VI) = 12V
6 OUTPUT VOLTAGE (V ) = 5V
O
4 LOAD CURRENT (I ) = 50mA
L
o
2 AMBIENT TEMPERATURE (TA) = 25 C
SHORT CIRCUIT PROTECTION
1 RESISTANCE (RSCP) = 0
8
6
4
LOAD CAPACITANCE (CL) = 0
2
0.1
1µF
8
6
4
2
0.01
2
100
4 6 8
1k
2
4 68
2
4 68
2
10k
100k
FREQUENCY (Hz)
4 6 8
1M
FIGURE 19. OUTPUT IMPEDANCE vs FREQUENCY
Typical Application Circuits
V+
VI
VC
VI
VREF
V+
VC
VREF
VO
VO
RSCP
CURRENT
LIMIT
R1
NON
INV
INPUT
CREF
R2
RSCP
REGULATED
OUTPUT
R3
CURRENT
R3
SENSE
INV.
INPUT
V-
C1
100pF
NON
INV
INPUT
Note: R3 =
R1 R2 For Minimum Temperature Drift
R1 + R2
FIGURE 20. LOW VOLTAGE REGULATOR CIRCUIT
(VO = 2V TO 7V)
3-9
REGULATED
OUTPUT 15V
CURRENT
SENSE
R1
C1
100pF
INV.
INPUT
V-
R2
COMP
COMP
Circuit Performance Data:
Regulated Output Voltage 5V
Line Regulation (∆VI= 3V) 0.5mV
Load Regulation (∆IL = 50mA) 1.5mV
CURRENT
LIMIT
Circuit Performance Data:
Line Regulation (∆VI = 3V) 1.5mV
Load Regulation (∆IL = 50mA) 4.5mV
R1 R2 For Minimum Temperature Drift
R1 + R2
R3 May Be Eliminated For Minimum Component Count
Note: R3 =
FIGURE 21. HIGH VOLTAGE REGULATOR CIRCUIT
(VO = 7V TO 37V)
CA723, CA723C
Typical Application Circuits
V+
R2
(Continued)
VC
VI
VI
VREF
VZ
R5
2kΩ
VC
V+
VREF
VO
VO
R4
3kΩ
CURRENT
LIMIT
CURRENT
SENSE
R3
3kΩ
R1
NON
INV.
INPUT
VC1
100pF
INV.
INPUT
COMP
NON
INV
INPUT
REGULATED
OUTPUT-15V
Circuit Performance Data:
Line Regulation (∆VI = 3V) 1mV
Load Regulation (∆IL = 100mA) 2mV
Note: For Applications Employing the TO-5 Style Package
and Where VZ Is Required, An External; 6.2V Zener Diode
Should be Connected in Series with VO (Terminal 6).
FIGURE 22. NEGATIVE VOLTAGE REGULATOR CIRCUIT
V-
CURRENT
SENSE
R1
INV.
INPUT
COMP
C1
100pF
R2
FIGURE 23. POSITIVE VOLTAGE REGULATOR CIRCUIT (WITH
EXTERNAL NPN PASS TRANSISTOR)
VI
R3
60Ω
VC
REGULATED
OUTPUT 15V
Circuit Performance Data:
Line Regulation (∆VI = 3V) 1.5mV
Load Regulation (∆IL = 1A) 15mV
VI
V+
VREF
CURRENT R
SCP
LIMIT
VO
2N5956
OR
2N6108
V+
VREF
VC
REGULATED
OUTPUT 5V
VO
R3
2.7kΩ
R1
CURRENT
LIMIT
CURRENT
SENSE
R2
NON
INV
INPUT
V-
RSCP
INV.
INPUT
COMP
C1
0.001µF
REGULATED
OUTPUT 5V
Circuit Performance Data:
Line Regulation (∆VI = 3V) 0.5mV
Load Regulation (∆IL = 1A) 5mV
FIGURE 24.
POSITIVE VOLTRAGE REGULATOR CIRCUIT
(WITH EXTERNAL PNP PASS TRANSISTOR)
3-10
CURRENT
LIMIT
R1
RSCP
30Ω
R4
5.6kΩ
CURRENT
SENSE
R2
NON
INV
INPUT
V-
INV.
COMP INPUT
C1
0.001µF
Circuit Performance Data:
Line Regulation (∆V = 3V) 0.5mV
Load Regulation (∆IL = 10mA) 1mV
Short Circuit Current 20mA
FIGURE 25. FOLDBACK CURRENT LIMITING CIRCUIT
CA723, CA723C
Typical Application Circuits
(Continued)
R5
10kΩ
R5
3.9kΩ
V+
VC
VREF
R1
D1
12V
SK3062
R3
3kΩ
TI
2N3442
RSCP
1Ω
CURRENT
LIMIT
CURRENT
SENSE
NON
INV.
INPUT
R2
COMP
R6
10kΩ
VO
R3
3kΩ
D1
12V
SK3062
NON
INV.
INPUT
R4
3kΩ
R1
V-
VI
VZ
INV.
INPUT
R2
VC
VREF
VO
VZ
R4
3kΩ
V+
VI = 85V
C1
0.001µF
TI
2N6211
CURRENT
LIMIT
CURRENT
SENSE
INV.
INPUT
C1
0.001µF
V-
COMP
REGULATED
OUTPUT-50V
REGULATED
OUTPUT-100V
Circuit Performance Data:
Line Regulation (∆V = 20V) 15mV
Load Regulation (∆IL = 50mA) 20mV
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode should
be connected in series with VO (terminal 6)
Circuit Performance Data:
Line Regulation (∆VI = 20V) 30mV
Load Regulation (∆IL =100mA) 20mV
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode should
be connected in series with VO (terminal 6)
FIGURE 26. POSITIVE FLOATING REGULATOR CIRCUIT
FIGURE 27. NEGATIVE FLOATING REGULATOR CIRCUIT
VI
VREF
VI
V+
VC
VO RSCP NOTE 2
V+
VREF
VC
R3
VZ 100Ω
REGULATED
OUTPUT 5V
CURRENT
LIMIT
R1
NON
INV
INPUT
R1
REGULATED
OUTPUT 5V
CURRENT LIMIT
CURRENT SENSE
INV.
INPUT R3
COMP
VC1
0.001µF
R4
100Ω
C
CURRENT
SENSE
R2
VO
2kΩ
TI
2N3053
R2
R4
2.kΩ
CCSL
LOGIC
INPUT
Circuit Performance Data:
Line Regulation (∆VI = 3V) 0.5mV
Load Regulation (∆IL = 50mA) 1.5mV
Short Circuit Current 20mA
NOTE: 1. A current limiting transistor may be used for shutdown if
current limiting is not required.
2. Add a diode if VO > 10V.
FIGURE 28. REMOTE SHUTDOWN REGULATOR CIRCUIT
WITH CURRENT LIMITING
INV
INPUT
V-
NON INV.
COMP INPUT
C1
0.005µF
Circuit Performance Data:
Line Regulation (∆VI = 10V) 0.5mV
Load Regulation (∆IL = 100mA) 1.5mV
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode
should be connected in series with VO (terminal 6).
FIGURE 29. SHUNT REGULATOR CIRCUIT
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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