ETC PT7M7803RT

Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Features
Introduction
• Precision supply-voltage monitor
The PT7M7xxx family microprocessor (µP)
- 4.63V (PT7M7xxxL)
supervisory circuits are targeted to improve reliability
- 4.38V (PT7M7xxxM)
and accuracy of power-supply circuitry in µP systems.
- 3.08V (PT7M7xxxT)
These devices reduce the complexity and number of
- 2.93V (PT7M7xxxS)
components required to monitor power-supply and
- 2.63V (PT7M7xxxR)
battery functions.
- 2.32V (PT7M7xxxZ)
The main functions are:
- 2.20V (PT7M7xxxY)
1. Asserting reset output during power-up, power-
• 200ms reset pulse width
down and brownout conditions for µP system;
• Debounced CMOS-compatible manual-reset input
2. Detecting power failure or low-battery conditions
(7811, 7812, 7823, 7825, 7342-7344)
with a 1.25V threshold detector;
• Reset Output Signal for Watchdog and Power
3. Watchdog functions;
Abnormal, Manual Reset
4. Manual reset.
• Reset Push-Pull output (PT7M7809,7811,7823,
7824,7825,7342,7345)
Applications
• Reset Open-Drain output (PT7M7803/7343)
• Power-supply circuitry in µP systems
• Voltage monitor for power-fail or low battery warning
• Guaranteed RESET/RESET valid at VCC = 1.0V
Ordering Information
RESET output
Part No.
1
2
3
4
5
6
7
8
9
10
11
12
PT7M7803XT
PT7M7809XT
PT7M7810XT
PT7M7811XT
PT7M7812XT
PT7M7823XT
PT7M7824XT
PT7M7825XT
PT7M7342XT
PT7M7343XT
PT7M7344XT
PT7M7345XT
Push-Pull
Open-Drain
-
√
-
√
√
√
√
√
√
-
√
-
Manual Reset
Input
√
√
√
-
√
√
√
-
√
-
√
RESET
output
(push-pull)
-
√
√
√
√
√
√
-
T
3.08
S
2.93
Power Fail
Detector
(1.25V)
√
√
√
√
Watchdog
Input
√
√
-
Package
SOT23-3
SOT23-5
SOT23-6
Suffix: X -- Monitored Voltage
Suffix X
Reset threshold (V)
PT0109(02/03)
L
4.63
M
4.38
1
R
2.63
Z
2.32
Y
2.20
Ver:1
Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Contents
Features ....................................................................................................................................................... 1
Ordering Information .................................................................................................................................. 1
Introduction ................................................................................................................................................. 1
Block Diagram ............................................................................................................................................ 3
Marking Information ................................................................................................................................... 4
Pin Information ........................................................................................................................................... 5
Pin Configuration .............................................................................................................................. 5
Pin Description .................................................................................................................................. 6
Functional Description ................................................................................................................................ 7
Reset Output ...................................................................................................................................... 7
Watchdog Timer ................................................................................................................................ 7
Manual Reset ..................................................................................................................................... 7
Power-Fail Comparator ..................................................................................................................... 7
Recommended Operation Condition ................................................................................................. 8
Detailed Specifications ................................................................................................................................ 8
Absolute Maximum Ratings .............................................................................................................. 8
DC Electrical Characteristics ............................................................................................................. 9
AC Electrical Characteristics ........................................................................................................... 10
Mechanical Information ............................................................................................................................ 11
Notes ......................................................................................................................................................... 14
PT0109(02/03)
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Block Diagram
Figure 1. Block Diagram
WDI
Watchdog
Transition Detector
Watchdog Timer
V cc
Timebase for Reset
& Watchdog
MR
Reset Generator
Vcc
RESET
(RESET)
V RST
PFI
PFO
1.25V
PT0109(02/03)
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Marking Information
1
2
3
4
C od e
Descr ip t ion
12
Part Number
3
Year
4
Work Week
Part Number Code
Code 1 2
Part No.
AA
PT7M7809L
AB
AC
AD
AE
Code 1 2
Part No.
Code 1 2
Part No.
BC
PT7M7803L
CE
PT7M7342L
PT7M7809M
BD
PT7M7803M
CF
PT7M7342M
PT7M7809T
BE
PT7M7803T
CG
PT7M7342T
PT7M7809S
BF
PT7M7803S
CH
PT7M7342S
PT7M7809R
BG
PT7M7803R
CI
PT7M7342R
PT7M7803Z
AF
PT7M7809Z
BH
CJ
PT7M7342Z
AG
PT7M7809Y
BI
PT7M7803Y
CK
PT7M7342Y
AH
PT7M7810L
BJ
PT7M7823L
CL
PT7M7343L
AI
PT7M7810M
BK
PT7M7823M
CM
PT7M7343M
AJ
PT7M7810T
BL
PT7M7823T
CN
PT7M7343T
AK
PT7M7810S
BM
PT7M7823S
CO
PT7M7343S
PT7M7810R
BN
PT7M7823R
CP
PT7M7343R
PT7M7810Z
BO
PT7M7823Z
CQ
PT7M7343Z
PT7M7810Y
BP
PT7M7823Y
CR
PT7M7343Y
PT7M7811L
BQ
PT7M7824L
CS
PT7M7344L
PT7M7811M
BR
PT7M7824M
CT
PT7M7344M
AQ
PT7M7811T
BS
PT7M7824T
CU
PT7M7344T
AR
PT7M7811S
BT
PT7M7824S
CV
PT7M7344S
AS
PT7M7811R
BU
PT7M7824R
CW
PT7M7344R
AT
PT7M7811Z
BV
PT7M7824Z
CX
PT7M7344Z
AU
PT7M7811Y
BW
PT7M7824Y
CY
PT7M7344Y
AV
PT7M7812L
BX
PT7M7825L
CZ
PT7M7345L
AW
PT7M7812M
BY
PT7M7825M
DA
PT7M7345M
AX
PT7M7812T
BZ
PT7M7825T
DB
PT7M7345T
PT7M7812S
CA
PT7M7825S
DC
PT7M7345S
PT7M7812R
CB
PT7M7825R
DD
PT7M7345R
BA
PT7M7812Z
CC
PT7M7825Z
DE
PT7M7345Z
BB
PT7M7812Y
CD
PT7M7825Y
DF
PT7M7345Y
AL
AM
AN
AO
AP
AY
AZ
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Pin Information
Pin Configuration
Figure 2. Pin Configuration
SOT23-3
PT7M7803
PT7M7809
PT7M7810
GND
1
VCC
2
GND
1
3
VCC
RESET
2
3
RESET
SOT23-5
PT7M7811
1
GND
2
NC
3
RESET
PT7M7812
VCC
MR
5
4
1
GND
2
NC
3
RESET
PT7M7823
1
RESET
2
GND
3
MR
VCC
WDI
VCC
5
MR
4
PT7M7824
5
4
1
RESET
2
GND
3
RESET
PT7M7825
VCC
WDI
5
4
1
RESET
2
GND
3
RESET
VCC
5
MR
4
SOT23-6
PT7M7342
PT7M7343
PT0109(02/03)
PT7M7344
PT7M7345
1
VCC
RESET
6
1
VCC
RESET
6
1
VCC
RESET
6
2
GND
MR
5
2
GND
MR
5
2
GND
RESET
5
3
PFI
PFO
4
3
PFI
PFO
4
3
PFI
PFO
4
5
Ver:1
Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Pin Description
Table 2. Pin Description
P in Na me
Typ e
Descr ip t ion
MR
I
Ma n u a l-R eset : (C MO S). Active low. Pull low to force a reset. Reset remains asserted for the duration
of the Reset Timeout Period after MR transitions from low to high. Leave unconnected or connected
to VCC if not used.
Vcc
Power
Power Su p p ly: Reset is asserted when VCC drops below the Reset Threshold Voltage (VRST). Reset
remains asserted until VCC rises above VRST and keep asserted for the duration of the Reset Timeout
Period (tRS) once VCC rises above VRST.
GND
Ground
G r ou n d R efer en ce for all signals
PFI
I
Power -Fa il Volt a ge Mon it or I n p u t . When PFI <VPFT , PFO goes low. Connect PFI to GND or Vcc
when not used.
PFO
O
Power -Fa il O u t p u t : it gets low and sinks current when PFI is less than 1.25V; otherwise PFO stays
high.
WDI
I
Watchdog Input (CMOS). If WDI remains high or low for the duration of the watchdog timeout period
(tWD), the internal watchdog timer trigger a reset output. Floating WDI or connecting WDI to a highimpedance three-state buffer disables the watchdog feature. The internal watchdog timer clears
whenever reset is asserted or WDI occurs a rising or falling edge.
RESET
O
Act ive-L ow R eset O u t p u t (P u sh -P u ll or O p en -Dr a in ). It goes low when Vcc is below the reset
threshold. It remains low for about 200ms after one of the following occurs: Vcc rises above the reset
threshold (VRST), the watchdog triggers a reset, or MR goes from low to high.
RESET
O
T h e inver se of R E SE T, active high. Whenever RESET is high, RESET is low.
NC
-
No con n ect ion
PT0109(02/03)
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Watchdog Timer
Functional Description
The PT7M7xxx watchdog circuit monitors the µP’s activity. If
the µP does not toggle the watch-dog input (WDI) within 1.6s,
reset asserts. As long as reset is asserted or the WDI input is
toggled, the watchdog timer will stay clear and will not count.
As soon as reset is released, the timer will start counting. WDI
input pulses as short as 50ns can be detected.
Disable the watchdog function by leaving WDI unconnected
or by three-stating driver connected to WDI.
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a known
state. Whenever the µP is in an unknown state, it should be
held in reset. The supervisory circuits assert reset during powerup and prevent code execution errors during power-down or
brownout conditions.
On power-up, once Vcc reaches about 1.0V, RESET is a
guaranteed logic low of 0.4V or less. As Vcc rises, RESET stays
low. When Vcc rises above the reset threshold, an internal timer
releases RESET after about 200ms. RESET pulses low whenever
Vcc drops below the reset threshold, i.e. brownout condition.
If brownout occurs in the middle of a previously initiated reset
pulse, the pulse continues for at least another 200ms. On powerdown, once Vcc falls below the reset threshold, RESET stays
low and is guaranteed to be 0.4V or less until Vcc drops below
1.0V. Fig 4 shows the timing relationship.
Manual Reset
The manual-reset input (MR) allows reset to be triggered by a
push button switch. MR has an internal pullup resistor, so it
can be left open when not used.
Power-Fail Comparator
The power-fail comparator can be used for various purposes
because its output and noninverting input are not internally
connected. The inverting input is internally connected to a
1.25V reference.
The active-high RESET output is simply the inverse of the
RESET output, and is guaranteed to be valid with Vcc down to
1.0V.
Figure 3. Typical Application Circuit
IN
DC Linear
Regulator
µP
Vcc
RESET
µP Supervisory
Circuit
PFI
WDI
RESET
MR
Interrupt
Vcc
PT0109(02/03)
PFO
7
I/O Line
Ver:1
Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Detailed Specifications
Absolute Maximum Ratings
Storage Temperature ....................................................... -65oC to +150oC
Ambient Temperature with Power Applied ....................... -40oC to +85oC
Supply Voltage to Ground Potential (Vcc to GND) ........... -0.3V to +7.0V
DC Input Voltage (All inputs except Vcc and GND) ..... -0.3V to VCC+0.3V
DC Output Current (All outputs) .................................................... 20mA
Power Dissipation ........................................................................ 320mW
(Depend on package)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Operation Condition
Table 3. DC Electrical Characteristics
Sym
Min
Typ
Ma x
Un it
Supply Voltage for 7xxxL, 7xxxM
4.5
5.0
5.5
V
Supply Voltage for 7xxxT, 7xxxS
3.0
3.3
5.5
V
Supply Voltage for 7xxxR
2.7
3.0
5.5
V
Supply Voltage for 7xxxZ, 7xxxY
2.4
2.5
5.5
V
VIH
Input High Voltage
0.7VCC
VIL
Input Low Voltage
TA
Operating Temperature
VCC
PT0109(02/03)
Descr ip t ion
Test C on d it ion s
V
0.3VCC
-40
8
85
V
O
C
Ver:1
Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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DC Electrical Characteristics
Table 4. DC Electrical Characteristics
(Vcc=VRN+5% to 5.5V, TA= -40~85”C, unless otherwise noted)
Symbol
Description
Test Conditions
VCC
Operating Voltage Range
ICC
Supply Current
Vcc = 5V, No load
VIH
Input High Voltage
Pin: MR, WDI
VIL
Input Low Voltage
Pin: MR, WDI
Min
Typ
1.0
Unit
5.5
V
50
µA
0.7 Vcc
PT7M7xxxL
PT7M7xxxM
PT7M7xxxT
PT7M7xxxS
PT7M7xxxR
PT7M7xxxZ
PT7M7xxxY
VRST
Reset Threshold Voltage
(Note 1)
TA= -40 ~ 85”C
VRTH
Reset Threshold
Hysteresis(Note 1)
Vcc varies between VRN±5%
VOH
Output High Voltage
Vcc ≥ 4.5V
Vcc ≥ 2.7V
Vcc ≥ 1.8V
Vcc ≥ 4.5V
Vcc ≥ 2.7V
Vcc ≥ 1.2V
20
Max
Isource=800µA
Isource=500µA
Isource=150µA
Isink=3.2mA
Isink=1.2mA
Isink=100µA
VOL
Output Low Voltage
ILKG
Open-Drain Output
Leakage Current
VCC > VTH(MAX)
for PT7M7803 and PT7M7345
VPFT
PFI Input Threshold
VPFI varies from 1.5V and 1.0V
IPFI
PFI Input Leakage
Current
IWDI
Average WDI Input
Current (Note 2)
r
MR pull-up resistor
(internal)
VRN-2.5%
4.514
4.271
3.003
2.857
2.564
2.262
2.145
V
VRN
4.63
4.38
3.08
2.93
2.63
2.32
2.20
0.3 Vcc
V
VRN+2.5%
4.746
4.490
3.157
3.003
2.696
2.378
2.255
V
70
mV
Vcc-1.5
0.8 Vcc
0.8 Vcc
1.20
WDI connected to VCC: 5.5V
V
1.25
120
0.4
0.3
0.3
V
1
µA
1.30
V
±25
nA
160
WDI connected to GND
-20
-15
PT7M7811/7812
10
20
30
PT7M7823/7824/7825
35
52
75
PT7M7342/7343/7344
60
µA
kΩ
* Valid for both RESET and RESET. VRN is nominal reset threshold voltage.
** WDI is internally serviced within the watchdog period if WDI is left unconnected.
PT0109(02/03)
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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AC Electrical Characteristics
Table 5. AC Electrical Characteristics
Sym
Descr ip t ion
Test C on d it ion s
Min
Typ
Ma x
Un it s
tRS
Reset Pulse Width
MR from low to High
140
200
280
ms
tWD
Watchdog Timeout Period
WDI and MR tied to VCC,
VCC > VRN + 5%
1.12
1.6
2.25
s
tMR
MR Pulse Width
tMD
MR to RESET Delay
tWP
WDI Pulse Width
µs
1
VCC = 5.0V
250
50
ns
ns
Figure 4. Watchdog Timing Diagram
V CC
V RST
V RST
tR S
tW D
tR S
tR S
RESET
RESET
tW P
tM D
WDI
tM R
MR
PT0109(02/03)
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Mechanical Information
Figure 5. SOT23-3
0.075
1.90
BSC
0.059 1.50
0.068 1.75
0.102 2.60
0.118 3.00
0o - 10o
Datum “A”
0037
0.95
BSC
0.004 0.10
0.023 0.60
0.014 0.35
0.019 0.50
0.110 2.80
0.118 3.00
0.057 1.45 MAX
SEATING
PLANE
0.000 0.00
0.005 0.15
X.XX Denotes Dimensions
X.XX In Millimeters
Notes:
1)Controlling dimensions in millimeters
2)Ref: EIAJ SC-74A
3)Foot length is measured at flat portion of foot, reference to Datum A
PT0109(02/03)
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Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Figure 6. SOT23-5
0.075
1.90
BSC
0.059 1.50
0.068 1.75
0.102 2.60
0.118 3.00
0o - 10o
Datum “A”
0037
0.95
BSC
0.004 0.10
0.023 0.60
0.014 0.35
0.019 0.50
0.110 2.80
0.118 3.00
0.057 1.45 MAX
SEATING
PLANE
0.000 0.00
0.005 0.15
X.XX Denotes Dimensions
X.XX In Millimeters
Notes:
1)Controlling dimensions in millimeters
2)Ref: EIAJ SC-74A
3)Foot length is measured at flat portion of foot, reference to Datum A
PT0109(02/03)
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Ver:1
Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Figure 7. SOT23-6
0.075
1.90
BSC
0.059 1.50
0.068 1.75
0.102 2.60
0.118 3.00
0o - 10o
Datum “A”
0037
0.95
BSC
0.004 0.10
0.023 0.60
0.014 0.35
0.019 0.50
0.110 2.80
0.118 3.00
0.057 1.45 MAX
SEATING
PLANE
0.000 0.00
0.005 0.15
X.XX Denotes Dimensions
X.XX In Millimeters
Notes:
1)Controlling dimensions in millimeters
2)Ref: EIAJ SC-74A
3)Foot length is measured at flat portion of foot, reference to Datum A
PT0109(02/03)
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Ver:1
Data Sheet
PT7M7803/7809-7812/7823-7825/7342-7345
µP Supervisor Circuits
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Notes
Pericom Technology Inc.
Email: [email protected]
Web-Site: www.pti.com.cn, www.pti-ic.com
China:
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576
Fax: (86)-21-6485 2181
Asia Pacific:
Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660
Fax: (852)- 2243 3667
U.S.A.:
2380 Bering Drive, San Jose, California 95131, USA
Tel: (1)-408-435 0800
Fax: (1)-408-435 1100
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve
design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described
other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free
from patent infringement or other rights, of Pericom Technology Incorporation.
PT0109(02/03)
14
Ver:1