SEMICONDUCTOR TECHNICAL DATA #*#!' %"&$%"' ' ' ' #!%"' "$('& " ('$('& '' #"")%' " The MC74LCX16373 is a high performance, non–inverting 16–bit transparent latch operating from a 2.7 to 3.6V supply. The device is byte controlled. Each byte has separate Output Enable and Latch Enable inputs. These control pins can be tied together for full 16–bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX16373 inputs to be safely driven from 5V devices. The MC74LCX16373 contains 16 D–type latches with 3–state 5V–tolerant outputs. When the Latch Enable (LEn) inputs are HIGH, data on the Dn inputs enters the latches. In this condition, the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH–to–LOW transition of LE. The 3–state outputs are controlled by the Output Enable (OEn) inputs. When OE is LOW, the outputs are enabled. When OE is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches. • • • • • • • • • LOW–VOLTAGE CMOS 16–BIT TRANSPARENT LATCH DT SUFFIX PLASTIC TSSOP PACKAGE CASE 1201–01 Designed for 2.7 to 3.6V VCC Operation 5.4ns Maximum tpd 5V Tolerant — Interface Capability With 5V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (20µA) Substantially Reduces System Power Requirements • Latchup Performance Exceeds 500mA • ESD Performance: Human Body Model >2000V; Machine Model >200V PIN NAMES Pins Function OEn LEn D0–D15 O0–O15 Output Enable Inputs Latch Enable Inputs Inputs Outputs 11/96 Motorola, Inc. 1996 1 REV 1 MC74LCX16373 LOGIC DIAGRAM 1 OE1 1 48 LE1 O0 2 47 D0 O1 3 46 D1 GND 4 45 GND O2 5 44 D2 O3 6 43 D3 VCC 7 42 VCC O4 8 41 D4 O5 9 40 D5 39 GND GND 10 O6 11 38 D6 O7 12 37 D7 O8 13 36 D8 O9 14 35 D9 GND 15 34 GND O10 16 33 D10 O11 17 32 D11 VCC 18 31 VCC O12 19 30 D12 O13 20 29 D13 GND 21 28 GND O14 22 27 D14 O15 23 26 D15 OE2 24 25 LE2 Inputs 24 OE1 OE2 48 25 LE1 LE2 2 nLE 47 D0 D1 D2 O2 D3 O3 40 D5 O5 Q D6 37 D7 O7 Q 26 D15 D Outputs 22 Inputs O14 Q D 12 nLE O13 Q 27 D14 D 20 nLE nLE O6 Q O12 D 11 nLE 38 29 D13 D 19 Q D 9 nLE O11 Q 30 D12 D 17 nLE nLE O4 Q O10 Q D 8 nLE D4 32 D11 D 16 nLE D 6 Q 41 33 D10 nLE O9 Q D 5 Q D 43 35 D9 nLE 14 nLE O1 Q D 44 D 3 nLE 46 O8 Q 36 D8 D 13 nLE O0 Q 23 nLE O15 Q D Outputs LE1 OE1 D0:7 O0:7 LE2 OE2 D8:15 O8:15 X H X Z X H X Z H L L L H L L L H L H H H L H H L L X O0 L L X O0 H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs MOTOROLA 2 LCX DATA BR1339 — REV 3 MC74LCX16373 ABSOLUTE MAXIMUM RATINGS* Symbol Parameter VCC DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Condition Unit –0.5 to +7.0 V –0.5 ≤ VI ≤ +7.0 V –0.5 ≤ VO ≤ +7.0 Output in 3–State V –0.5 ≤ VO ≤ VCC + 0.5 Note 1. V IIK DC Input Diode Current –50 VI < GND mA IOK DC Output Diode Current –50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range –65 to +150 °C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Operating Data Retention Only Min Typ Max Unit 2.0 1.5 3.3 3.3 3.6 3.6 V 0 5.5 V 0 0 VCC 5.5 V VCC Supply Voltage VI Input Voltage VO Output Voltage IOH HIGH Level Output Current, VCC = 3.0V – 3.6V –24 mA IOL LOW Level Output Current, VCC = 3.0V – 3.6V 24 mA IOH HIGH Level Output Current, VCC = 2.7V – 3.0V –12 mA IOL LOW Level Output Current, VCC = 2.7V – 3.0V 12 mA TA Operating Free–Air Temperature ∆t/∆V Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V (HIGH or LOW State) (3–State) –40 +85 °C 0 10 ns/V DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C Symbol Characteristic VIH HIGH Level Input Voltage (Note 2.) VIL LOW Level Input Voltage (Note 2.) VOH HIGH Level Output Voltage VOL LOW Level Output Voltage Condition Min 2.7V ≤ VCC ≤ 3.6V 2.0 2.7V ≤ VCC ≤ 3.6V Max V 0.8 2.7V ≤ VCC ≤ 3.6V; IOH = –100µA VCC – 0.2 VCC = 2.7V; IOH = –12mA 2.2 VCC = 3.0V; IOH = –18mA 2.4 VCC = 3.0V; IOH = –24mA 2.2 Unit V V 2.7V ≤ VCC ≤ 3.6V; IOL = 100µA 0.2 VCC = 2.7V; IOL= 12mA 0.4 VCC = 3.0V; IOL = 16mA 0.4 VCC = 3.0V; IOL = 24mA 0.55 V 2. These values of VI are used to test DC electrical characteristics only. LCX DATA BR1339 — REV 3 3 MOTOROLA MC74LCX16373 DC ELECTRICAL CHARACTERISTICS (continued) TA = –40°C to +85°C Symbol Characteristic Condition Min Max Unit II Input Leakage Current 2.7V ≤ VCC ≤ 3.6V; 0V ≤ VI ≤ 5.5V ±5.0 µA IOZ 3–State Output Current 2.7 ≤ VCC ≤ 3.6V; 0V ≤ VO ≤ 5.5V; VI = VIH or V IL ±5.0 µA IOFF Power–Off Leakage Current VCC = 0V; VI or VO = 5.5V 10 µA ICC Quiescent Supply Current 2.7 ≤ VCC ≤ 3.6V; VI = GND or VCC 20 µA 2.7 ≤ VCC ≤ 3.6V; 3.6 ≤ VI or VO ≤ 5.5V ±20 µA 2.7 ≤ VCC ≤ 3.6V; VIH = VCC – 0.6V 500 µA ∆ICC Increase in ICC per Input AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω) Limits TA = –40°C to +85°C VCC = 3.0V to 3.6V Symbol Parameter VCC = 2.7V Waveform Min Max Min Max Unit tPLH tPHL Propagation Delay Dn to On 1 1.5 1.5 5.4 5.4 1.5 1.5 5.9 5.9 ns tPLH tPHL Propagation Delay LE to On 3 1.5 1.5 5.5 5.5 1.5 1.5 6.4 6.4 ns tPZH tPZL Output Enable Time to HIGH and LOW Level 2 1.5 1.5 6.1 6.1 1.5 1.5 6.5 6.5 ns tPHZ tPLZ Output Disable Time from HIGH and LOW Level 2 1.5 1.5 6.0 6.0 1.5 1.5 6.3 6.3 ns ts Setup TIme, HIGH or LOW Dn to LE 3 2.5 2.5 ns th Hold TIme, HIGH or LOW Dn to LE 3 1.5 1.5 ns tw LE Pulse Width, HIGH 3 3.0 3.0 ns tOSHL tOSLH Output–to–Output Skew (Note 3.) 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition VOLP Dynamic LOW Peak Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V Min Typ 0.8 Max Unit V VOLV Dynamic LOW Valley Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V 4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter CIN Input Capacitance COUT Output Capacitance CPD Power Dissipation Capacitance MOTOROLA Condition Typical Unit VCC = 3.3V, VI = 0V or VCC 7 pF VCC = 3.3V, VI = 0V or VCC 8 pF 10MHz, VCC = 3.3V, VI = 0V or VCC 20 pF 4 LCX DATA BR1339 — REV 3 MC74LCX16373 2.7V 1.5V Dn 1.5V 0V tPLH tPHL VOH 1.5V On 1.5V VOL WAVEFORM 1 – PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns 2.7V 1.5V OEn 2.7V Dn 1.5V 1.5V 0V tPZH 0V ts tPHZ VCC VOH – 0.3V LEn 1.5V On th 2.7V tw 1.5V 1.5V ≈ 0V 0V tPLH, tPHL tPZL tPLZ ≈ 3.0V VOH On 1.5V 1.5V On VOL VOL + 0.3V GND WAVEFORM 3 – LE to On PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn to LE SETUP AND HOLD TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns except when noted WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns Figure 1. AC Waveforms VCC PULSE GENERATOR R1 DUT CL RT TEST 6V OPEN GND RL SWITCH tPLH, tPHL Open tPZL, tPLZ 6V Open Collector/Drain tPLH and tPHL 6V tPZH, tPHZ GND CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 2. Test Circuit LCX DATA BR1339 — REV 3 5 MOTOROLA MC74LCX16373 OUTLINE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 1201–01 ISSUE A 48X K K1 K REF 0.12 (0.005) M T U S V ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ S T U S J J1 48 25 SECTION N–N M 0.254 (0.010) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. B –U– L N 1 24 A –V– PIN 1 IDENT. N F DETAIL E D C M 0.25 (0.010) –W– 0.076 (0.003) –T– SEATING DETAIL E PLANE G DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 12.40 12.60 6.00 6.20 ––– 1.10 0.05 0.15 0.50 0.75 0.50 BSC 0.37 ––– 0.09 0.20 0.09 0.16 0.17 0.27 0.17 0.23 7.95 8.25 0_ 8_ INCHES MIN MAX 0.488 0.496 0.236 0.244 ––– 0.043 0.002 0.006 0.020 0.030 0.0197 BSC 0.015 ––– 0.004 0.008 0.004 0.006 0.007 0.011 0.007 0.009 0.313 0.325 0_ 8_ H Motorola reserves the right to make changes without further notice to any products herein. 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