PD - 95757
IRFB4215PbF
HEXFET® Power MOSFET
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Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Optimized for SMPS Applications
Lead-Free
D
VDSS = 60V
RDS(on) = 9.0mΩ
G
ID = 115A
S
Description
Advanced HEXFET® Power MOSFETs from International Rectifier
utilize advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of applications.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
115
81
360
270
1.8
± 20
85
18
4.7
-55 to + 175
A
W
W/°C
V
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.24
–––
0.56
–––
40
°C/W
1
8/26/04
IRFB4215PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
61
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.066
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
22
160
77
110
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
EAS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
––– 4080
––– 840
––– 180
––– 1080
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
9.0
mΩ VGS = 10V, ID = 54A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 54A
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
170
ID = 64A
39
nC
VDS = 48V
59
VGS = 10V, See Fig. 6 and 13
–––
VDD = 30V
–––
ID = 64A
ns
–––
RG = 6.2Ω
–––
VGS = 10V, See Fig. 10
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
220 mJ IAS = 90A, L = 54µH
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 115
showing the
A
G
integral reverse
––– ––– 360
S
p-n junction diode.
––– ––– 1.2
V
TJ = 25°C, IS = 90A, VGS = 0V
––– 78 120
ns
TJ = 25°C, IF = 64A
––– 250 380
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
This is a typical value at device destruction and represents
operation outside rated limits.
This
is a calculated value limited to TJ = 175°C .
RG = 25Ω, IAS = 85A, VGS=10V (See Figure 12)
This is tested with same test conditions as the existing data sheet
ISD ≤ 90A, di/dt ≤ 250A/µs, VDD ≤ V(BR)DSS,
Calculated continuous current based on maximum allowable
TJ ≤ 175°C
junction temperature. Package limitation current is 75A.
Starting TJ = 25°C, L = 60µH
2
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IRFB4215PbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
10
4.5V
100
20µs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
4.5V
10
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
2.5
TJ = 175 ° C
100
TJ = 25 ° C
10
V DS = 25V
20µs PULSE WIDTH
6.0
7.0
8.0
9.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
5.0
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
4.0
20µs PULSE WIDTH
TJ = 175 ° C
10.0
ID = 70A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB4215PbF
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
6000
5000
Ciss
4000
3000
2000
Coss
1000
20
VGS , Gate-to-Source Voltage (V)
7000
ID = 64A
VDS = 48V
VDS = 30V
VDS = 12V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0
1
10
0
100
0
VDS , Drain-to-Source Voltage (V)
160
200
10000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
120
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
100
TJ = 175 ° C
10
TJ = 25 ° C
1
V GS = 0 V
0.5
1.0
1.5
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
80
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
0.1
0.0
40
2.0
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100
100µsec
10
1
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
0.1
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB4215PbF
120
100
ID , Drain Current (A)
RD
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
80
+
-VDD
V GS
60
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
td(on)
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response ( ZthJC )
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
0.01
0.001
τJ
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
τ2
τ
Ri (°C/W) τi (sec)
0.266 0.00036
0.294
0.003748
Ci= τi/Ri
Ci= i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D.U.T
RG
IAS
20V
VGS
tp
DRIVER
+
V
- DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
IRFB4215PbF
1000
I D
12A
18A
BOTTOM 85A
TOP
800
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFB4215PbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRFB4215PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
1234-
14.09 (.555)
13.47 (.530)
2 - DRAIN
GATE
3 - SOURCE
DRAIN
SOURCE
4 - DRAIN
DRAIN
IGBTs, CoPACK
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
HEXFET
1 - GATE
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
0.55 (.022)
0.46 (.018)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
L OT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y L INE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/04
8
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