ISL97519 ® Data Sheet September 10, 2009 1% Output Accuracy 600kHz/1.2MHz PWM Step-Up Regulator The ISL97519 is a high frequency, high efficiency step-up voltage regulator operated at constant frequency PWM mode. With an internal 2.0A, 200mΩ MOSFET, it can deliver up to 1A output current at over 90% efficiency. The selectable 600kHz and 1.2MHz allows smaller inductors and faster transient response. An external compensation pin gives the user greater flexibility in setting frequency compensation allowing the use of low ESR ceramic output capacitors. When shut down, it draws <1µA of current and can operate down to 2.3V input supply. These features along with 1.2MHz switching frequency makes it an ideal device for portable equipment and TFT-LCD displays. Features • 1% Output Accuracy • >90% Efficiency • 2.0A, 200mΩ Power MOSFET • 2.3V to 5.5V Input • Up to 25V Output • 600kHz/1.2MHz Switching Frequency Selection • Adjustable Soft-Start • Internal Thermal Protection • 1.1mm Max Height 8 Ld MSOP Package • Pb-Free (RoHS compliant) • Halogen Free The ISL97519 is available in an 8 Ld MSOP package with a maximum height of 1.1mm. The device is specified for operation over the full -40°C to +105°C temperature range. Applications Pinout • DSL modems ISL97519 (8 LD MSOP) TOP VIEW COMP 1 FN6454.3 • TFT-LCD displays • PCMCIA cards • Digital cameras 8 SS • GSM/CDMA phones • Portable equipment FB 2 7 FSEL EN 3 6 VDD • Handheld devices GND 4 5 LX Ordering Information PART NUMBER (Note) PART MARKING PACKAGE (Pb-free) PKG. DWG. # ISL97519IUZ 7519Z 8 Ld MSOP M8.118A ISL97519IUZ-T* 7519Z 8 Ld MSOP M8.118A ISL97519IUZ-TK* 7519Z 8 Ld MSOP M8.118A *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007-2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL97519 Absolute Maximum Ratings (TA = +25°C) Thermal Information LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27V VDD to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V COMP, FB, EN, SS, FSEL to GND . . . . . . . . .-0.3V to (VDD + 0.3V) Thermal Resistance (Typical, Note 1) θJA (°C/W) 8 Lead MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Ambient Temperature . . . . . . . . . . . . . . .-40°C to +105°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VIN = 3.3V, VOUT = 12V, IOUT = 0mA, FSEL = GND, TA = -40°C to +105°C Unless Otherwise Specified. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 1 5 µA IQ1 Quiescent Current - Shutdown EN = 0V IQ2 Quiescent Current - Not Switching EN = VDD, FB = 1.3V 0.7 IQ3 Quiescent Current - Switching EN = VDD, FB = 1.0V 3 4 mA VFB Feedback Voltage TA = -40°C to +85°C 1.281 1.294 1.307 V TA = -40°C to +105°C 1.276 1.294 1.307 V 0.01 0.5 µA 5.5 V IB-FB Feedback Input Bias Current VDD Input Voltage Range 2.3 mA DMAX - 600kHz Maximum Duty Cycle FSEL = 0V 85 92 % DMAX - 1.2MHz Maximum Duty Cycle FSEL = VDD 85 90 % 1.5 2.0 A ILIM Current Limit - Max Peak Input Current IEN Shutdown Input Bias Current EN = 0V 0.01 rDS(ON) Switch ON-Resistance VDD = 2.7V, ILX = 1A 0.2 ILX-LEAK Switch Leakage Current VSW = 27V 0.01 ΔVOUT/ΔVIN Line Regulation 3V < VIN < 5.5V, VOUT = 12V 0.2 % ΔVOUT/ΔIOUT Load Regulation VIN = 3.3V, VOUT = 12V, IO = 30mA to 200mA 0.3 % fOSC1 Switching Frequency Accuracy FSEL = 0V 500 620 740 kHz fOSC2 Switching Frequency Accuracy FSEL = VDD 1000 1250 1500 kHz 0.5 V VIL EN, FSEL Input Low Level VIH EN, FSEL Input High Level GM Error Amp Tranconductance VDD-ON VDD UVLO On Threshold HYS VDD UVLO Hysteresis ISS Soft-Start Charge Current OTP Over-Temperature Protection 2 0.5 Ω 3 1.5 ΔI = 5µA µA µA V 70 130 150 1µ/Ω 2.1 2.2 2.3 V 100 4 6 150 mV 8 µA °C FN6454.3 September 10, 2009 ISL97519 Block Diagram EN FSEL REFERENCE GENERATOR VDD OSCILLATOR SS SHUTDOWN AND START-UP CONTROL LX PWM LOGIC CONTROLLER FET DRIVER COMPARATOR CURRENT SENSE GND FB GM AMPLIFIER COMP Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION 1 COMP Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground. 2 FB Voltage feedback pin. Internal reference is 1.294V nominal. Connect a resistor divider from VOUT. VOUT = 1.294V (1 + R1/R2). See “Typical Application Circuit” on page 3. 3 EN Shut-down control pin. Pull EN low to turn off the device. 4 GND 5 LX 6 VDD Analog power supply input pin. 7 FSEL Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to high or VDD, switching frequency is set to 1.25MHz. 8 SS Analog and power ground. Power switch pin. Connected to the drain of the internal power MOSFET. Soft-start control pin. Connect a capacitor to control the converter start-up. Typical Application Circuit R3 3.9kΩ C5 4.7nF 1 COMP R1 R2 10kΩ 2 FB FSEL 7 3 EN VDD 6 4 GND S1 3 SS 8 85.2kΩ LX 5 C3 27nF C4 2.3V TO 5.5V + C1 0.1µF 22µF 10µH D1 + C2 12V 22µF FN6454.3 September 10, 2009 ISL97519 Typical Performance Curves 95 92 90 90 VIN = 3.3V, VO = 9V, fs = 620kHz EFFICIENCY (%) EFFICIENCY (%) 88 85 VIN = 5V, VO = 12V, fs = 1.25MHz 80 VIN = 5V, VO = 12V, fs = 620kHz 75 VIN = 5V, VO = 9V, fs = 620kHz 70 86 84 82 VIN = 3.3V, VO = 12V, fs = 620kHz VIN = 3.3V, VO = 12V, 80 78 65 VIN = 5V, VO = 9V, fs = 1.25MHz fs = 1.25MHz VIN = 3.3V, VO = 9V, fs = 1.25MHz 76 60 74 0 200 400 600 800 0 1000 100 FIGURE 1. BOOST EFFICIENCY vs IOUT 300 400 500 FIGURE 2. BOOST EFFICIENCY vs IOUT 0.7 0.9 0.8 VIN = 5V, VO = 12V, VIN = 5V, VO = 9V, VIN = 3.3V, VO = 12V, fs = 1.25MHz fs = 1.25MHz fs = 1.25MHz 0.6 0.7 0.6 LOAD REGULATION (%) LOAD REGULATION (%) 200 IOUT (mA) IOUT (mA) VIN = 5V, VO = 9V, fs = 620kHz 0.5 0.4 0.3 0.2 VIN = 5V, VO = 12V, 0.1 VIN = 3.3V, VO = 9V, fs = 1.25MHz 0.5 VIN = 3.3, VO = 9V, fs = 1.25MHz 0.4 0.3 0.2 0.1 VIN = 3.3, VO = 12V, fs = 620kHz fs = 620kHz 0 0 0 200 400 600 800 1000 0 100 200 300 400 500 IOUT (mA) IOUT (mA) FIGURE 3. LOAD REGULATION vs IOUT FIGURE 4. LOAD REGULATION vs IOUT 0.6 VO = 12V LINE REGULATION (%) 0.5 IO = 50mA TO 300mA VO = 9V, IO = 100mA 0.4 fs = 620kHz VO = 9V, IO = 80mA fs = 1.25MHz 0.3 VIN = 3.3V fs = 600kHz VO = 12V, IO = 80mA fs = 1.25MHz 0.2 0.1 0 VO = 12V, IO = 80mA fs = 620kHz -0.1 2 3 4 5 6 VIN (V) FIGURE 5. LINE REGULATION vs VIN 4 FIGURE 6. TRANSIENT RESPONSE FN6454.3 September 10, 2009 ISL97519 Typical Performance Curves (Continued) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD IO = 50mA TO 300mA 1.0 VO = 12V VIN = 3.3V POWER DISSIPATION (W) 0.9 fs = 1.2MHz 870mW 0.8 0.7 θ JA 0.6 0.5 0.4 = M SO +1 P8 60 °C /W 0.3 0.2 0.1 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) FIGURE 7. TRANSIENT RESPONSE FIGURE 8. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD POWER DISSIPATION (W) 0.6 0.5 486mW 0.4 θ JA = 0.3 M SO +2 P8 06 °C /W 0.2 0.1 0.0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Applications Information The ISL97519 is a high frequency, high efficiency boost regulator operated at constant frequency PWM mode. The boost converter stores energy from an input voltage source and deliver it to a higher output voltage. The input voltage range is 2.3V to 5.5V and output voltage range is 5V to 25V. The switching frequency is selectable between 600kHz and 1.2MHz allowing smaller inductors and faster transient response. An external compensation pin gives the user greater flexibility in setting output transient response and tighter load regulation. The converter soft-start characteristic can also be controlled by external CSS capacitor. The EN pin allows the user to completely shut-down the device. the boost converter operates in two cycles. During the first cycle, as shown in Figure 11, the internal power FET turns on and the Schottky diode is reverse biased and cuts off the current flow to the output. The output current is supplied from the output capacitor. The voltage across the inductor is VIN and the inductor current ramps up in a rate of VIN/L, L is the inductance. The inductance is magnetized and energy is stored in the inductor. The change in inductor current is shown in Equation 1: V IN ΔI L1 = Δt1 × --------L D Δt1 = ---------f SW Boost Converter Operations D = Duty Cycle Figure 10 shows a boost converter with all the key components. In steady-state operating and continuous conduction mode where the inductor current is continuous, I OUT ΔV O = ---------------- × Δt 1 C OUT 5 (EQ. 1) FN6454.3 September 10, 2009 ISL97519 During the second cycle, the power FET turns off and the Schottky diode is forward biased, (see Figure 12). The energy stored in the inductor is pumped to the output supplying output current and charging the output capacitor. The Schottky diode side of the inductor is clamp to a Schottky diode above the output voltage. So the voltage drop across the inductor is VIN - VOUT. The change in inductor current during the second cycle is shown in Equation 2: L D VOUT VIN COUT CIN ISL97519 IL ΔIL2 Δt2 ΔVO V IN – V OUT ΔI L = Δt2 × -------------------------------L FIGURE 12. BOOST CONVERTER - CYCLE 2, POWER SWITCH OPEN 1–D Δt2 = ------------f SW (EQ. 2) Output Voltage For stable operation, the same amount of energy stored in the inductor must be taken out. The change in inductor current during the two cycles must be the same. ΔI1 + ΔI2 = 0 V IN 1 – D V IN – V OUT D ---------- × --------+ ------------- × -------------------------------- = 0 L f SW L f SW V OUT 1 ---------------- = ------------1–D V IN (EQ. 3) L D VOUT VIN ISL97519 FIGURE 10. BOOST CONVERTER L VOUT VIN COUT CIN R 1⎞ ⎛ V OUT = V FB × ⎜ 1 + -------⎟ R 2⎠ ⎝ (EQ. 4) The nominal VFB voltage is 1.294V. Inductor Selection COUT CIN An external feedback resistor divider is required to divide the output voltage down to the nominal 1.294V reference voltage. The current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network less than 100k is recommended. The boost converter output voltage is determined by the relationship in Equation 4: The inductor selection determines the output ripple voltage, transient response, output current capability, and efficiency. Its selection depends on the input voltage, output voltage, switching frequency, and maximum output current. For most applications, the inductance should be in the range of 2µH to 33µH. The inductor maximum DC current specification must be greater than the peak inductor current required by the regulator. The peak inductor current can be calculated using Equation 5: I OUT × V OUT V IN × ( V OUT – V IN ) I L ( PEAK ) = ------------------------------------ + 1 ⁄ 2 × ----------------------------------------------------V IN L × V OUT × FREQ (EQ. 5) ISL97519 Output Capacitor IL ΔIL1 Δt1 ΔVO FIGURE 11. BOOST CONVERTER - CYCLE 1, POWER SWITCH CLOSED Low ESR capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are preferred for the output capacitors because of their lower ESR and small packages. Tantalum capacitors with higher ESR can also be used. The output ripple can be calculated in Equation 6: I OUT × D ΔV O = ------------------------- + I OUT × ESR f SW × C O (EQ. 6) For noise sensitive applications, a 0.1µF placed in parallel with the larger output capacitor is recommended to reduce the switching noise coupled from the LX switching node. 6 FN6454.3 September 10, 2009 ISL97519 Schottky Diode Maximum Output Current In selecting the Schottky diode, the reverse break down voltage, forward current and forward voltage drop must be considered for optimum converter performance. The diode must be rated to handle 2.0A, the current limit of the ISL97519. The breakdown voltage must exceed the maximum output voltage. Low forward voltage drop, low leakage current, and fast reverse recovery will help the converter to achieve the maximum efficiency. The MOSFET current limit is nominally 2.0A and guaranteed 1.7A. This restricts the maximum output current, IOMAX, based on Equation 7: Input Capacitor The value of the input capacitor depends upon the input and output voltages, the maximum output current, the inductor value and the noise allowed to put back on the input line. For most applications, a minimum 10µF is required. For applications that run close to the maximum output current limit, an input capacitor in the range of 22µF to 47µF is recommended. I L = I L-AVG + ( 1 ⁄ 2 × ΔI L ) (EQ. 7) where: IL = MOSFET current limit IL-AVG = average inductor current ΔIL = inductor ripple current V IN × [ ( V O + V DIODE ) – V IN ] ΔI L = -----------------------------------------------------------------------------L × ( V O + V DIODE ) × f S VDIODE = Schottky diode forward voltage, typically, 0.6V fS = switching frequency, 600kHz or 1.2MHz The ISL97519 is powered from the VIN. A High frequency 0.1µF bypass cap is recommended to be close to the VIN pin to reduce supply line noise and ensure stable operation. I OUT I L-AVG = ------------1–D Loop Compensation D = MOSFET turn-on ratio: The ISL97519 incorporates a transconductance amplifier in its feedback path to allow the user some adjustment on the transient response and better regulation. The ISL97519 uses current mode control architecture, which has a fast current sense loop and a slow voltage feedback loop. The fast current feedback loop does not require any compensation. The slow voltage loop must be compensated for stable operation. The compensation network is a series RC network from COMP pin to ground. The resistor sets the high frequency integrator gain for fast transient response and the capacitor sets the integrator zero to ensure loop stability. For most applications, the compensation resistor in the range of 2k to 7.5k and the compensation capacitor in the range of 3nF to 10nF. (EQ. 8) (EQ. 9) V IN D = 1 – -------------------------------------------V OUT + V DIODE (EQ. 10) Table 1 gives typical maximum IOUT values for 1.2MHz switching frequency and 10µH inductor. TABLE 1. MAXIMUM IOUT VALUES VIN (V) VOUT (V) IOMAX (mA) 2.5 5 870 2.5 9 500 2.5 12 380 3.3 5 1150 Soft-Start 3.3 9 655 The soft-start is provided by an internal 6µA current source which charges the external CSS; the peak MOSFET current is limited by the voltage on the capacitor. This in turn controls the rising rate of the output voltage. The regulator goes through the start-up sequence as well, after the EN pin is pulled to HI. 3.3 12 500 5 9 990 5 12 750 Frequency Selection The ISL97519 switching frequency can be user selected to operate at either constant 620kHz or 1.25MHz. Connecting FSEL pin to ground sets the PWM switching frequency to 620kHz. When connecting FSEL high or VDD, the switching frequency is set to 1.25MHz. Cascaded MOSFET Application An 25V N-Channel MOSFET is integrated in the boost regulator. For the applications where the output voltage is greater than 25V, an external cascaded MOSFET is needed as shown in Figure 13. The voltage rating of the external MOSFET should be greater than AVDD. Shut-down Control When the EN pin is pulled down, the ISL97519 is shut down reducing the supply current to <1µA. 7 FN6454.3 September 10, 2009 ISL97519 AVDD VIN LX FB INTERSIL ISL97519 DC Path Block Application Note that there is a DC path in the boost converter from the input to the output through the inductor and diode, hence the input voltage will be seen at output with a forward voltage drop of diode before the part is enabled. If this voltage is not desired, the following circuit can be inserted between input and inductor to disconnect the DC path when the part is disabled. TO INDUCTOR INPUT EN FIGURE 13. CASCADED MOSFET TOPOLOGY FOR HIGH OUTPUT VOLTAGE APPLICATIONS FIGURE 14. CIRCUIT TO DISCONNECT THE DC PATH OF BOOST CONVERTER All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 8 FN6454.3 September 10, 2009 ISL97519 Package Outline Drawing M8.118A 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 A 3.0±0.1 8 0.25 CAB 3.0±0.1 4.9±0.15 DETAIL "X" 1.10 Max PIN# 1 ID B SIDE VIEW 2 1 0.18 ± 0.05 2 0.65 BSC TOP VIEW 0.95 BSC 0.86±0.09 GAUGE PLANE H C 0.25 SEATING PLANE 0.33 +0.07/ -0.08 0.08 C A B 0.10 ± 0.05 3°±3° 0.10 C 0.55 ± 0.15 DETAIL "X" SIDE VIEW 1 5.80 NOTES: 4.40 3.00 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.25mm max per side are not included. 5. Dimensions “D” and “E1” are measured at Datum Plane “H”. 6. This replaces existing drawing # MDP0043 MSOP 8L. 0.65 0.40 1.40 TYPICAL RECOMMENDED LAND PATTERN 9 FN6454.3 September 10, 2009