AD ADuM6010ARSZ The adum60101 is an integrated, isolated dc-to-dc converter. Datasheet

Integrated DC-to-DC Converter
ADuM6010
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
ADuM6010
NC 1
20
NC
GNDP 2
19
GNDISO
NC 3
18
NC
NC 4
17
NC
GNDP 5
16
GNDISO
GNDP 6
15
GNDISO
NC 7
14
NC
13
VSEL
PDIS 8
PCS
VDDP 9
GNDP 10
1.25V 12 VISO
OSC
RECT
REG
11
GNDISO
11043-001
isoPower integrated, isolated dc-to-dc converter
Regulated 3.15 V to 5.25 V output
Up to 150 mW output power
20-lead SSOP package with 5.3 mm creepage
High temperature operation: 105°C
High common-mode transient immunity: >25 kV/µs
Safety and regulatory approvals
UL recognition (pending)
3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A (pending)
VDE certificate of conformity (pending)
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 849 V peak
Figure 1.
APPLICATIONS
Power supply start-up bias and gate drives
Isolated sensor interfaces
Industrial PLCs
Table 1. Power Levels
GENERAL DESCRIPTION
The ADuM60101 is an integrated, isolated dc-to-dc converter.
Based on the Analog Devices, Inc., iCoupler® technology, the
dc-to-dc converter provides regulated, isolated power, adjustable
between 3.15 V and 5.25 V. Input supply voltages can range
from slightly below the required output to significantly higher.
Popular combination and their associated power levels are shown
in Table 1.
Input Voltage (V)
5
5
3.3
Output Voltage (V)
5
3.3
3.3
Output Power (mW)
150
100
100
The iCoupler chip-scale transformer technology is used for isolated
logic signals and for the magnetic components of the dc-to-dc
converter. The result is a small form factor, total isolation
solution.
isoPower uses high frequency switching elements to transfer
power through its transformer. Special care must be taken
during printed circuit board (PCB) layout to meet emissions
standards. See the AN-0971 Application Note for board layout
recommendations.
1
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. A
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Technical Support
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ADuM6010
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ...............................................................................7
General Description ......................................................................... 1
Recommended Operating Conditions .......................................7
Functional Block Diagram .............................................................. 1
Absolute Maximum Ratings ............................................................8
Revision History ............................................................................... 2
ESD Caution...................................................................................8
Specifications..................................................................................... 3
Pin Configuration and Function Descriptions..............................9
Electrical Characteristics—5 V Primary Input Supply/5 V
Secondary Isolated Supply .......................................................... 3
Truth Table .....................................................................................9
Typical Performance Characteristics ........................................... 10
Electrical Characteristics—3.3 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 4
Applications Information .............................................................. 12
Electrical Characteristics—5 V Primary Input Supply/3.3 V
Secondary Isolated Supply .......................................................... 5
Thermal Analysis ....................................................................... 13
Package Characteristics ............................................................... 6
Regulatory Approvals................................................................... 6
Insulation and Safety-Related Specifications ............................ 6
PCB Layout ................................................................................. 12
EMI Considerations ................................................................... 13
Insulation Lifetime ..................................................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
5/13—Rev. 0 to Rev. A
Changes to Table 16 .......................................................................... 9
10/12—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
ADuM6010
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = VISO = 5 V, VSEL resistor network: R1 = 10 kΩ, R2 = 30.9 kΩ. Minimum/maximum
specifications apply over the entire recommended operation range which is 4.5 V ≤ VDDP, VSEL, VISO ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C,
unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 2. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Thermal Coefficient
Line Regulation
Load Regulation
Output Ripple
Output Noise
Switching Frequency
Pulse Width Modulation Frequency
Output Supply
Efficiency at IISO (MAX)
IDDP, No VISO Load
IDDP, Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
Symbol
VISO
VISO (TC)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
IDD1 (Q)
IDD1 (MAX)
Min
Typ
5.0
−44
20
1.3
75
200
125
600
Max
3
30
29
6.8
104
12
154
10
Unit
Test Conditions/Comments
V
μV/°C
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
%
mA
mA
IISO = 15 mA, R1 = 10 kΩ, R2 = 30.9 kΩ
IISO = 15 mA, VDDP = 4.5 V to 5.5 V
IISO = 3 mA to 27 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 27 mA
CBO = 0.1 µF||10 µF, IISO = 27 mA
VISO > 4.5 V
IISO = 27 mA
°C
°C
Table 3. Input and Output Characteristics
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Undervoltage Lockout
Positive Going Threshold
Negative Going Threshold
Input Currents per Channel
Symbol
Min
VIH
VIL
0.7 VDDP
Typ
Max
Unit
0.3 VDDP
V
V
+10
V
V
µA
Test Conditions/Comments
VISO, VDDP supply
VUV+
VUV−
IPDIS
−10
2.7
2.4
+0.01
Rev. A | Page 3 of 16
0 V ≤ VPDIS ≤ VDDP
ADuM6010
Data Sheet
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = VISO = 3.3 V, VSEL resistor network: R1 = 10 kΩ, R2 = 16.2 kΩ. Minimum/maximum
specifications apply over the entire recommended operation range which is 3.0 V ≤ VDDP, VSEL, VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C,
unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Thermal Coefficient
Line Regulation
Load Regulation
Output Ripple
Output Noise
Switching Frequency
Pulse Width Modulation Frequency
Output Supply
Efficiency at IISO (MAX)
IDD1, No VISO Load
IDD1, Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
Symbol
VISO
VISO (TC)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
IDD1 (Q)
IDD1 (MAX)
Min
Typ
3.3
−26
20
1.3
50
130
125
600
Max
3
20
27
3.3
77
10.5
154
10
Unit
Test Conditions/Comments
V
μV/°C
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
%
mA
mA
IISO = 10 mA, R1 = 10 kΩ, R2 = 16.9 kΩ
IISO = 20mA
IISO = 10 mA, VDDP = 3.0 V to 3.6 V
IISO = 2 mA to 18 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 18 mA
CBO = 0.1 µF||10 µF, IISO = 18 mA
3.6 V > VISO > 3 V
IISO = 18 mA
°C
°C
Table 5. Input and Output Characteristics
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Undervoltage Lockout
Positive Going Threshold
Negative Going Threshold
Input Currents per Channel
Symbol
Min
VIH
VIL
0.7 VISO or 0.7 VDDP
Typ
Max
Unit
0.3 VISO or 0.3 VDDP
V
V
+10
V
V
µA
Test Conditions/Comments
VDDP supply
VUV+
VUV−
IPDIS
−10
2.7
2.4
+0.01
Rev. A | Page 4 of 16
0 V ≤ VPDIS ≤ VDDP
Data Sheet
ADuM6010
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at TA = 25°C, VDDP = 5.0 V, VISO = 3.3 V, VSEL resistor network: R1 = 10 kΩ, R2 = 16.2 kΩ. Minimum/maximum
specifications apply over the entire recommended operation range which is 4.5 V ≤ VDDP ≤ 5.5 V, 3.0 V ≤ VISO ≤ 3.6 V, and −40°C ≤ TA ≤
+105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 6. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Setpoint
Thermal Coefficient
Line Regulation
Load Regulation
Output Ripple
Output Noise
Switching Frequency
Pulse Width Modulation Frequency
Output Supply
Efficiency at IISO (MAX)
IDD1, No VISO Load
IDD1, Full VISO Load
Thermal Shutdown
Shutdown Temperature
Thermal Hysteresis
Symbol
VISO
VISO (TC)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
VISO (NOISE)
fOSC
fPWM
IISO (MAX)
Min
Typ
3.3
−26
20
1.3
50
130
125
600
Max
3
30
IDD1 (Q)
IDD1 (MAX)
24
3.2
85
8
154
10
Unit
Test Conditions/Comments
V
μV/°C
mV/V
%
mV p-p
mV p-p
MHz
kHz
mA
%
mA
mA
IISO = 15 mA, R1 = 10 kΩ, R2 = 16.9 kΩ
IISO = 15 mA, VDD1 = 4.5 V to 5.5 V
IISO = 3 mA to 27 mA
20 MHz bandwidth, CBO = 0.1 µF||10 µF, IISO = 27 mA
CBO = 0.1 µF||10 µF, IISO = 27 mA
3.6 V > VISO > 3 V
IISO = 27 mA
°C
°C
Table 7. Input and Output Characteristics
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Undervoltage Lockout
Positive Going Threshold
Negative Going Threshold
Input Currents per Channel
Symbol
Min
VIH
VIL
0.7 VDDP
Typ
Max
Unit
0.3 VDDP
V
V
+10
V
V
µA
Test Conditions/Comments
VISO, VDDP supply
VUV+
VUV−
IPDIS
−10
2.7
2.4
+0.01
Rev. A | Page 5 of 16
0 V ≤ VPDIS ≤ VDDP
ADuM6010
Data Sheet
PACKAGE CHARACTERISTICS
Table 8. Thermal and Isolation Characteristics
Parameter
Resistance (Input to Output) 1
Capacitance (Input to Output)1
Input Capacitance 2
IC Junction-to-Ambient Thermal
Resistance
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1012
2.2
4.0
50
Max
Unit
Ω
pF
pF
°C/W
Test Conditions/Comments
f = 1 MHz
Thermocouple located at center of package underside,
test conducted on 4-layer board with thin traces 3
1
The device is considered a 2-terminal device: Pin 1 through Pin 10 are shorted together; and Pin 11 through Pin 20 are shorted together.
Input capacitance is from any input data pin to ground.
3
See the Thermal Analysis section for thermal model definitions.
2
REGULATORY APPROVALS
Table 9.
UL (Pending) 1
Recognized under 1577 component
recognition program1
Single protection, 3750 V rms
isolation voltage
File E214100
CSA (Pending)
Approved under CSA Component
Acceptance Notice #5A
Reinforced insulation per CSA 60950-1-03
and IEC 60950-1, 265 V rms (375 V peak)
maximum working voltage
File 205078
VDE (Pending)2
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10):2006-12 2
Reinforced insulation, 849 V peak
File 2471900-4880-0001
1
In accordance with UL 1577, each ADuM6010 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection
limit = 10 µA).
2
In accordance with DIN V VDE V 0884-10, each ADuM6010 is proof tested by applying an insulation test voltage ≥1590 V peak for 1 second (partial discharge
detection
limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 10. Critical Safety-Related Dimensions and Material Properties
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol Value
3750
L(I01)
5.3
Unit Test Conditions/Comments
V rms 1-minute duration
mm
Measured from input terminals to output terminals,
shortest distance through air
5.3
mm
Measured from input terminals to output terminals,
shortest distance path along body
0.022 min mm
Distance through insulation
>400
V
DIN IEC 112/VDE 0303, Part 1
II
Material group (DIN VDE 0110, 1/89, Table 1)
Minimum External Tracking (Creepage)
L(I02)
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
Rev. A | Page 6 of 16
Data Sheet
ADuM6010
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
the protective circuits. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval.
Table 11. VDE Characteristics
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method b1
Test Conditions/Comments
VIORM × 1.875 = Vpd(m), 100% production test,
tini = tm = 1 sec, partial discharge < 5 pC
Input-to-Output Test Voltage, Method a
After Environmental Tests Subgroup 1
After Input and/or Safety Test Subgroup 2 and
Subgroup 3
Highest Allowable Overvoltage
Withstand Isolation Voltage
Surge Isolation Voltage
Safety Limiting Values
Case Temperature
Safety Total Dissipated Power
Insulation Resistance at TS
VIORM × 1.5 = Vpd(m), tini = 60 sec,
tm = 10 sec, partial discharge < 5 pC
VIORM × 1.2 = Vpd(m), tini = 60 sec,
tm = 10 sec, partial discharge < 5 pC
1 minute withstand rating
VIOSM(TEST) = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time
Maximum value allowed in the event of a failure
(see Figure 2)
VIO = 500 V
Symbol
Characteristic
Unit
VIORM
Vpd(m)
I to IV
I to IV
I to III
40/105/21
2
849
1592
V peak
V peak
Vpd(m)
1273
V peak
Vpd(m)
1018
V peak
VIOTM
VISO
VIOSM
5300
3750
6000
V peak
V rms
V peak
TS
IS1
RS
150
2.5
>109
°C
W
Ω
3.0
SAFE LIMITING POWER (W)
2.5
2.0
1.5
1.0
0
0
50
100
150
AMBIENT TEMPERATURE (°C)
200
11043-002
0.5
Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case Temperature, per DIN V VDE V 0884-10
RECOMMENDED OPERATING CONDITIONS
Table 12.
Parameter
Operating Temperature 1
Supply Voltages 2
VDD1 at VSEL = 0 V
VDD1 at VSEL = VISO
1
2
Symbol
TA
Min
−40
Max
+105
Unit
°C
VDD
3.0
4.5
5.5
5.5
V
V
Operation at 105°C requires reduction of the maximum load current as specified in Table 13.
Each voltage is relative to its respective ground.
Rev. A | Page 7 of 16
ADuM6010
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 13.
Parameter
Storage Temperature (TST)
Ambient Operating Temperature (TA)
Supply Voltages (VDDP, VISO) 1
VISO Supply Current 2
TA = −40°C to +105°C
Input Voltage (PDIS, VSEL)1, 3
Common-Mode Transients 4
1
Rating
−55°C to +150°C
−40°C to +105°C
−0.5 V to +7.0 V
30 mA
−0.5 V to VDD + 0.5 V
−100 kV/µs to +100 kV/µs
All voltages are relative to their respective ground.
The VISO provides current for dc and dynamic loads on the VISO I/O
channels. This current must be included when determining the total
VISO supply current.
3
VDD can be either VDDP or VISO depending on the whether the input is on
the primary or secondary side of the part respectively.
4
Refers to common-mode transients across the insulation barrier.
Common-mode transients exceeding the absolute maximum ratings may
cause latch-up or permanent damage.
2
Table 14. Maximum Continuous Working Voltage
Supporting 50-Year Minimum Lifetime1
Parameter
AC Voltage
Bipolar Waveform
Max
Unit
560
V peak
Unipolar Waveform
DC Voltage
|DC Peak Voltage|
560
V peak
560
V peak
1
Applicable
Certification
All certifications,
50-year operation
Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.
ESD CAUTION
Rev. A | Page 8 of 16
Data Sheet
ADuM6010
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC 1
20
NC
GNDP 2
19
GNDISO
NC 3
18
NC
NC 4
17
NC
16
GNDISO
ADuM6010
TOP VIEW
(Not to Scale)
GNDP 6
15
GNDISO
NC 7
14
NC
PDIS 8
13
VSEL
VDDP 9
12
GNDP 10
11
VISO
GNDISO
NOTES
1. PINS LABELED NC CAN BE ALLOWED
TO FLOAT, BUT IT IS BETTER TO
CONNECT THESE PINS TO GROUND.
AVOID ROUTING HIGH SPEED SIGNALS
THROUGH THESE PINS BECAUSE NOISE
COUPLING MAY RESULT.
11043-003
GNDP 5
Figure 3. Pin Configuration
Table 15. Pin Function Descriptions
Pin No.
1, 3, 4, 7, 14,
17, 18, 20
2, 5, 6, 10
Mnemonic
NC
Description
This pin is not connected internally (see Figure 3).
GNDP
8
PDIS
Ground 1. Ground reference for isolator primary. Pin 2 and Pin 10 are internally connected, and it is recommended
that all pins be connected to a common ground.
Power Disable. When this pin is tied to GNDP the power converter is active; when a logic high voltage is applied,
the power supply enters a low power standby mode.
Primary Supply Voltage, 3.0 V to 5.5 V.
Ground Reference for Isolator Side 2. Pin 19 and Pin 11 are internally connected, and it is recommended that all pins
be connected to a common ground.
Secondary Supply Voltage Output for External Loads, 3.15 V to 5.5 V depending on voltage divider connected
to VSEL.
Output Voltage select input. A voltage divider attached to this pin between VISO and GNDISO determines the
value of VISO, see Equation 1.
9
VDDP
11, 15, 16, 19 GNDISO
12
VISO
13
VSEL
TRUTH TABLE
Table 16. Truth Table (Positive Logic)
VDDP (V)
5
5
3.3
3.3
5
5
3.3
3.3
VSEL Input
R1 = 10 kΩ, R2 = 30.9 kΩ
R1 = 10 kΩ, R2 = 30.9 kΩ
R1 = 10 kΩ, R2 = 16.9 kΩ
R1 = 10 kΩ, R2 = 16.9 kΩ
R1 = 10 kΩ, R2 = 16.9 kΩ
R1 = 10 kΩ, R2 = 16.9 kΩ
R1 = 10 kΩ, R2 = 30.9 kΩ
R1 = 10 kΩ, R2 = 30.9 kΩ
PDIS Input
Low
High
Low
High
Low
High
Low
High
VISO Output (V)
5
0
3.3
0
3.3
0
5
0
Rev. A | Page 9 of 16
Notes
Configuration not recommended
ADuM6010
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
2.0
35
1.8
0.50
IDDP
POWER DISSIPATION
0.45
20
VDDP = 5V/VISO = 5V
VDDP = 5V/VISO = 3.3V
VDDP = 3.3V/VISO = 3.3V
15
10
5
0
0.02
0.04
0.06
0.08
LOAD CURRENT (A)
Figure 4. Typical Power Supply Efficiency at 5 V/5 V, 5 V/3.3 V, and 3.3 V/3.3 V
0.40
1.4
0.35
1.2
0.30
1.0
0.25
0.8
0.20
0.6
0.15
0.4
0.10
0.2
0.05
0
3.0
11043-004
0
1.6
3.5
4.0
4.5
5.0
VDDP INPUT VOLTAGE (V)
5.5
0
6.0
Figure 7. Typical Short-Circuit Input Current and Power vs. VDDP Supply Voltage
450
VISO (100mV/DIV)
350
300
250
200
150
100
0
0
10
20
30
40
IISO (mA)
10% LOAD
Figure 5. Typical Total Power Dissipation vs. IISO
(1ms/DIV)
11043-008
90% LOAD
VDDP = 5V/VISO = 5V
VDDP = 5V/VISO = 3.3V
VDDP = 3.3V/VISO = 3.3V
11043-005
POWER DISSIPATION (mW)
400
50
Figure 8. Typical VISO Transient Load Response, 5 V Input, 5 V Output,
10% to 90% Load Step
35
VISO (100mV/DIV)
30
20
15
90% LOAD
10
VDDP = 5V/VISO = 5V
VDDP = 5V/VISO = 3.3V
VDDP = 3.3V/VISO = 3.3V
0
25
50
IDDP (mA)
75
100
11043-006
0
10% LOAD
Figure 6. Typical Isolated Output Supply Current, IISO, as a Function of External
Load, at 5 V/5 V, 5 V/3.3 V, and 3.3 V/3.3 V
Rev. A | Page 10 of 16
(1ms/DIV)
11043-009
IISO (mA)
25
5
IDDP CURRENT (A)
25
11043-007
POWER DISSIPATION (W)
EFFICIENCY (%)
30
Figure 9. Typical Transient Load Response, 3.3 V Input 3.3 V Output,
10% to 90% Load Step
Data Sheet
ADuM6010
5.0
90% LOAD
4.0
3.5
3.0
30mA LOAD
20mA LOAD
10mA LOAD
2.5
2.0
3.0
11043-010
10% LOAD
(1ms/DIV)
3.5
4.0
4.5
5.0
5.5
6.0
OUTPUT VOLTAGE (V)
11043-113
MINIMUM INPUT VOLTAGE (V)
VISO (100mV/DIV)
4.5
Figure 13. Relationship Between Output Voltage and Required Input Voltage,
Under Load, to Maintain >80% Duty Factor in the PWM
Figure 10. Typical Transient Load Response, 5 V Input, 3.3 V Output,
10% to 90% Load Step
500
4.970
450
POWER DISSIPATION (mW)
4.965
4.955
4.950
4.945
300
250
VDDP = 5V/VISO = 5V
200
VDDP = 5V/VISO = 3.3V
150
0
1
2
3
4
TIME (µs)
100
–40
11043-011
4.940
350
Figure 11. Typical VISO = 5 V Output Voltage Ripple at 90% Load
–20
0
20
40
60
80
AMBIENT TEMPERATURE (°C)
100
120
11043-114
VISO (V)
4.960
400
Figure 14. Power Dissipation with a 30 mA Load vs. Temperature
500
3.280
450
POWER DISSIPATION (mW)
3.276
3.274
VDDP = 5V/VISO = 5V
VDDP = 3.3V/VISO = 3.3V
VDDP = 5V/VISO = 3.3V
400
350
300
250
200
3.272
3.270
0
1
2
3
4
TIME (µs)
100
–40
–20
0
20
40
60
80
AMBIENT TEMPERATURE (°C)
100
120
Figure 15. Power Dissipation with a 20 mA Load vs. Temperature
Figure 12. Typical VISO = 3.3 V Output Voltage Ripple at 90% Load
Rev. A | Page 11 of 16
11043-115
150
11043-012
VISO (V)
3.278
ADuM6010
Data Sheet
APPLICATIONS INFORMATION
PDIS
8
VDDP
10µF
Typically, the ADuM6010 dissipates about 17% more power
between room temperature and maximum temperature; therefore, the 20% PWM margin covers temperature variations.
The ADuM6010 implements undervoltage lockout (UVLO)
with hysteresis on the primary and secondary sides I/O pins
as well as the VDDP power input. This feature ensures that the
converter does not go into oscillation due to noisy input power
or slow power-on ramp rates.
0.1µF
9
10
13
12
11
VSEL
30kΩ
VISO
GNDISO
0.1µF
10kΩ
10µF
+
Figure 17. VISO Bias and Bypass Components
The power supply section of the ADuM6010 uses a 125 MHz
oscillator frequency to efficiently pass power through its chipscale transformers. Bypass capacitors must do more than one
job and must be chosen carefully. Noise suppression requires a
low inductance, high frequency capacitor; ripple suppression
and proper regulation require a large value bulk capacitor.
These capacitors are most conveniently connected between
Pin 9 and Pin 10 for VDDP and between Pin 11 and Pin 12 for VISO.
To suppress noise and reduce ripple, a parallel combination of at
least two capacitors is required. The recommended capacitor
values are 0.1 µF and 10 µF for VDD1. The smaller capacitor
must have a low ESR; for example, use of an NPO or X5R ceramic
capacitor is advised. Ceramic capacitors are also recommended for
the 10 mF bulk capacitance. An additional 10 nF capacitor can be
added in parallel if further EMI/EMC control is desired.
Note that the total lead length between the ends of the low ESR
capacitor and the input power supply pin must not exceed 2 mm.
GNDISO
GNDP
ADuM6010
PDIS
VSEL
VDDP
VISO
GNDP
GNDISO
BYPASS < 2mm
11043-015
Because the output voltage can be adjusted continuously
there are an infinite number of operating conditions. This
data sheet addresses three discrete operating conditions in the
Specifications tables. Many other combinations of input and
output voltage are possible; Figure 13 depicts the supported
voltage combinations at room temperature. Figure 13 was
generated by fixing the VISO load and decreasing the input
voltage until the PWM was at 80% duty cycle. Each of the
curves represents the minimum input voltage that is required
for operation under this criterion. For example, if the application requires 30 mA of output current at 5 V, the minimum
input voltage at VDDP is 4.25 V. Figure 13 also illustrates why
the VDDP = 3.3 V input and VISO = 5 V configuration is not
recommended. Even at 10 mA of output current, the PWM
cannot maintain less than 80% duty factor, leaving no margin
to support load or temperature variations.
GNDP
Figure 16. VDDP Bias and Bypass Components
(1)
where:
R1 is a resistor between VSEL and GNDISO.
R2 is a resistor between VSEL and VISO.
+
11043-014
VISO
(R1 + R2)
= 1.25 V
R1
the power effectively as well as to set the output voltage and
to bypass the core voltage regulator (see Figure 16 through
Figure 18).
11043-013
The dc-to-dc converter section of the ADuM6010 works on
principles that are common to most modern power supplies.
It has split controller architecture with isolated pulse-width
modulation (PWM) feedback. VDDP power is supplied to an
oscillating circuit that switches current into a chip-scale air core
transformer. Power transferred to the secondary side is rectified
and regulated to a value between 3.15 V and 5.25 V depending
on the setpoint supplied by an external voltage divider (see
Equation 1). The secondary (VISO) side controller regulates
the output by creating a PWM control signal that is sent to the
primary (VDDP) side by a dedicated iCoupler data channel. The
PWM modulates the oscillator circuit to control the power being
sent to the secondary side. Feedback allows for significantly higher
power and efficiency.
Figure 18. Recommended PCB Layout
PCB LAYOUT
The ADuM6010 digital isolator, with a 0.15 W isoPower integrated
dc-to-dc converter, requires no external interface circuitry
for the logic interfaces. Power supply bypassing with a low ESR
capacitor is required as close to the chip pads as possible. The
isoPower inputs require several passive components to bypass
In applications involving high common-mode transients, design
the board layout such that any coupling that does occur equally
affects all pins on a given component side. Failure to ensure this can
cause voltage differentials between pins, exceeding the absolute
maximum ratings specified in Table 13, and thereby leading to
latch-up and/or permanent damage.
Rev. A | Page 12 of 16
Data Sheet
ADuM6010
EMI CONSIDERATIONS
The dc-to-dc converter section of the ADuM6010 components
must, of necessity, operate at a very high frequency to allow
efficient power transfer through the small transformers. This
creates high frequency currents that can propagate in circuit
board ground and power planes, causing edge and dipole
radiation. Grounded enclosures are recommended for applications that use these devices. If grounded enclosures are not
possible, follow good RF design practices in the layout of the
PCB. See the AN-0971 Application Note at www.analog.com for
the most current PCB layout recommendations for the ADuM6010.
Bipolar ac voltage is the most stringent environment. A 50-year
operating lifetime under the bipolar ac condition determines
the Analog Devices recommended maximum working voltage.
In the case of unipolar ac or dc voltage, the stress on the insulation
is significantly lower. This allows operation at higher working
voltages while still achieving a 50-year service life. The working
voltages listed in Table 14 can be applied while maintaining the
50-year minimum lifetime, provided the voltage conforms to either
the unipolar ac or dc voltage cases. Any cross-insulation voltage
waveform that does not conform to Figure 20 or Figure 21 must
be treated as a bipolar ac waveform, and its peak voltage must
be limited to the 50-year lifetime voltage value listed in Table 14.
INSULATION LIFETIME
RATED PEAK VOLTAGE
0V
Figure 19. Bipolar AC Waveform
RATED PEAK VOLTAGE
0V
All insulation structures eventually break down when subjected to
voltage stress over a sufficiently long period. The rate of insulation
degradation is dependent on the characteristics of the voltage
waveform applied across the insulation. Analog Devices conducts
an extensive set of evaluations to determine the lifetime of the
insulation structure within the ADuM6010.
Accelerated life testing is performed using voltage levels higher
than the rated continuous working voltage. Acceleration factors for
several operating conditions are determined, allowing calculation
of the time to failure at the working voltage of interest. The values
shown in Table 14 summarize the peak voltages for 50 years of
service life in several operating conditions. In many cases, the
Rev. A | Page 13 of 16
Figure 20. DC Waveform
RATED PEAK VOLTAGE
0V
NOTES
1. THE VOLTAGE IS SHOWN AS SINU SOIDAL FOR ILLUSTRATION
PUPOSES ONLY. IT IS MEANT TO REPRESENT ANY VOLTAGE
WAVEFORM VARYING BETWEEN 0V AND SOME LIMITING VALUE.
THE LIMITING VALUE CAN BE POSITIVE OR NEGATIVE,
BUT THE VOLTAGE CANNOT CROSS 0V.
Figure 21. Unipolar AC Waveform
11043-018
Power dissipation in the part varies with ambient temperature
due to the characteristics of the switching and rectification
elements. Figure 14 and Figure 15 show the relationship
between total power dissipation at two load conditions
and ambient temperature. This information can be used
to determine the junction temperature at various operating
conditions to ensure that the part does not go into thermal
shutdown unexpectedly.
The insulation lifetime of the ADuM6010 depends on the voltage
waveform type imposed across the isolation barrier. The iCoupler
insulation structure degrades at different rates, depending on
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 19,
Figure 20, and Figure 21 illustrate these different isolation voltage
waveforms.
11043-016
The ADuM6010 consist of two internal die attached to a split lead
frame with two die attach paddles. For the purposes of thermal
analysis, the chip is treated as a thermal unit, with the highest
junction temperature reflected in the θJA from Table 8. The value
of θJA is based on measurements taken with the parts mounted
on a JEDEC standard, 4-layer board with fine width traces and
still air. Under normal operating conditions, the ADuM6010
can operate at full load across the full temperature range without
derating the output current.
working voltage approved by agency testing is higher than the
50-year service life voltage. Operation at working voltages
higher than the service life voltage listed leads to premature
insulation failure.
11043-017
THERMAL ANALYSIS
ADuM6010
Data Sheet
OUTLINE DIMENSIONS
7.50
7.20
6.90
20
11
5.60
5.30
5.00
1
8.20
7.80
7.40
10
0.65 BSC
0.38
0.22
SEATING
PLANE
8°
4°
0°
0.95
0.75
0.55
COMPLIANT TO JEDEC STANDARDS MO-150-AE
060106-A
0.05 MIN
COPLANARITY
0.10
0.25
0.09
1.85
1.75
1.65
2.00 MAX
Figure 22. 20-Lead Shrink Small Outline Package [SSOP]
(RS-20)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1, 2
ADuM6010ARSZ
ADuM6010ARSZ-RL7
1
2
Temperature Range
−40°C to +105°C
−40°C to +105°C
Package Description
20-Lead SSOP
20-Lead SSOP
Tape and reel are available. The addition of an RL suffix designates a 7” tape and reel option.
Z = RoHS Compliant Part.
Rev. A | Page 14 of 16
Package Option
RS-20
RS-20
Data Sheet
ADuM6010
NOTES
Rev. A | Page 15 of 16
ADuM6010
Data Sheet
NOTES
©2012–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11043-0-5/13(A)
Rev. A | Page 16 of 16
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