NSC DS96F174CJ Quad differential driver Datasheet

DS96F172C/DS96F172M/DS96F174C/DS96F174M
EIA-485/EIA-422 Quad Differential Drivers
General Description
Features
The DS96F172 and the DS96F174 are high speed quad differential line drivers designed to meet EIA-485 Standards.
The DS96F172 and the DS96F174 offer improved performance due to the use of L-FAST bipolar technology. The use
of LFAST technology allows the DS96F172 and DS96F174
to operate at higher speeds while minimizing power consumption.
The DS96F172 and the DS96F174 have TRI-STATE ® outputs and are optimized for balanced multipoint data bus
transmission at rates up to 15 Mbps. The drivers have wide
positive and negative common mode range for multipoint applications in noisy environments. Positive and negative
current-limiting is provided which protects the drivers from
line fault conditions over a +12V to −7.0V common mode
range. A thermal shutdown feature is also provided. The
DS96F172 features an active high and active low Enable,
common to all four drivers. The DS96F174 features separate
active high Enables for each driver pair.
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Logic Diagrams
Function Tables
DS96F172
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Meets EIA-485 and EIA-422 standards
Monotonic differential output switching
TRI-STATE outputs
Designed for multipoint bus transmission
Common mode output voltage range: −7.0V to +12V
Operates from single +5.0V supply
Reduced power consumption
Thermal shutdown protection
DS96F172 and DS96F174 are lead and function
compatible with the SN75172/174 or the
AM26LS31/MC3487
Military temperature range available
Qualified for MIL-STD-883C
Standard military drawings available (SMD)
Available in DIP (J), LCC (E), and Flatpak (W) packages
(Each Driver)
DS96F172
Input
DS009625-14
Enable
Outputs
A
E
E
Y
H
H
X
H
L
L
H
X
L
H
H
X
L
H
L
L
X
L
L
H
X
L
H
Z
Z
Z
DS96F174
DS96F174
DS009625-15
Input
Enable
A
E
Y
Outputs
H
H
H
L
L
H
L
H
X
L
Z
Z
Z
H = High Level
L = Low Level
X = Don’t Care
Z = High Impedance (Off)
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS009625
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DS96F172C/DS96F172M/DS96F174C/DS96F174M EIA-485/EIA-422 Quad Differential Drivers
June 1998
COMMERCIAL
Absolute Maximum Ratings (Note 2)
Recommended Operating
Conditions
Specifications for the 883 version of this product are
listed separately on the following pages.
Min
Supply Voltage (VCC)
DS96F172C/DS96F174C 4.75
Common Mode
−7.0
Output Voltage (VOC)
Output Current HIGH (IOH)
Output Current LOW (IOL)
Operating Temperature
(TA)
DS96F172C/DS96F174C
0
−65˚C to +175˚C
Storage Temperature Range (TSTG)
Lead Temperature (Soldering, 60 sec.)
300˚C
Maximum Package Power Dissipation (Note 1) at 25˚C
Ceramic DIP (J)
1500 mW
Supply Voltage
7.0V
Enable Input Voltage
5.5V
Typ
Max
Units
5.0
5.25
+12.0
V
V
−60
60
mA
mA
+70
˚C
Note 1: Derate “J” package 10 mW/˚C above 25˚C.
Electrical Characteristics (Notes 3, 4)
Over recommended supply voltage and operating temperature range, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max Units
(Note 2)
VIH
Input Voltage HIGH
VIL
Input Voltage LOW
2.0
VOH
Output Voltage HIGH
IOH = −33 mA
TA = 0˚C to +70˚C
VOL
Output Voltage LOW
IOL = 33 mA
TA = 0˚C to +70˚C
VIC
Input Clamp Voltage
II = −18 mA
|VOD1|
Differential Output Voltage
IO = 0 mA
|VOD2|
Differential Output Voltage
RL = 54Ω, Figure 1
V
TA = 0˚C to +70˚C
0.8
TA = −55˚C to +125˚C
TA = −55˚C
V
0.7
3.0
V
2.0
1.2
V
−1.5
V
6.0
V
2.0
V
1.5
RL = 100Ω, Figure 1
2.0
VOD
Differential Output Voltage
Figure 2
TA = 0˚C to +70˚C
∆|VOD|
Change in Magnitude of Differential
RL = 54Ω or 100Ω,
−40˚C to +125˚C
Output Voltage (Note 5)
Figure 1
−55˚C to +125˚C
Common Mode Output Voltage
(Note 6)
Change in Magnitude of Common
VOC
∆|VOC|
2.3
1.0
V
± 0.2
± 0.4
V
RL = 54Ω or 100Ω, Figure 1
3.0
V
RL = 54Ω or 100Ω, Figure 1
± 0.2
V
± 50
± 50
µA
V
Mode Output Voltage (Note 5)
IO
Output Current with Power Off
VCC = 0V, VO = −7.0V to +12V
IOZ
High Impedance State Output
Current
VO = −7.0V to +12V
IIH
Input Current HIGH
VI = 2.4V
20
µA
IIL
Input Current LOW
VI = 0.4V
−50
µA
IOS
Short Circuit Output Current
VO = −7.0V
−250
(Note 7)
VO = 0V
−150
VO = VCC
150
± 20
VO = +12V
ICC
Supply Current (All Drivers)
mA
250
No Load
ICCX
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µA
2
Outputs Enabled
50
Outputs Disabled
30
mA
COMMERCIAL
Switching Characteristics
VCC = 5.0V, TA = 25˚C
Symbol
Parameter
tDD
Differential Output Delay Time
tTD
Differential Output Transition Time
tPLH
Propagation Delay Time,
Conditions
RL = 60Ω, Figure 3
RL = 27Ω, Figure 4
Min
Typ
Max
Units
15
20
ns
15
22
ns
12
16
ns
12
16
ns
Low-to-High Level Output
tPHL
Propagation Delay Time,
High-to-Low Level Output
tZH
Output Enable Time to High Level
RL = 110Ω, FIgure 4
25
32
ns
tZL
Output Enable Time to Low Level
RL = 110Ω, Figure 6
25
32
ns
tHZ
Output Disable Time from High Level
RL = 110Ω, Figure 5
25
30
ns
tLZ
Output Disable Time from Low Level
RL = 110Ω, Figure 6
20
25
tLZL
Output Disable Time from Low Level
Figure 6
300
RL = 60Ω
1.0
ns
ns
with Load Resistor to GND (Note 8)
tSKEW
Driver Output to Output
4.0
ns
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation.
Note 3: Unless otherwise specified min/max limits apply across the 0˚C to +70˚C range for the DS96F172C/DS96F174C. All typicals are given for VCC = 5V and TA
= 25˚C.
Note 4: All currents into the device pins are positive; all currents out of the device pins are negative. All voltages are reference to ground unless otherwise specified.
Note 5: ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC respectively, that occur when the input is changed from a high level to a low level.
Note 6: In EIA-422A and EIA-485 standards, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage, VOS.
Note 7: Only one output at a time should be shorted.
Note 8: For more information see Application Bulletin, contact Product Marketing.
Order Number: DS96F172CN
DS96F174CJ
DS96F174CN
NS Package Number J16A or N16E
3
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MIL-STD-883C
Absolute Maximum Ratings (Note 2)
Recommended Operating
Conditions
For complete Military Specifications, refer to the appropriate SMD or MDS.
−65˚C to +175˚C
Storage Temperature Range (TSTG)
Lead Temperature (Soldering, 60 sec.)
300˚C
Maximum Package Power Dissipation (Note 9) at 25˚C
Ceramic LCC (E)
2000 mW
Ceramic DIP (J)
1800 mW
Ceramic Flatpak (W)
1000 mW
Supply Voltage
7.0V
Enable Input Voltage
5.5V
Supply Voltage (VCC)
DS96F172M/DS96F174M
Common Mode
Output Voltage (VOC)
Output Current HIGH (IOH)
Output Current LOW (IOL)
Operating Temperature (TA)
DS96F172M/DS96F174M
Min
Typ
Max
Units
4.50
−7.0
5.0
5.50
+12.0
V
V
−60
60
mA
mA
−55
+125
Note 9: Above TA = 25˚C, derate “E” package 13.4, “J” package 12.5, “W”
package 7.1 mW/˚C
Electrical Characteristics (Notes 3, 4)
Over recommended supply voltage and operating temperature range unless otherwise specified
Symbol
Parameter
Conditions
Min
Max
Units
0.8
V
VIH
Input Voltage HIGH
2.0
VIL
Input Voltage LOW
VIC
Input Clamp Voltage
II = −18 mA
−1.5
V
|VOD1|
Differential Output Voltage
IO = 0 mA
6.0
V
|VOD2|
Differential Output Voltage
TA = 25˚C
TA = −55˚C, or +125˚C
RL = 54Ω, VCC = 4.5V
TA = −55˚C
Figure 1
TA = 25˚C, or +125˚C
RL = 100Ω, VCC = 4.5V, Figure 1
∆|VOD|
VOC
∆|VOC|
V
0.7
1.2
1.5
V
2.0
± 0.2
± 0.4
V
3.0
V
RL = 54Ω or 100Ω, VCC = 4.5V, Figure 1
± 0.2
V
± 50
± 50
µA
Change in Magnitude of Differential
RL = 54Ω or 100Ω,
TA = 25˚C, or +125˚C
Output Voltage (Note 5)
VCC = 4.5V, Figure 1
−55˚C
Common Mode Output Voltage
(Note 6)
RL = 54Ω or 100Ω, Figure 1
Change in Magnitude of Common
V
Mode Output Voltage (Note 5)
IO
Output Current with Power Off
VCC = 0V, VO = −7.0V to +12V
IOZ
High Impedance State Output Current
VO = −7.0V to +12V
IIH
Input Current HIGH
VI = 2.4V
20
µA
IIL
Input Current LOW
VI = 0.4V
−50
µA
IOS
Short Circuit Output Current
VO = −7.0V
−250
VO = 0V
−150
VO = VCC
150
(Note 7)
VO = +12V
ICC
Supply Current (All Drivers)
mA
250
No Load
ICCX
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µA
4
Outputs Enabled
50
Outputs Disabled
30
mA
MIL-STD-883C
Switching Characteristics
VCC = 5.0V
Symbol
Parameter
Conditions
TA = 25˚C
Typ
Max
TA = 55˚C
TA = 125˚C
Max
Max
Units
tDD
Differential Output Delay Time
RL = 60Ω, CL = 15 pF,
15
22
30
30
ns
tTD
Differential Output Transition Time
Figure 3
15
22
40
40
ns
Propagation Delay Time,
RL = 27Ω, CL = 15 pF,
12
16
25
25
ns
Low-to-High Level Output
Figure 4
12
16
25
25
ns
tPLH
tPHL
Propagation Delay Time,
High-to-Low Level Output
tZH
Output Enable Time to High Level
RL = 110Ω, Figure 5
25
32
40
40
ns
tZL
Output Enable Time to Low Level
RL = 110Ω, Figure 6
25
35
100
100
ns
tHZ
Output Disable Time from High Level
RL = 110Ω, Figure 5,
25
30
80
80
ns
25
40
40
ns
Note 13
tLZ
Output Disable Time from Low Level
RL = 110Ω, Figure 6
20
tLZL
Output Disable Time from Low Level
Figure 6
300
RL = 60Ω
1.0
ns
with Load Resistor to GND (Note 12)
tSKEW
Driver Output to Output
4.0
10
10
ns
SMD Numbers: DS96F172MJ/883 5962-9076501MEA
DS96F174MJ/883 5962-9076502MEA
DS96F172ME/883 5962-9076501M2A
DS96F174MW/883 5962-9076502MFA
DS96F174ME/883 5962-9076502M2A
Order Number: DS96F172MJ/883, DS96F174MJ/883
NS Package Number J16A
DS96F172ME/883, DS96F174ME/883
NS Package Number E20A
DS96F172MW-MIL, DS96F174MW/883
NS Package Number W16A
For Complete Military Product Specifications, refer to the appropriate SMD or MDS.
Parameter Measurement Information
DS009625-13
DS009625-3
FIGURE 2. Differential Output Voltage with
Varying Common Mode Voltage
FIGURE 1. Differential and Common
Mode Output Voltage
5
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Parameter Measurement Information
(Continued)
DS009625-5
DS009625-4
FIGURE 3. Differential Output Delay and Transition Times
DS009625-6
DS009625-7
FIGURE 4. Propagation Delay Times
DS009625-9
DS009625-8
FIGURE 5. tZH and tHZ
DS009625-11
DS009625-10
FIGURE 6. tZL, tLZ, tLZL
Note 10: The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, duty cycle = 50%, tr ≤ 5.0 ns, tf ≤ 5.0 ns, ZO = 50Ω.
Note 11: CL includes probe and jig capacitance.
Note 12: DS96F172 with active high and active low Enables is shown. DS96F174 has active high Enable only.
Note 13: To test the active low Enable E of DS96F172 ground E and apply an inverted waveform to E . DS96F174 has active high Enable only.
Note 14: For more information see Application Bulletin, Contact Product Marketing.
Note 15: Not tested for DS96F172MW-MIL device.
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6
Typical Application
DS009625-12
The line length should be terminated at both ends in its characteristic impedance.
Stub lengths off the main line should be kept as short as possible.
Connection Diagrams
16-Lead Ceramic Dual-In-Line Package
NS Package Number J16A
DS96F172
DS96F174
DS009625-1
DS009625-2
Top View
Top View
20-Lead Ceramic Leadless Chip Carrier
NS Package Number E20A
DS009625-18
DS009625-19
NC = No connection
Top View
Top View
7
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Connection Diagrams
(Continued)
16-Lead Ceramic Flatpak
NS Package Number W16A
DS009625-1
DS009625-2
Top View
Top View
Order Numbers are located at the end of the respective Electrical Tables.
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8
9
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Ceramic Leadless Chip Carrier (E)
Order Number DS96F172ME/883, DS96F174ME/883
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package (J)
Order Number DS96F172MJ/883,
DS96F174CJ, DS96F174MJ/883
NS Package Number J16A
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10
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Ceramic Flatpack (W)
Order Number DS96F172MW/883, DS96F174MW/883
NS Package Number W16A
Molded Dual-In-Line Package (N)
Order Number DS96F172CN, or DS96F174CN
NS Package Number N16E
11
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DS96F172C/DS96F172M/DS96F174C/DS96F174M EIA-485/EIA-422 Quad Differential Drivers
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2. A critical component in any component of a life support
1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into
sonably expected to cause the failure of the life support
the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness.
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
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