LINER LTC3705IGN 2-switch forward controller and gate driver Datasheet

LTC3705
2-Switch Forward
Controller and Gate Driver
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FEATURES
DESCRIPTIO
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High-Speed Top and Bottom Gate Drivers for
2-Switch Forward Converter
On-Chip Rectifier and Self-Starting Architecture
Eliminate Need for Separate Gate Drive Bias
Supply
Wide Input Voltage Supply Range: 18V to 80V
Tolerant of 100V Input Voltage Transients
Linear Regulator Controller for Fast Start-Up
Precision UVLO with Adjustable Hysteresis
Overcurrent Protection
Volt-Second Limit Prevents Transformer Core
Saturation
Voltage Feedforward for Fast Transient Response
Available in 16-Lead Narrow SSOP Package
The LTC®3705 is a controller for a 2-switch forward
converter and includes on-chip bottom and top gate
drivers that do not require external transformers.
Isolated 48V Telecommunication Systems
Internet Servers and Routers
Distributed Power Step-Down Converters
Automotive and Heavy Equipment
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PolyPhase is a registered trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Patent Pending
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For secondary-side control, combine the LTC3705 with
the LTC3706 PolyPhase® secondary-side synchronous
forward controller to create a complete forward converter
using a minimum of discrete parts. A proprietary scheme
is used to multiplex gate drive signals across the isolation
barrier through a tiny pulse transformer. The on-chip
rectifier and the same pulse transformer provide gate drive
bias power.
Alternatively, the LTC3705 can be used as a standalone
voltage mode controller in a primary-side control architecture with optoisolator feedback. Voltage feedforward provides excellent line regulation and transient response.
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APPLICATIO S
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TYPICAL APPLICATIO
36V –72V to 3.3V/20A Isolated 2-Switch Forward Converter
VIN+
T1
•
Si7852DP
1µF
100V
x3
VOUT+
L1
1.2µH
MURS120
1.2Ω
•
330µF
6.3V
×3
Si7336ADP
×2
Si7852DP
Si7336ADP
CMPSH1-4
MURS120
2mΩ
2W
30mΩ
1W
VIN–
10µF
VOUT–
CZT3019
100k
FQT7N10
365k
NDRV
BOOST TG TS BG IS
UVLO
FB/IN+
VCC
2.2µF
15k
1µF
T2
•
•
LTC3705
SS/FLT
162k
IS–
IS+
PT +
FG
SW SG
VIN
NDRV
102k
VCC
FS/SYNC
FB
LTC3706
ITH
PT –
RUN/SS GND PGND PHASE SLP MODE REGSD
FS/IN–
GND PGND VSLMT
33nF
2.2µF
L1: COILCRAFT SER2010-122
T1: PULSE PA0807
T2: PULSE PA0297
BAS21 0.22µF
680pF
20k
22.6k
33nF
3705 TA01
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LTC3705
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ABSOLUTE
AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
Power Supply (VCC) ...................................– 0.3V to 15V
External NMOS Drive (NDRV) ....................– 0.3V to 20V
NDRV to VCC ........................................................... – 0.3V to 5V
Bootstrap Supply (BOOST) ......................– 0.3V to 115V
Top Source (TS) .......................................... -5V to 100V
BOOST to TS .............................................– 0.3V to 15V
Soft-Start Fault, Feedback,
Frequency Set, Transformer
Inputs (SSFLT, FB/IN+, FS/IN–) ..................– 0.3V to 15V
All Other Pins (VSLMT, IS, UVLO) .................– 0.3V to 5V
Peak Output Current <1µs (TG, BG) ........................... 2A
Operating Ambient Temperature Range .. – 40°C to 85°C
Operating Junction Temperature (Note 2) ............ 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
GND 1
16 TS
IS 2
15 TG
VSLMT 3
14 BOOST
UVLO 4
13 NC
SSFLT 5
12 NC
NDRV 6
11 VCC
FB/IN+ 7
10 BG
FS/IN – 8
9
LTC3705EGN
LTC3705IGN
GN PART
MARKING
PGND
3705
3705I
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
TJMAX = 125°C, θJA = 110°C/W
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 12V, GND = PGND = VTS = 0V, TA = 25°C, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
7
12
15
UNITS
VCC Supply, Linear Regulator and Trickle Charger Shunt Regulator
VCCOP
Operating Voltage Range
VCCLR
Output Voltage
INDRV
Current into NDRV Pin
Linear Regulator in Operation
tr(VCC)
Rise Time of VCC
Linear Regulator Charging (0.5V to 7.5V)
INDRVTO
Linear Regulator Time Out Current Threshold
ICC
Linear Regulator in Operation
8
0.1
V
V
1
mA
45
µs
Primary-Side Operation
0.27
mA
Supply Current
VUVLO = 1.5V, Linear Regulator in
Operation (Note 3)
1.4
2.1
mA
ICCM
Maximum Supply Current
VUVLO = 1.5V, Trickle Charger in Operation,
VCC = 13.2V (Note 3)
1.7
2.5
mA
VCCSR
Maximum Supply Voltage
Trickle Charger Shunt Regulator
14.25
15
V
ICCSR
Minimum Current into NDRV/VCC
Trickle Charger Shunt Regulator, VCC = 15V
(Note 3)
10
mA
Internal Undervoltage
VCCUV
Internal Undervoltage Threshold
VCC Rising
VCC Falling
5.3
4.7
V
V
Gate Drive Undervoltage
VGDUV
Gate Drive Undervoltage Threshold
VCC Rising (Linear Regulator)
VCC Rising (Trickle Charger)
VCC Falling
●
●
●
7.2
13.1
6.8
7.4
13.4
7.0
7.7
14
7.2
V
V
V
Undervoltage Lockout (UVLO)
VUVLOR
Undervoltage Lockout Threshold Rising
Rising
●
1.220
1.242
1.280
V
VUVLOF
Undervoltage Lockout Threshold Falling
Falling
●
1.205
1.226
1.265
V
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LTC3705
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 12V, GND = PGND = VTS = 0V, TA = 25°C, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IHUVLO
Hysteresis Current
VUVLO = 1V
VUVLOOP
Voltage Feedforward Operating Range
Primary-Side Control
●
MIN
TYP
MAX
4.2
4.9
5.6
µA
3.75
V
VUVLOF(MIN)
UNITS
Gate Drivers (TG and BG)
ROS
Output Pull-Down Resistance
IOUT = 100mA
1.9
Ω
VOH
High Output Voltage
IOUT = –100mA
11
V
IPU
Peak Pull-Up Current
1.7
A
tr
Output Rise Time
10% to 90%, COUT = 4.7nF
40
ns
tf
Output Fall Time
10% to 90%, COUT = 4.7nF
70
ns
Rectifier
IRECT
Maximum Rectifier DC Output Current
25
mA
Oscillator
fOSC(P)
Oscillator Frequency
Primary-Side Control, RFS(P) = 100kΩ
Primary-Side Control, RFS(P) = 25kΩ
Primary-Side Control, RFS(P) = 300kΩ
200
700
70
kHz
kHz
kHz
∆fRFS(P)
Oscillator Resistor Set Accuracy
Primary-Side Control
25k < RFSET < 300k
±15
%
Secondary-Side Control (During Start-Up),
RFS(S) = 100kΩ
300
kHz
Primary-Side Control, VSSFLT = 2V
Secondary-Side Control, VUVLO = 1.3V,
VSSFLT = 2V
Secondary-Side Control, VUVLO = 3.75V,
VSSFLT = 2V
–5.2
–4
µA
µA
–1.6
µA
3.9
V
6.7
V
1
µA
300
mV
fOSC(S)
Oscillator Frequency
Soft-Start/Fault (SSFLT)
ISS(C)
Soft-Start Charge Current
VLRTO
Linear Regulator Time Out-Threshold
VFLTH
Fault Output High
VCC = 8V
ISS(D)
Soft-Start Discharge Current
Timing Out After Fault, VSSFLT = 2V
Current Sense Input (IS)
VIS(MAX)
Overcurrent Threshold
Volt Second Limit (VSLMT)
VVSL(MAX)
Volt-Second Limit Threshold
1.26
V
IVSLMT(MAX)
Maximum Volt-Second Limit Resistor Current
0.25
mA
Optoisolator Bias Current
VOPTO
Open Circuit Optoisolator Voltage
Primary-Side Control IFB = 0V
3.3
V
IOPTO
Optoisolator Bias Current
Primary-Side Control VFB = 2.5V
Primary-Side Control VFB = 0V
0.5
1.6
mA
mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Operating junction temperature TJ (in °C) is calculated from the
ambient temperature TA and the average power dissipation PD (in watts)
by the formula: TJ = TA + θJA • PD. Refer to the Applications Information
section for details.
Note 3: ICC is the sum of current into NDRV and VCC.
Note 4: The LTC3705EGN is guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3705IGN is
guaranteed and tested over the – 40°C to 85°C operating temperature
range.
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LTC3705
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TYPICAL PERFOR A CE CHARACTERISTICS
Boost Current vs Boost – TS
Voltage
Supply Current vs VCC
UVLO Voltage Threshold vs
Temperature
400
2.0
1.245
TRICKLE CHARGER
VTS = 80V
350
1.240
1.5
LINEAR REGULATOR
1.0
0.5
UVLO THRESHOLD (V)
300
IBOOST (µA)
CURRENT (mA)
(TA = 25°C unless otherwise specified)
250
VTS = 0V
200
150
100
VUVLOR
1.235
1.230
1.225
VUVLOF
50
5
0
0
15
10
5
0
15
10
VBOOST – VTS (V)
VCC (V)
3705 G01
3705 G02
UVLO Hysteresis Current vs
Temperature
203
700
5.00
fOSC (kHz)
IHUVLO (µA)
600
4.90
500
400
SECONDARY-SIDE CONTROL
300
200
4.85
100
PRIMARY-SIDE CONTROL
4.80
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
80
0
100
0
100
200
RFSET (kΩ)
300
3705 G10
201
200
PRIMARY-SIDE CONTROL
RFS(P) = 100kΩ
199
198
197
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
400
80
15
100
3705 G11
Shunt Regulator Current vs
Temperature
18
VGDUV vs Temperature
25
14
24
13
23
VCC RISING (TRICKLE CHARGER)
12
22
9
6
21
VGDUV (V)
ICCSR (mA)
12
20
19
18
11
10
9
8
17
3
14.25
14.50
VCC (V)
14.75
15.00
3705 G04
15
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
VCC RISING (LINEAR REGULATOR)
7
16
0
14.00
202
3705 G03
Shunt Regulator Current ICC
vs VCC
100
Oscillator Frequency vs
Temperature
800
4.95
80
3705 G09
Oscillator Frequency
fOSC vs RFSET
5.05
ICC (mA)
1.220
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
OSCILLATOR FREQUENCY fOSC(P) (kHz)
0
80
100
3705 G12
VCC FALLING (BOTH)
6
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
80
100
3705 G13
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LTC3705
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TYPICAL PERFOR A CE CHARACTERISTICS
Optoisolator Bias VFB/IN+ vs
IFB/IN+
Gate Drive Pull-Down Resistance
vs Temperature
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
–IFB/IN+ (mA)
1.5
2.0
2.0
1.9
2.25
IPU (A)
GATE DRIVE RESISTANCE ROS (Ω)
3.0
VFB/IN+ (V)
Gate Drive Peak Pull-Up Current
vs Temperature
2.50
3.5
0
(TA = 25°C unless otherwise specified)
2.00
1.8
1.7
1.75
1.6
1.50
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
80
100
1.5
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
3705 G14
3705 G05
Linear Regulator Start-Up
Fault Operation
TG
10V/DIV
FB/IN
5V/DIV
100
3705 G15
Gate Drive Encoding
VIN
80
BG
SSFLT
10V/DIV
NDRV
FS/IN–
2V/DIV
VCC
25µs/DIV
3705 G06
1µs/DIV
3705 G07
40ms/DIV
3705 G08
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LTC3705
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PI FU CTIO S
GND (Pin 1): Signal Ground.
IS (Pin 2): Input to the Overcurrent Comparator. Connect
to the positive terminal of a current-sense resistor in
series with the source of the ground-referenced bottom
MOSFET.
VSLMT (Pin 3): Volt-Second Limit. Form an R-C integrator
by connecting a resistor from VIN to VSLMT and a capacitor
from VSLMT to ground. The gate drives are turned off when
the voltage on the VSLMT pin exceeds 1.25V.
UVLO (Pin 4): Undervoltage Lockout. Connect to a resistive voltage divider to monitor input voltage VIN. Enables
converter operation for VUVLO > 1.242V. Hysteresis is a
fixed 16mV hysteresis voltage with a 4.9µA hysteresis
current that combines with the Thevenin resistance of the
divider to set the total UVLO hysteresis voltage. This input
also senses VIN for voltage feedforward. Finally, this pin
can be used for external run/stop control.
SSFLT (Pin 5): Combination Soft-Start and Fault Indicator. A capacitor to GND sets the duty cycle ramp-up rate
during start-up. To indicate a fault, the SSFLT pin is
momentarily pulled up to within 1.3V of VCC.
NDRV (Pin 6): Drive for the External NMOS of the Linear
Regulator. Connect to the gate of the NMOS and connect
a pull up resistor to the input voltage VIN. Optionally, to
create a trickle charger omit the NMOS device and connect
NDRV to VCC.
FB/IN+ (Pin 7): This pin has several functions. The two
terminals of one pulse transformer winding are connected
to the FB/IN+ and FS/IN– pins. The other pulse transformer
winding is connected to the LTC3706. The LTC3705
automatically detects when the LTC3706 applies a pulseencoded signal to the FB/IN+ and FS/IN– pins and decodes
duty cycle information for control of the primary-side gate
drives (see Operation below). In secondary-side control,
primary-side gate drive bias power is also extracted from
the FB/IN+ and FS/IN– pins using an on-chip full-wave
rectifier.
For primary-side control connect this pin to an optoisolator
for feedback control of converter output voltage using an
internal optoisolator biasing network.
FS/IN– (Pin 8): This pin has several functions. Place a
resistor from this pin to GND to set the oscillator frequency. For secondary-side control with the LTC3706,
connect one winding of the pulse transformer for operation as described for the FB/IN+ pin above.
PGND (Pin 9): Supply Return for the Bottom Gate Driver
and the On-Chip Bridge Rectifier.
BG (Pin 10): Bottom Gate Driver. Connect to the gate of the
“low side” external MOSFET.
VCC (Pin 11): Main VCC Power for All Driver and Control
Circuitry.
NC (Pins 12, 13): Voltage Isolation Pins. No connection.
Provided to allow adequate clearance between high-voltage pins (BOOST, TG, and TS) and the remainder of the
pins.
BOOST (Pin 14): Top Gate Driver Supply. Connect to VCC
with a diode to supply power to the “high side” external
MOSFET and bypass with a capacitor to TS.
TG (Pin 15): Top Gate Driver. Connect to the gate of the
“high side” external MOSFET.
TS (Pin 16): Supply Return for the Top Gate Driver.
Connect to the source of the “high side” external MOSFET.
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LTC3705
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BLOCK DIAGRA
8V
SHUNT REGULATOR
–
0.6V
7.4V/7V
LINEAR
REGULATOR
13.4V/7V
TRICKLE TRICKLE
CHARGE CHARGER
+
–
INDRV
0.27mA
– V
+
–
5V
+
14.25V
–
5.3V/4.7V
+
13 NC
UVINT
TIME
–
SOFT-START
FAULT
SSFLT 5
REGULATOR
UVGD
LINE OFF
+
VCC
OC
12 NC
+
+
NDRV 6
–
1.242V
+
300mV
UVVIN
1.226V
UVLO 4
2 IS
–
VFF
0.66
4.9µA
14 BOOT
LEVEL
SHIFT
PWM
RECEIVER
CONDITION
IN+
IN –
PWM SECONDARY CONTROL
5V
DRIVE
LOGIC
SW
DET
–
400mV
PWM
PRIMARY
CONTROL
N/C
+
VP-P
3 VSLMT
OSCILLATOR CLOCK
SWITCHES
ON
0V
IOSC
SECONDARY SIDE CONTROL
3.3V
VCC
FB/IN + 7
RECTIFIER
FS/IN – 8
1.25V
2V
RAMP
VP-P
OPTO
BIAS
BOOTSTRAP
REFRESH
+
PRIMARY
SIDE CONTROL
FREQUENCY
SET
16 TS
SW
DET
–
GND 1
15 TG
11 VCC
10 BG
PGND
9 PGND
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LTC3705
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OPERATIO
Mode Setting
The LTC3705 is a controller and gate driver designed for
use in a 2-switch forward converter. When used in conjunction with the LTC3706 PolyPhase secondary-side
synchronous forward controller it forms a complete
2-switch forward converter with secondary-side regulation, galvanic isolation between input and output, and
synchronous rectification. In this mode, upon start-up,
the FB/IN+ and FS/IN– pins are effectively shorted by one
winding of the pulse transformer. The LTC3705 detects
this short circuit to determine that it is in secondary-side
control mode. Operation in this mode is confirmed when
the LTC3706 begins switching the pulse transformer.
Alternately, the LTC3705 can be used as a standalone
primary-side controller. In this case, the FB/IN+ and FS/IN–
pins operate independently. The FB/IN+ pin is connected to
the collector of an optoisolator to provide feedback and the
FS/IN– pin is connected to the frequency set resistor.
Gate Drive Encoding
In secondary-side control with the LTC3706, after a startup sequence, the LTC3706 transmits multiplexed PWM
information through a pulse transformer to the FB/IN+ and
FS/IN– inputs of the LTC3705. In the LTC3705, the PWM
receiver extracts the duty cycle and uses it to control the
top and bottom gate drivers.
Figure 1 shows that the LTC3706 drives the pulse transformer in a complementary fashion, with a duty cycle of
approximately 50%. At the appropriate time during the
positive half cycle, the LTC3706 applies a short (150ns)
zero-voltage pulse across the pulse transformer, indicating the end of the “on” time. Although this scheme allows
DUTY CYCLE = 15%
150ns
150ns
DUTY CYCLE = 0%
150ns
+7V
VPT1+ – VPT1–
–7V
1 CLK PER
1 CLK PER
Figure 1. Gate Drive Multiplexing Scheme
the transmission of 0% to 50% duty cycle, it is necessary
to establish a minimum controllable “on” time of approximately 100ns. This ensures that 0% duty cycle can be
reliably distinguished from 50% duty cycle.
On-Chip Rectifier
Simultaneously with duty-cycle decoding, and through
the same pulse transformer, the near-square-wave generated by the LTC3706 provides primary-side VCC gate drive
bias power by way of the LTC3705’s on-chip full-wave
bridge rectifier. No auxiliary bias supply is necessary and
forward converter design and circuitry are considerably
simplified.
External Series Pass Linear Regulator
The LTC3705 features an external series pass linear regulator that eliminates the long start-up time associated with
the conventional trickle charger. The drain of an external
NMOS is connected to the input voltage and the source is
connected to VCC. The gate of the NMOS is connected to
NDRV. To power the gate, an external pull-up resistor is
connected from the input voltage to NDRV. The NMOS
must be a standard 3V threshold type (i.e. not logic level).
An on-chip circuit manages the start up and operation of
the linear regulator. It takes approximately 45µs for the
linear regulator to charge VCC to its target value of 8V
(unless limited by a slower rise of VIN). The LTC3705
begins operating the gate drives when VCC reaches 7.4V.
Often, the thermal rating of the NMOS prevents it from
operating continuously, and the LTC3705 “times out” the
linear regulator to prevent overheating. This is accomplished using the capacitor connected to the SSFLT pin as
described subsequently.
Trickle Charger Shunt Regulator
Alternately, a trickle charger can be implemented by
eliminating the external NMOS and connecting NDRV to
VCC and using the pull-up resistor to charge VCC. To allow
extra headroom for starting, the LTC3705 detects this
mode and increases the threshold for starting the gate
drives to 13.4V. An internal shunt regulator limits the
voltage on the trickle charger to 15V.
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LTC3705
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OPERATIO
Self-Starting Architecture
The LTC3705 is combined with the LTC3706 to form a
complete self-starting DC isolated power supply. When
power is first applied, and when VCC for the LTC3705 is
above the appropriate threshold, the LTC3705 begins
open-loop operation using its own internal oscillator.
Power is supplied to the secondary by switching the gate
drivers with a gradually increasing duty cycle as controlled
by the rate of rise of the voltage on the SSFLT pin. A peak
detector power supply for the LTC3706 allows it to begin
operation even for small duty cycles. Once adequate
voltage is available for the LTC3706, it provides duty cycle
information and gate drive bias power using the pulse
transformer as shown in Figure 1. The LTC3705 detects
the appearance of this signal and transfers control of the
gate drivers to the LTC3706. Simultaneously, the LTC3705
also enables the on-chip rectifier and turns off the linear
regulator.
Alternately, when the LTC3705 is used as a standalone
primary-side controller, the gradually increasing duty cycle
powers up a secondary-side reference and optoisolator and
feedback is accomplished when the output of the
optoisolator begins pulling down in the FB/IN+ pin.
Soft-Start and Fault
These two functions are implemented using the SSFLT
pin. (This pin is also used for linear regulator timeout as
described in the following section.)
Initiating soft-start requires that: 1) the gate drive
undervoltage (UVGD) goes low meaning that adequate
voltage is available on the VCC pin (7.4V for the linear
regulator or 13.4V for the trickle charger) and 2) the input
undervoltage (UVVIN) goes low meaning that the voltage
on the UVLO pin has reached the 1.242V rising threshold.
During soft-start, the LTC3705 gradually charges the softstart capacitor to ramp up the converter duty cycle. Softstart is over when the voltage on the SSFLT pin reaches 2.8V.
In normal operation, at some point before this, the LTC3705
makes a transition to controlling duty cycle using closedloop regulation of the converter output voltage.
The SSFLT pin is also used to indicate a fault. The LTC3705
recognizes faults from four origins: 1) an overcurrent fault
caused by the current sense voltage on the IS pin exceeding the 300mV overcurrent threshold, 2) an input
undervoltage fault caused by the UVLO pin falling below
the 1.226V falling threshold, 3) a gate drive undervoltage
fault caused by the voltage on the VCC pin falling below the
7V threshold, or 4) loss of the gate drive encoding signal
from the LTC3706.
Upon sensing a fault, the LTC3705 immediately turns off
the top and bottom gate drives and indicates a fault by
quickly pulling the voltage on the SSFLT pin to within 1.3V
of the voltage on the VCC pin. After indicating the fault, the
LTC3705 quickly ramps down the voltage on the SSFLT
pin to approximately 2.8V. Then, to allow complete discharge of the secondary-side circuit, the LTC3705 slowly
ramps down the voltage on the SSFLT pin to about 200mV.
The LTC3705 then attempts a restart.
Linear Regulator Timeout
The thermal rating of the linear regulator’s external NMOS
often cannot allow it to indefinitely supply bias current to
the primary-side gate drives. The LTC3705 has a linear
regulator timeout mechanism that also uses the SSFLT
capacitor.
As described in the prior section, soft-start is over once the
voltage on the SSFLT pin reaches 2.8V. However, the
SSFLT capacitor continues to charge and the linear regulator is turned off when the voltage on the SSFLT pin
reaches 3.9V. The “Applications Information” section describes linear regulator timeout in more detail.
Volt-Second Limit
The volt-second limit ensures that the power transformer
core does not saturate for any combination of duty cycle
and input voltage. The input of an R-C integrator is
connected to VIN and its output is connected to the VSLMT
pin. While the top and bottom gate drives are “off,” the
LTC3705 grounds the VSLMT pin. When the gate drives are
turned “on” the VSLMT pin is released and the capacitor is
allowed to charge in proportion to VIN. If the capacitor
voltage on the VSLMT pin exceeds 1.25V the two gate
drives are immediately turned “off.” Note that this is not
considered a fault condition and the LTC3705 can run
indefinitely with the switch duty cycle being determined by
3705fb
9
LTC3705
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OPERATIO
the volt-second limit circuit. The duty cycle is always
limited to 50% to ensure that the power transformer flux
always has time to reset before the start of the next cycle.
In an alternate application, the volt-second limit can be
used for open-loop regulation of the output against changes
in VIN.
Current Limit
Current limit for the LTC3705 is principally a safety feature
to protect the converter and is not part of a control
function. The current that flows in series through the top
switch, the transformer primary, and the bottom switch is
sensed by a resistor connected between the source of the
bottom switch and GND. If the voltage across this resistor
exceeds 300mV, the LTC3705 initiates a fault.
Bootstrap Refresh
The LTC3705 incorporates a unique bootstrap refresh
circuit to ensure that the bootstrap supply (BOOST) for the
top switch has adequate voltage for operation at low duty
cycles. Therefore, the LTC3705 does not require a
undervoltage lockout for the bootstrap supply and a potential source of unexpected shutdowns is eliminated.
Voltage Feedforward
The LTC3705 uses voltage feedforward to properly modulate the duty cycle as a function of the input voltage. For
secondary-side control with the LTC3706, voltage
feedforward is used during start-up only. The duty cycle
during start up is determined by comparison of the voltage
on the SSFLT pin to a 50% duty cycle triangle wave with
an amplitude of 2V. To implement voltage feedforward, the
charging current for the soft-start capacitor is reduced in
proportion to the input voltage. As a result, the initial rate
of rise of the converter output voltage is held approximately constant regardless of the input voltage. At some
point during start-up, the LTC3706 begins to switch the
pulse transformer and takes over the soft-start.
For operation with standalone primary-side control and
optoisolator feedback, voltage feedforward is used during
both start-up and normal operation. The duty cycle is
determined by using a 50% duty cycle triangle wave with
an amplitude equal to 66% of the voltage on the UVLO pin
which is, in turn, proportional to VIN. The charging current
for the soft-start capacitor is a constant 5.2µA. During
soft-start, the duty cycle is determined by comparing the
voltage on the SSFLT pin to the triangle wave. Soft-start is
concluded when the voltage on the SSFLT pin exceeds the
voltage on the FB/IN+ pin. After the conclusion of softstart, the duty cycle is determined by comparison of the
voltage on the FB/IN+ pin to the triangle wave.
Optoisolator Bias
When the LTC3705 is used in standalone primary-side
mode, feedback is provided by an optoisolator connected
to the FB/IN+ pin. The LTC3705 has a built optoisolator
bias circuit which eliminates the need for external
components.
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APPLICATIO S I FOR ATIO
UVLO
The UVLO pin is connected to a resistive voltage divider
connected to VIN as shown in Figure 2. The voltage
threshold on the UVLO pin for VIN rising is 1.242V. To
introduce hysteresis, the LTC3705 draws 4.9µA from the
UVLO pin when VIN is rising. The hysteresis is therefore
user adjustable and depends on the value of R1. The UVLO
threshold for VIN rising is:
VIN(UVLO, RISING) = (1.242V)
R1+ R2
+ R1(4.9µA)
R2
The LTC3705 also has 16mV of voltage hysteresis on the
UVLO pin so that the UVLO threshold for VIN falling is:
VIN(UVLO, FALLING) = (1.226V)
R1+ R2
R2
To implement external Run/Stop control, connect a small
NMOS to the UVLO pin as shown in Figure 2. Turning the
NMOS on grounds the UVLO pin and prevents the LTC3705
from running.
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10
LTC3705
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APPLICATIO S I FOR ATIO
VIN
R1
UVLO
LTC3705
RUN/STOP
CONTROL
(OPTIONAL)
R2
GND
3705 F02
Figure 2. Resistive Voltage Divider for
UVLO and Optional Run/Stop Control
Linear Regulator
The linear regulator eliminates the long start-up times
associated with a conventional trickle charger by using an
external NMOS to quickly charge the capacitor connected
to the VCC pin.
Note that a trickle charger usually requires a large capacitor to provide holdup for the VCC pin while the converter
attempts to start. The linear regulator in the LTC3705 can
both charge the capacitor connected to the VCC pin and
provide primary-side gate-drive bias current. Therefore,
with the linear regulator, the capacitor need only be large
enough to cope with the ripple current from driving the top
and bottom gates and holdup need not be considered.
The external NMOS for the linear regulator should be a
standard 3V threshold type (i.e. not a logic level threshold). The rate of charge of VCC from 0V to 8V is controlled
by the LTC3705 to be approximately 45µs regardless of
the size of the capacitor connected to the VCC pin. The
charging current for this capacitor is approximately:
IC =
8V
C
45µs
The safe operating area (SOA) for the external NMOS
should be chosen so that capacitor charging does not
damage the NMOS. Excessive values of capacitor are
unnecessary and should be avoided.
Start-Up Considerations
When used in a self-starting converter with the LTC3706,
the LTC3705 initially begins the soft-start of the converter
in an open-loop fashion. After bias is obtained on the
secondary side, the LTC3706 assumes control and
completes the soft-start interval. In order to ensure that
control is properly transferred from the LTC3705 (primary-side) to the LTC3706 (secondary-side), it is necessary to limit the rate of rise on the primary-side soft-start
ramp so that the LTC3706 has adequate time to wake up
and assume control before the output voltage gets too
high. This condition is satisfied for many applications if the
following relationship is maintained:
CSS,SEC ≤ CSS_PRI
However, care should be taken to ensure that soft-start
transfer from primary-side to secondary-side is completed well before the output voltage reaches its target
value. A good design goal is to have the transfer completed
when the output voltage is less than one-half of its target
value. Note that the fastest output voltage rise time during
primary-side soft-start mode occurs with minimum load
current.
The open-loop start-up frequency on the LTC3705 is set
by placing a resistor RFS(S) from the FS/IN– pin to GND.
Although the exact start-up frequency on the primary side
is not critical, it is generally a good practice to set it
approximately equal to the operating frequency on the
secondary side.
In this mode the start-up frequency of the LTC3705 is
approximately:
f PRI =
34 • 109
RFS(S) + 10, 000
In the event that the LTC3706 fails to start up properly and
assume control of switching, there are several fail-safe
mechanisms to help avoid overvoltage conditions. First,
the LTC3705 implements a volt-second clamp that may be
used to keep the primary-side duty cycle at a level that
does not produce an excessive output voltage. Second,
the timeout of the linear regulator (described in the following section) means that, unless the LTC3706 starts and
supports the LTC3705’s gate drives through the pulse
transformer and on-chip rectifier, the LTC3705 eventually
suffers a gate drive undervoltage fault. Finally, the LTC3706
has an independent overvoltage detection circuit that
crowbars the output of the DC/DC converter using the
synchronous secondary-side MOSFET switch.
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LTC3705
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In the event that a short-circuit is applied to the output of
the converter prior to start-up, the LTC3706 generally
does not receive enough bias voltage to operate. In this
case, the LTC3705 detects a FAULT for one of two reasons:
1) since the LTC3706 never sends pulse encoding to the
LTC3705, the linear regulator times out resulting in a gate
drive undervoltage fault, or 2) the primary-side overcurrent
circuit is tripped because of current buildup in the output
inductor. In either case, the LTC3705 initiates a shutdown
followed by a soft-start retry.
Linear Regulator Timeout
After start-up, the LTC3705 times out the linear regulator
to prevent overheating of the external NMOS. The timeout
interval is set by further charging the soft-start capacitor
CSSFLT from the end-of-soft-start voltage of approximately
2.8V to the timeout threshold of 3.9V. Linear regulator
timeout behaves differently depending on mode.
In primary-side standalone mode, the LTC3705 generally
requires that an auxiliary gate drive bias supply take over
from the linear regulator. (See the subsequent section for
more detail on the auxiliary supply.) During linear regulator timeout, the rate of rise of the soft-start capacitor
voltage depends on the current into the NDRV pin as
controlled by the pull-up resistor RPULLUP, the value of VIN
and the value of VNDRV.
VIN – VNDRV
RPULLUP
The value of VNDRV is VCC = 8V plus the value of the gateto-source voltage (VNDRV – VCC) of the external NMOS in
the linear regulator. The gate-to-source voltage depends
on the actual device but is approximately the threshold
voltage of the external NMOS.
INDRV =
For INDRV > 0.27mA, the capacitor on the SSFLT pin is
charged in proportion to (INDRV – 0.27mA) until the linear
regulator times out. Thus, since VNDRV is very nearly
constant, the timeout interval for the linear regulator is
inversely proportional to the input voltage and a higher
input voltage produces a shorter timeout.
tTIMEOUT =
66C SSFLT (3.9V – 2.8V)
⎡ VIN − VNDRV
⎤
– 0.27mA ⎥
⎢ R
⎣ PULLUP
⎦
Since the power dissipation of the linear regulator is
proportional to the input voltage, this strategy of making
the timeout inversely proportional to the input voltage
produces an approximately constant temperature excursion for the external NMOS of the linear regulator regardless of the input voltage.
In situations for which the continuous operation of the
linear regulator does not exceed the thermal limitations of
the external NMOS (i.e. converters with low VIN or with
minimal gate drive bias requirements), the auxiliary supply can be omitted and the linear regulator allowed to
operate continuously. If INDRV is less than 0.27mA the
linear regulator never times out and the voltage on the
SSFLT pin stays at approximately 2.8V after start-up is
completed. To accomplish this set:
VIN(MAX) – VNDRV
0.27mA
where VIN(MAX) is the maximum expected continuous
input voltage. Note that once the linear regulator is turned
off it locks out. Therefore when using this strategy, care
should be taken to ensure that a transient higher than
VIN(MAX) does not persist longer than t TIMEOUT.
RPULLUP >
In secondary-side operation with the LTC3706, there is
never any need for continuous operation of the linear
regulator since gate drive bias power is provided by the
LTC3706 through the pulse transformer and on-chip
rectifier. The LTC3705 shuts down the linear regulator
once the LTC3706 begins switching the pulse transformer. If the LTC3706 fails to start, the LTC3705 quickly
times out the linear regulator once the voltage on the
SSFLT pin reaches 2.8V.
Fault Lockout
The LTC3705 indicates a fault by pulling the SSFLT pin to
within 1V of VCC. The LTC3705 subsequently attempts a
restart. Optionally, the user can prevent restart and “lock
out” the converter by clamping the voltage on the SSFLT
pin with a 4.3V Zener diode. Once the converter has locked
out it can only be restarted by the removal of the input
voltage or by release of the Zener diode clamp.
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12
LTC3705
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Pulse Transformer
The pulse transformer that connects the LTC3706 to the
LTC3705 performs the dual functions of gate drive duty
cycle encoding and gate drive bias supply for the LTC3705
by way of the on-chip full-wave rectifier. The designs of the
LTC3705 and LTC3706 have been coordinated so that the
transformer turn ratio is:
NLTC3705 = 2NLTC3706
where NLTC3705 is the number of turns in the winding
connected to the FB/IN+ and FS/IN– pins of the LTC3705
and NLTC3706 is the number of turns in the winding
connected to the PT+ and PT– pins of the LTC3706. The
winding connected to the LTC3706 must be able to withstand volt-seconds equal to:
(V – s)MAX =
VCC
2f
where VCC is the maximum supply voltage for the LTC3706
and f is the operating frequency of the LTC3706.
Auxiliary Supply
When used with the LTC3706, the LTC3705 does not
require an auxiliary supply to provide primary-side gatedrive bias current. After start-up, primary-side gate drive
current is provided by the LTC3706 through a small pulse
transformer and the LTC3705’s on-chip rectifier.
However, when used as a standalone primary-side controller, the LTC3705 may require a conventional gate-drive
bias supply as shown in Figure 3. The bias supply must be
VIN
POWER
TRANSFORMER
NDRV
LTC3705
1mH
PRIMARY
WINDING NP
BAS21
SECONDARY
WINDING NS
VCC
2.2µF
BAS21
AUXILIARY
WINDING NA
GND
3705 F03
Figure. 3. Auxiliary Supply for Primary-Side Control
designed to keep the voltage on the VCC pin between the
absolute maximum of 15V and the gate-drive undervoltage
lockout of 7V.
The auxiliary supply is connected in parallel with VCC. The
linear regulator maintains VCC at 8V. If the auxiliary supply
produces more than 8V, it turns off the external NMOS
before the LTC3705 can time out the linear regulator. If the
auxiliary supply produces less than 8V, the linear regulator
times out and then the voltage on the VCC pin declines to
the voltage produced by the auxiliary supply.
Slave Mode Operation
When the LTC3705 is paired with the LTC3706, multiple
pairs can be used to form a PolyPhase converter. In
PolyPhase operation, one LTC3705 becomes the “master”
while the remainder become “slaves.” The master controls start-up in the same manner as for the single-phase
converter, while the slaves do not begin switching until
receiving PWM information through their own pulse transformer from their corresponding LTC3706. To synchronize operation, the SSFLT and VCC pins of the master are
connected to the corresponding pins of all the slaves. The
master is designated by connection of the frequency set
resistor to the FS/IN– pin while this resistor is omitted from
the slaves. For the slaves the NDRV pin is connected to the
VCC pin. See the following section on PolyPhase Applications for more detail.
PolyPhase Applications
Figure 4 shows the basic connections for using the LTC3705
and LTC3706 in PolyPhase applications. One of the phases
is always identified as the “master,” while all other phases
are “slaves.” For the LTC3705 (primary side), the master
performs the open-loop start-up and supplies the initial
VCC voltage for the master and all slaves. The LTC3705
slaves are put into that mode by omitting the resistor on
FS/IN–. The LTC3705 slaves simply stand by and wait for
PWM signals from their respective pulse transformers.
Since the SSFLT pins of master and slave LTC3705s are
interconnected, a FAULT (overcurrent, etc.) on any one of
the phases will perform a shutdown/restart on all phases
together.
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13
LTC3705
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APPLICATIO S I FOR ATIO
For the LTC3706, the master performs soft-start and
voltage-loop regulation by driving all slaves to the same
current as the master using the ITH pins. Faults and
shutdowns are communicated via the interconnection of
the RUN/SS pins. The LTC3706 is put into slave mode by
tying the FB pin to VCC.
Standalone Primary-Side Operation
The LTC3705 can be used to implement a standalone
forward converter using optoisolator feedback and a
secondary-side voltage reference. Alternately the LTC3705
can be used to implement an open-loop forward converter
using the VSLMT pin to regulate against changes in VIN. In
either case, the LTC3705 oscillator determines the frequency as found from:
f OSC =
21 • 109
RFS(P) + 4200
Note that polyphase operation is not possible in the standalone configuration.
Grounding Considerations
The LT3705 is typically used in high current converter
designs that involve substantial switching transients. Figure 5 illustrates these currents. The switch drivers on the
IC are designed to drive large capacitances and, as such,
generate significant transient currents. Careful consideration must be made regarding input and local power
supply bypassing to avoid corrupting the ground references used by the UVLO and frequency set circuitry.
Typically, high current paths and transients from the input
supply and any local drive supplies must be kept isolated
from GND. By virtue of the topologies used in LT3705
applications, the large currents from the primary switches,
as well as the switch drive transients, pass through the
sense resistor to ground. This defines the ground connection of the sense resistor as the reference point for both
GND and PGND.
Effective grounding can be achieved by considering the
return current paths from the sense resistor to each
respective bypass capacitor. Don’t be tempted to run
small traces to separate the grounds. A power ground
plane is important as always in high power converters, but
care must be taken to keep high current paths away from
the GND reference. An effective approach is to use a 2layer ground plane, reserving an entire layer for GND and
an entire layer for PGND. The UVLO and frequency set
resistors can then be directly connected to the GND plane.
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14
LTC3705
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APPLICATIO S I FOR ATIO
VIN+
VOUT+
VBIAS
VIN NDRV VCC
FS/SYNC
NDRV
UVLO
FB/IN+
•
•
PT +
VCC
FB
ITH
PT –
RUN/SS
LTC3706
(MASTER)
FS/IN–
SS/FLT
LTC3705
(MASTER)
VIN–
VIN NDRV VCC
RUN/SS FS/SYNC
NDRV
SS/FLT FB/IN+
VCC
UVLO
•
•
FB
PT +
ITH
FS/IN–
LTC3705
(SLAVE)
PT –
PHASE
LTC3706
(SLAVE)
3705 F04
Figure 4. Connections for PolyPhase
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LTC3705
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APPLICATIO S I FOR ATIO
VBOOST
VIN
LT3705
VIN
BOOST
TG
UVLO
TS
VCC
VCC
FS/IN–
BG
GND
PGND
POWER GROUND PLANE
3705 F05
SIGNAL GROUND PLANE
Figure 5. High-Current Transient Return Paths
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LTC3705
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TYPICAL APPLICATIO S
VIN+
L1 1µH
T1
•
Si7852DP
1µF
100V
1µF
100V
x3
•
1nF
100V
1.2Ω
Si7336ADP
×2
9:2
Si7336ADP
Si7852DP
VOUT+
L2 1.2µH
10Ω
0.25W
1nF
100V
10Ω
0.25W
MURS120
330µF
6.3V
×3
1µF
CMPSH1-4
MURS120
30mΩ
1W
VIN–
365k
1%
BOOST TG TS BG IS
100Ω
L1: VISHAY IHLP-2525CZ-01
L2: COILCRAFT SER2010-122
T1: PULSE PA0807
T2: PULSE PA0297
2.2µF
25V
VCC
SS/FLT
FS/IN–
1nF
FG SW
470pF
0.1µF
•
VCC
FB
LTC3706
1µF
5k
ITH
PT –
RUN/SS GND PGND PHASE SLP MODE REGSD
2:1
162k
NDRV
102k
1%
FS/SYNC
PT +
•
VIN
IS+
GND PGND VSLMT
33nF
SG
IS–
33nF
680pF
20k
100k
22.6k
1%
3705 F06
Load Step
Efficiency
95
VIN = 36V
VOUT
50mV/DIV
EFFICIENCY (%)
15k
1%
100Ω
LTC3705
2.2µF
16V
100Ω
T2
FB/IN
UVLO
VOUT–
CZT3019
+
1nF
10µF
25V
680pF
BAS21 0.22µF
NDRV
2mΩ
2W
100Ω
100k
FQT7N10
2.2nF
250V
IOUT
10A/DIV
20µs/DIV
VIN = 48V
VOUT = 3.3V
LOAD STEP = 0A TO 20A
90
VIN = 72V
85
3705 F06b
80
0
5
10
15
LOAD CURRENT (A)
20
25
3705 F06c
Figure 6. 36V-72V to 3.3V/20A Isolated Forward Converter Using LTC3706
3705fb
17
18
365k
1%
15k
1%
1000pF
270pF
301k
P2
VIN–
1µF
100V
301k
1µF
100V
0.033µF
L2
0.82µH
TS
PGND
FS/IN–
16
9
10
11
12
13
14
15
10Ω
80
82
84
86
88
90
92
0.1µF
0
+
BAS21
0.22µF
R16
0.025Ω
1W
MMBT2907A
MMBT2907A
1
1•
470pF
5T
BAS21 6
2
3
CURRENT (A)
VIN = 48V
Efficiency
ISO1
MOC207
VIN = 72V
VIN = 36V
2.2µF
25V
1mH
DO1608C-105
2•
4
5
3705 F07c
2k
10nF
6T
11
•7
T1
PA0520
8T
5
BAS21
MURS120
MURS120
FQT7N10
Q2
Q1
2.2nF
250V
D1A
3
1
GNDS
GNDF
LT1431
REF
1k
R36
20Ω
1W
5
6
8
11
L1
25µH
2.49k
160Ω
9.53k
10nF
7
3705 F07
C7: TPSE686M025R0125 AVX
D1A, D1B: MBRB20100CT
D3: P6SMB15AT3
L1: GOWANDA 050KM2502SM
L2: VISHAY IHLP2525CZERR82M01
Q1, Q2: SILICONIX Si7456DP
V+
COL
0.047µF
D1B
C21
330pF
200V
Figure 7. 36V-72V to 12V/5A Isolated Forward Converter Using Optoisolator
BG
FB/IN+
NC
SSFLT
VCC
NC
NDRV
BOOT
VSLMT
LTC3705 TG
330pF
UVLO
IS
GND
100k
8
7
6
5
4
3
2
1
100Ω
1µF
100V
10Ω
•
EFFICIENCY (%)
VIN+
36V TO
72V
+
C7
68µF
2x
D3
VOUT–
0.1µF
VOUT+
12V
5A
LTC3705
TYPICAL APPLICATIO S
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LTC3705
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PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ± .005
16 15 14 13 12 11 10 9
.254 MIN
.009
(0.229)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 ± .0015
.150 – .157**
(3.810 – 3.988)
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
.015 ± .004
× 45°
(0.38 ± 0.10)
.007 – .0098
(0.178 – 0.249)
2 3
4
5 6
7
.0532 – .0688
(1.35 – 1.75)
8
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN16 (SSOP) 1005
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
3705fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3705
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TYPICAL APPLICATIO
P1
VIN+
36V TO
72V
L2
0.82µH
10Ω
Q1
MURS120
T1
PA0520
MMBT2907A
1µF
100V
2•
8T
5
•7
6T
11
20Ω
1W
11
Q2
0.1µF
7
P3
VOUT–
BAS21
MURS120
MMBT2907A
P4
VOUT+
12V
5A
C7
68µF
D3
2x
L1
25µH
D1B
10Ω
1µF
100V
+
330pF
200V
•
1µF
100V
D1A
1•
2.2nF
250V
5T
BAS21 6
0.025Ω
1W
P2
VIN–
365k
1%
301k
C7: TPSE686M025R0125 AVX
D1A, D1B: MBRB20100CT
D3: P6SMB15AT3
L1: GOWANDA 050KM2502SM
L2: VISHAY IHLP2525CZERR82M01
Q1, Q2: SILICONIX Si7456DP
100Ω
330pF
2
3
4
220pF
5
6
1000pF
7
15k
1%
8
0.033µF
16
TS
15
IS LTC3705 TG
14
BOOT
VSLMT
13
NC
UVLO
12
NC
SSFLT
11
VCC
NDRV
10
+
BG
FB/IN
9
PGND
FS/IN–
GND
OUTPUT VOLTAGE (V)
1
16
14
FQT7N10
301k
Regulation
18
0.22µF
1mH
DO1608C-105
BAS21
12
10
8
6
4
VIN = 36V
VIN = 48V
VIN = 72V
2
+
0.1µF
100k
2.2µF
25V
15V
0
1
0
2
3
LOAD (A)
5
4
3705 F08b
3705 F08
Figure 8. 36V-72V to 12V/5A Open-Loop Regulated Isolated Forward Converter Using VSLMT
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1693
High Speed Single/Dual N-Channel MOSFET Drivers CMOS Compatible Input, VCC Range: 4.5V to 12V
LTC1698
Secondary Synchronous Rectifier Controller
Use with the LT1681, Optocoupler Driver, Pulse Transformer Synchronization
LT1950
Single Switch Controller
Used for 20W to 500W Forward Converters
LTC3706
Polyphase Secondary-Side Synchronous
Forward Controller
Fast Transient Response, Self-Starting Architecture, Current Mode Control
LT3710
Secondary-Side Synchronous Post Regulator
For Regulated Auxiliary Output in Isolated DC/DC Converters
LT3781
“Bootstrap” Start Dual Transistor Synchronous
Forward Controller
72V Operation, Synchronous Switch Output
LT3804
Secondary Side Dual Output Controller
with Opto Driver
Regulates Two Secondary Outputs, Optocoupler Feedback Driver
and Second Output Synchronous Driver Controller
LTC3901
Secondary-Side Synchronous Driver for
Push-Pull and Full-Bridge Converter
Similar Function to LTC3900, Used in Full-Bridge and Push-Pull Converter
LTC4440/LTC4440-5 High Speed, High Voltage and High Side
Gate Drivers
High Side Source Up to 100V, Up to 15V Gate Drive Supply, 6-Lead
ThinSOTTM or 8-Lead Exposed Pad MSOP Packages
LTC4441
Adjustable Gate Drive from 5V to 8V, 5V to 28V VIN Range
6A MOSFET Driver
ThinSOT is a trademark of Linear Technology Corporation.
3705fb
20
Linear Technology Corporation
LT 1006 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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