ISSI IS62LV5128LL-85B 512k x 8 low power and low vcc cmos static ram Datasheet

ISSI
®
IS62LV5128LL
512K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
MAY 2001
FEATURES
DESCRIPTION
• Access times of 70, 85 ns
• CMOS low power operation:
— 135 mW (typical) operating
— 16.5 µW (typical) standby
• Low data retention voltage: 2V (min.)
• Output Enable (OE) and Chip Enable
(CE) inputs for ease in applications
• TTL compatible inputs and outputs
• Fully static operation:
— No clock or refresh required
• Single 2.7V (min) to 3.15V (max) VCC power supply
• Available in 36-pin mini BGA
The ISSI IS62LV5128LL is a low voltage, 524,288 words by
8 bits, CMOS SRAM. It is fabricated using ISSI’s low voltage,
six transistor (6T), CMOS technology. The device is targeted to
satisfy the demands of the state-of-the-art technologies
such as cell phones and pagers.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels. Additionally, easy memory
expansion is provided by using Chip Enable and Output
Enable inputs, CE and OE. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS62LV5128LL is available in a 36-pin mini BGA
package (8mm x 10mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K x 8
MEMORY ARRAY
I/O
DATA
CIRCUIT
COLUMN I/O
VCC
GND
I/O0-I/O7
CE
OE
WE
CONTROL
CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
1
ISSI
IS62LV5128LL
®
PIN CONFIGURATION
36-pin mini BGA (B)
1
PIN DESCRIPTIONS
2
3
4
5
6
A0-A18
Address Inputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
A
A0
A1
NC
A3
A6
A8
NC
No Connection
B
I/O4
A2
WE
A4
A7
I/O0
Vcc
Power
C
I/O5
NC
A5
I/O1
GND
Ground
D
GND
Vcc
E
Vcc
GND
F
I/O6
G
I/O7
H
A9
A18
A17
I/O2
OE
CE
A16
A15
I/O3
A10
A11
A12
A13
A14
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
Write
WE
CE
OE
X
H
H
L
H
L
L
L
X
H
L
X
I/O Operation
Vcc Current
High-Z
High-Z
DOUT
DIN
ISB1, ISB2
I CC
I CC
I CC
OPERATING RANGE
Range
Commercial
Industrial
2
Ambient Temperature
0°C to +70°C
–40°C to +85°C
VCC Min.
2.7V
2.7V
VCC Max.
3.15V
3.15V
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
ISSI
IS62LV5128LL
®
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
VTERM
VCC
TBIAS
TSTG
PT
Parameter
Terminal Voltage with Respect to GND
Vcc related to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
Value
–0.5 to Vcc + 0.3
–0.3 to +3.3
–40 to +85
–65 to +150
1
Unit
V
V
°C
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
Conditions
Max.
Unit
VIN = 0V
6
pF
VOUT = 0V
8
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.0V.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
VOH
VOL
VIH
VIL
ILI
ILO
VCC = 3.0V, IOH = –1.0 mA
VCC = 3.0V, IOL = 2.1 mA
2.2
—
2.2
–0.2
–1
–1
—
0.4
VCC + 0.3
0.4
1
1
V
V
V
V
µA
µA
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
Output Leakage
GND ≤ VIN ≤ VCC
GND ≤ VOUT ≤ VCC, OUTPUTS Disabled
Note:
1. VIL = –2.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
3
ISSI
IS62LV5128LL
®
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-70
Symbol Parameter
Test Conditions
I CC
Vcc Dynamic
Operating
Supply Current
VCC = Max., CE = VIL
IOUT = 0 mA, f = fMAX
ICC1
Operating Supply
Current
ISB1
ISB2
-85
Min.
Max.
Min.
Max.
Unit
Com.
Ind.
—
—
40
45
—
—
35
40
mA
VCC = Max.,
IOUT = 0 mA, f = 0
Com.
Ind.
—
—
5
5
—
—
5
5
mA
TTL Standby
Current
(TTL Inputs)
VCC = Max.,
VIN = VIH or VIL,
CE1 ≥ VIH, f = 0
Com.
Ind.
—
—
0.4
1.0
—
—
0.4
1.0
mA
CMOS Standby
Current
(CMOS Inputs)
VCC = Max., f = 0
CE1 ≥ VCC – 0.2V,
or VIN ≥ VCC – 0.2V,
VIN ≤ 0.2V
Com.
Ind.
—
—
10
10
—
—
10
10
µA
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-70
Symbol
Parameter
-85
Min.
Max.
Min.
Max.
Unit
tRC
Read Cycle Time
70
—
85
—
ns
tAA
Address Access Time
—
70
—
85
ns
tOHA
Output Hold Time
10
—
15
—
ns
tACE
CE Access Time
—
70
—
85
ns
OE Access Time
—
35
—
40
ns
tHZOE
OE to High-Z Output
—
25
—
25
ns
tLZOE(2)
OE to Low-Z Output
5
—
5
—
ns
tLZCE
CE to Low-Z Output
10
—
10
—
ns
CE to High-Z Output
0
25
0
25
ns
tDOE
(2)
(2)
tHZCE
(2)
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to 2.2V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
ISSI
IS62LV5128LL
®
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
3070 Ω
3070 Ω
2.8V
2.8V
OUTPUT
OUTPUT
30 pF
Including
jig and
scope
Figure 1
3150 Ω
5 pF
Including
jig and
scope
Figure 2
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
3150 Ω
5
ISSI
IS62LV5128LL
®
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
tRC
ADDRESS
tAA
tOHA
tOHA
DOUT
DATA VALID
READ CYCLE NO. 2(1,3)
tRC
ADDRESS
tAA
tOHA
OE
tDOE
CE
tHZOE
tLZOE
tACE
tLZCE
DOUT
HIGH-Z
tHZCE
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
ISSI
IS62LV5128LL
®
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range, Standard and Low Power)
-70
Symbol
Parameter
-85
Min.
Max.
Min.
Max.
Unit
tWC
Write Cycle Time
70
—
85
—
ns
tSCE
CE to Write End
65
—
70
—
ns
tAW
Address Setup Time to Write End
65
—
70
—
ns
tHA
Address Hold from Write End
0
—
0
—
ns
tSA
Address Setup Time
0
—
0
—
ns
tPWE(4)
WE Pulse Width
60
—
60
—
ns
tSD
Data Setup to Write End
30
—
35
—
ns
tHD
Data Hold from Write End
0
—
0
—
ns
tHZWE(2)
WE LOW to High-Z Output
—
33
—
35
ns
tLZWE(2)
WE HIGH to Low-Z Output
5
—
5
—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the
Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write.
4. Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1 (CE Controlled, OE = HIGH or LOW)
tWC
ADDRESS
tHA
tSCE
CE
tAW
tPWE(4)
WE
tSA
DOUT
tHZWE
DATA UNDEFINED
tLZWE
HIGH-Z
tSD
DIN
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
tHD
DATA-IN VALID
7
ISSI
IS62LV5128LL
®
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
tWC
ADDRESS
OE
tHA
tSCE
CE
tAW
tPWE1, 2
WE
tSA
DOUT
tHZWE
tLZWE
HIGH-Z
DATA UNDEFINED
tSD
DIN
tHD
DATA-IN VALID
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
tWC
ADDRESS
OE
tHA
tSCE
CE
tAW
tPWE1, 2
WE
tSA
DOUT
DATA UNDEFINED
tHZWE
tLZWE
HIGH-Z
tSD
DIN
8
tHD
DATA-IN VALID
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
ISSI
IS62LV5128LL
®
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol
Parameter
Test Condition
Min.
Max.
Unit
VDR
Vcc for Data Retention
See Data Retention Waveform
1.5
3.15
V
I DR
Data Retention Current
Vcc = 2.0V, CE ≥ Vcc – 0.2V
—
—
10
10
µA
µA
t SDR
Data Retention Setup Time
See Data Retention Waveform
0
—
ns
t RDR
Recovery Time
See Data Retention Waveform
t RC
—
ns
Com.
Ind.
DATA RETENTION WAVEFORM (CE Controlled)
tSDR
2.7V
2.0V
tRDR
VCC
VDR
CE
GND
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
Data Retention Mode
CE ≥ VCC - 0.2V
9
ISSI
IS62LV5128LL
®
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No.
Package
70
IS62LV5128LL-70B
mini BGA (8mm x 10mm)
85
IS62LV5128LL-85B
mini BGA (8mm x 10mm)
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No.
Package
70
IS62LV5128LL-70BI
mini BGA (8mm x 10mm)
85
IS62LV5128LL-85BI
mini BGA (8mm x 10mm)
ISSI
®
Integrated Silicon Solution, Inc.
2231 Lawson Lane
Santa Clara, CA 95054
Tel: 1-800-379-4774
Fax: (408) 588-0806
E-mail: [email protected]
www.issi.com
10
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
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