Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 LMT86/LMT86-Q1 SC70/TO-92, Analog Temperature Sensors with Class-AB Output 1 Features 3 Description • The LMT86/LMT86-Q1 are precision CMOS integrated-circuit temperature sensors with an analog output voltage that is linearly and inversely proportional to temperature. Its features make it suitable for many general temperature sensing applications. It can operate down to 2.2V supply with 5.4 µA power consumption making it ideal for battery powered devices. Package options including throughhole TO-92 package allows the LMT86 to be mounted on-board, off-board, to a heat sink, or on multiple unique locations in the same application. A class-AB output structure gives the LMT86/LMT86Q1 strong output source and sink current capability that can directly drive up to 1.1 nF capacitive loads. This means it is well suited to drive an analog-todigital converter sample-and-hold input with its transient load requirements. It has accuracy specified in the operating range of −50°C to 150°C. The accuracy, 3-lead package options, and other features also make the LMT86/LMT86-Q1 an alternative to thermistors. 1 • • • • • • • • • LMT86-Q1 is AEC-Q100 Grade 0 qualified and is Manufactured on an Automotive Grade Flow Very Accurate ±0.25°C Wide Temperature Range of −50°C to 150°C Low 5.4 µA Quiescent Current Sensor Gain of -10.9 mV/°C Packages: – Small SC70 Package – Leaded TO-92 Output is Short-Circuit Protected Push-Pull Output with ±50 µA Current Capability Footprint Compatible with the Industry-Standard LM20/19 and LM35 Temperature Sensor Cost-effective Alternative to Thermistors 2 Applications • • • • • • • • Automotive Industrial White Goods – Appliances Battery Management Disk Drives Games Wireless Transceivers Cell phones For devices with different average sensor gains and comparable accuracy the LMT84/LM84-Q1, LMT85/LMT85-Q1 and LMT87/LMT87-Q1 (For more details see Comparable Alternative Devices.) Device Information (1) PART NUMBER LMT86 LMT86-Q1 (1) PACKAGE BODY SIZE (NOM) SOT (5) 2.00 mm x 1.25 mm TO-92 (3) 4.3 mm x 3.5 mm SOT (5) 2.00 mm x 1.25 mm For all available packages, see the orderable addendum at the end of the data sheet. 4 Full-Range Celsius Temperature Sensor (−50°C to 150°C) Output Voltage vs Temperature VDD (+2.2V to +5.5V) 3.0 LMT86 CBP OUT OUTPUT VOLTAGE (V) 2.5 VDD 2.0 1.5 1.0 0.5 GND 0.0 ±50 0 50 100 150 TEMPERATURE (ƒC) C001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Full-Range Celsius Temperature Sensor (−50°C to 150°C) ................................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 5 5 5 5 6 7 7 8 Absolute Maximum Ratings ..................................... Handling Ratings - Commercial ................................ ESD Ratings - Automotive ........................................ Recommended Operating Ratings ........................... Thermal Information .................................................. Accuracy Characteristics ......................................... Electrical Characteristics ......................................... Typical Characteristics .............................................. 8.2 Functional Block Diagram ....................................... 10 8.3 Feature Description................................................. 10 8.4 Device Functional Modes........................................ 12 9 1 2 4 5 Detailed Description ............................................ 10 8.1 Overview ................................................................. 10 Application and Implementation ........................ 13 9.1 Application Information............................................ 13 9.2 Typical Applications ............................................... 14 10 Power Supply Recommendations ..................... 15 11 Layout................................................................... 15 11.1 Layout Guidelines ................................................. 15 11.2 Layout Example .................................................... 16 12 Device and Documentation Support ................. 17 12.1 12.2 12.3 12.4 12.5 Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 17 17 17 17 17 13 Mechanical, Packaging, and Orderable Information ........................................................... 17 5 Revision History Changes from Revision B (May 2014) to Revision C Page • Deleted all mentions of TO-126 package ............................................................................................................................... 1 • Added TO-92 LPM pin configuration graphic ......................................................................................................................... 4 • Changed Handling Ratings to ESD Ratings and moved Storage Temperature to Absolute Maximum Ratings table........... 5 • Changed KV to V ................................................................................................................................................................... 5 • Added layout recommendation for TO-92 LP and LPM packages....................................................................................... 16 Changes from Revision A (June 2013) to Revision B Page • Changed data sheet flow and layout to conform with new TI standards. Added the following sections: Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, Mechanical, Packaging, and Orderable Information .................................................................................................................................. 1 • Added TO92 and TO126 package information....................................................................................................................... 1 • Changed from 450 °C/W to 275 °C/W. New specification is derived using TI's latest methodology. .................................... 6 • Changed Temperature Accuracy VDD condition from 2.4V to 2.2V for range of 40°C to 150°C. .......................................... 7 • Deleted Note: The input current is leakage only and is highest at high temperature. It is typically only 0.001 µA. The 1 µA limit is solely based on a testing limitation and does not reflect the actual performance of the part............................. 7 2 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 Device Comparison Table (1) ORDER NUMBER PACKAGE (2) BODY SIZE (NOM) MOUNTING TYPE LMT86DCK SOT (AKA 5 2.00 mm x 1.25 mm Surface Mount LMT86LP TO-92 (AKA (2): LP) 3 4.3 mm x 3.5 mm Through-hole; straight leads LMT86LPM TO-92 (AKA (2): LPM) 3 4.3 mm x 3.5 mm Through-hole; formed leads 5 2.00 mm x 1.25 mm Surface Mount LMT86DCK-Q1 (1) (2) SOT (AKA : SC70, DCK) PIN (2) : SC70, DCK) For all available packages and complete order numbers, see the orderable addendum at the end of the data sheet. AKA = Also Known As Comparable Alternative Devices PART NUMBER AVERAGE OUTPUT SENSOR GAIN POWER SUPPLY RANGE LMT84/LMT84-Q1 –5.5 mV/°C 1.5V to 5.5V LMT85/LMT85-Q1 –8.2 mV/°C 1.8V to 5.5V LMT86/LMT86-Q1 –10.9 mV/°C 2.2V to 5.5V LMT87/LMT87-Q1 –13.6 mV/°C 2.7V to 5.5V Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 3 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 6 Pin Configuration and Functions 3-Pin TO-92 LPM Package 5-Pin SOT (SC70) DCK Package (TOP VIEW) 1 5 GND VDD 2 LMT86 GND 4 3 OUT VDD VDD OUT 3-Pin TO-92 LP Package GND VDD OUT GND Pin Functions PIN LABEL DCK NUMBER LP NUMBER DESCRIPTION LPC NUMBER TYPE VDD 5 Power GND 1 Ground EQUIVALENT CIRCUIT FUNCTION Power Supply Voltage Power Supply Ground VDD OUT Analog Output 3 See Pin Diagrams Outputs a voltage which is inversely proportional to temperature See Pin Diagrams GND VDD 4 Power Positive Supply Voltage GND 2 Ground Power Supply Ground, (direct connection to the back side of the die) 4 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 7 Specifications 7.1 Absolute Maximum Ratings (1) (2) MIN MAX UNIT Supply Voltage –0.3 6 V Voltage at Output Pin –0.3 (VDD + 0.5) V -7 7 mA Output Current Input Current at any pin (3) -5 Maximum Junction Temperature (TJMAX) Storage temperature range Tstg (1) (2) (3) -65 5 mA 150 °C 150 °C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specific performance limits. For specifications and test conditions, see the Electrical Characteristics. The specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Soldering process must comply with TI's Reflow Temperature Profile specifications. Refer to www.ti.com/packaging. Reflow temperature profiles are different for lead-free and non-lead-free packages. When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > V), the current at that pin should be limited to 5 mA. 7.2 Handling Ratings - Commercial VALUE V(ESD) (1) (2) (3) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins. (1)Applies for TO-92 package LMT86LP. ±2500 Human body model (HBM), per JESD22-A114, all pins. Applies for SC70 package LMT86DCK. ±2500 Charged device model (CDM), per JEDEC specification JESD22C101, all pins. (2) Applies for all parts. ±1000 Machine model ESD stress voltage, per JEDEC specification JESD22-A115. (3) Applies for SC70 package LMT86DCK and LMT86DCK-Q1. ±250 UNIT V V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. The machine model is a 200pF capacitor discharged directly into each pin. 7.3 ESD Ratings - Automotive VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per JESD22-A114, all pins. (1) Applies for SC70 package LMT86DCK-Q1. ±2500 Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins. (2) Applies for SC70 package LMT86DCK-Q1. ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.4 Recommended Operating Ratings MIN Specified temperature range VDD Supply voltage range MAX °C −50 ≤ TA ≤ 150 °C 2.2 V 5.5 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 UNIT TMIN ≤ TA ≤ TMAX 5 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 7.5 Thermal Information (1) THERMAL METRIC (2) (3) (4) LMT86 LMT86-Q1 LMT86 DCK LP 5 PINS 3 PINS 275 167 RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance 84 80 RθJB Junction-to-board thermal resistance 56 146 ψJT Junction-to-top characterization parameter 1.2 35 ψJB Junction-to-board characterization parameter 55 146 (1) (2) (3) (4) 6 UNIT °C/W For information on self-heating and thermal response time see section Mounting and Thermal Conductivity. For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction to ambient thermal resistance (RθJA) under natural convection is obtained in a simulation on a JEDEC-standard, High K board as specified in JESD51-7, in an environment described in JESD51-2. Exposed pad packages assume that thermal vias are included in the PCB, per JESD 51-5. Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance. Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com 7.6 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 Accuracy Characteristics These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1. PARAMETER MIN (1) CONDITIONS TYP (2) MAX -2.7 ±0.4 2.7 °C 0°C to 40°C; VDD = 2.4 V to 5.5 V -2.7 ±0.7 2.7 °C ±0.3 –50°C to 0°C; VDD = 3.0 V to 5.5 V -2.7 °C ±0.7 –50°C to 0°C; VDD = 3.6 V to 5.5 V 7.7 UNIT 40°C to 150°C; VDD = 2.2 V to 5.5 V Temperature accuracy (3) 0°C to 70°C; VDD = 3.0 V to 5.5 V (1) (2) (3) (1) 2.7 °C ±0.25 °C Limits are specified to TI's AOQL (Average Outgoing Quality Level). Typicals are at TJ = TA = 25°C and represent most likely parametric norm. Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Transfer Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no dc load. Electrical Characteristics Unless otherwise noted, these specifications apply for +VDD = 2.2 V to 5.5 V. MIN and MAX limits apply for TA = TJ = TMIN to TMAX , unless otherwise noted; typical values apply for TA = TJ = 25°C. PARAMETER Average sensor gain (output transfer function slope) Load regulation (3) Line regulation Supply current CL Output load capacitance (5) MIN (1) -30°C and 90°C used to calculate average sensor gain Source ≤ 50 μA, (VDD – VOUT) ≥ 200 mV TYP (2) MAX (1) –10.9 -1 Sink ≤ 50 μA, VOUT ≥ 200 mV UNIT mV/°C –0.22 0.26 (4) IS (1) (2) (3) (4) CONDITIONS mV 1 mV μV/V 200 TA = 30°C to 150°C, (VDD – VOUT) ≥ 100 mV 5.4 8.1 μA TA = -50°C to 150°C, (VDD – VOUT) ≥ 100 mV 5.4 9 μA 1.9 ms 50 µA 1100 Power-on time (5) CL= 0 pF to 1100 pF Output drive TA = TJ = 25°C 0.7 -50 pF Limits are specific to TI's AOQL (Average Outgoing Quality Level). Typicals are at TJ = TA = 25°C and represent most likely parametric norm. Source currents are flowing out of the LMT86 and LMT86-Q1. Sink currents are flowing into the LMT86 and LMT86-Q1. Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Output Voltage Shift. Specified by design and characterization. Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 7 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 7.8 Typical Characteristics 4 TEMPERATURE ERROR (ºC) 3 2 1 0 -1 -2 -3 -4 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (ºC) 8 Figure 1. Temperature Error vs Temperature Figure 2. Minimum Operating Temperature vs Supply Voltage Figure 3. Supply Current vs Temperature Figure 4. Supply Current vs Supply Voltage Figure 5. Load Regulation, Sourcing Current Figure 6. Load Regulation, Sinking Current Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 Typical Characteristics (continued) Figure 7. Change in VOUT vs Overhead Voltage Figure 8. Supply-Noise Gain vs Frequency Figure 9. Output Voltage vs Supply Voltage Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 9 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 8 Detailed Description 8.1 Overview The LMT86/LMT86-Q1 is an analog output temperature sensor. The temperature sensing element is comprised of a simple base emitter junction that is forward biased by a current source. The temperature sensing element is then buffered by an amplifier and provided to the OUT pin. The amplifier has a simple push-pull output stage thus providing a low impedance output source. 8.2 Functional Block Diagram Full-Range Celsius Temperature Sensor (−50°C to 150°C). VDD OUT Thermal Diodes GND 8.3 Feature Description 8.3.1 LMT86 and LMT86-Q1 Transfer Function The output voltage of the LMT86 and LMT86-Q1, across the complete operating temperature range is shown in Table 1. This table is the reference from which the LMT86 and LMT86-Q1 accuracy specifications (listed in the Accuracy Characteristics section) are determined. This table can be used, for example, in a host processor lookup table. A file containing this data is available for download at LMT86 product folder under Tools and Software Models. Table 1. LMT86 and LMT86-Q1 Transfer Table 10 TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) -50 2616 -10 2207 30 1777 70 1335 110 883 -49 2607 -9 2197 31 1766 71 1324 111 872 -48 2598 -8 2186 32 1756 72 1313 112 860 -47 2589 -7 2175 33 1745 73 1301 113 849 -46 2580 -6 2164 34 1734 74 1290 114 837 -45 2571 -5 2154 35 1723 75 1279 115 826 -44 2562 -4 2143 36 1712 76 1268 116 814 -43 2553 -3 2132 37 1701 77 1257 117 803 -42 2543 -2 2122 38 1690 78 1245 118 791 -41 2533 -1 2111 39 1679 79 1234 119 780 -40 2522 0 2100 40 1668 80 1223 120 769 -39 2512 1 2089 41 1657 81 1212 121 757 -38 2501 2 2079 42 1646 82 1201 122 745 -37 2491 3 2068 43 1635 83 1189 123 734 -36 2481 4 2057 44 1624 84 1178 124 722 -35 2470 5 2047 45 1613 85 1167 125 711 -34 2460 6 2036 46 1602 86 1155 126 699 -33 2449 7 2025 47 1591 87 1144 127 688 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 Feature Description (continued) Table 1. LMT86 and LMT86-Q1 Transfer Table (continued) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) TEMP (°C) VOUT (mV) -32 2439 8 2014 48 1580 88 1133 128 676 -31 2429 9 2004 49 1569 89 1122 129 665 -30 2418 10 1993 50 1558 90 1110 130 653 -29 2408 11 1982 51 1547 91 1099 131 642 -28 2397 12 1971 52 1536 92 1088 132 630 -27 2387 13 1961 53 1525 93 1076 133 618 -26 2376 14 1950 54 1514 94 1065 134 607 -25 2366 15 1939 55 1503 95 1054 135 595 -24 2355 16 1928 56 1492 96 1042 136 584 -23 2345 17 1918 57 1481 97 1031 137 572 -22 2334 18 1907 58 1470 98 1020 138 560 -21 2324 19 1896 59 1459 99 1008 139 549 -20 2313 20 1885 60 1448 100 997 140 537 -19 2302 21 1874 61 1436 101 986 141 525 -18 2292 22 1864 62 1425 102 974 142 514 -17 2281 23 1853 63 1414 103 963 143 502 -16 2271 24 1842 64 1403 104 951 144 490 -15 2260 25 1831 65 1391 105 940 145 479 -14 2250 26 1820 66 1380 106 929 146 467 -13 2239 27 1810 67 1369 107 917 147 455 -12 2228 28 1799 68 1358 108 906 148 443 -11 2218 29 1788 69 1346 109 895 149 432 150 420 Although the LMT86 and LMT86-Q1 is very linear, its response does have a slight umbrella parabolic shape. This shape is very accurately reflected in Table 1. The Transfer Table can be calculated by using the parabolic equation. mV mV ª º ª 2º VTEMP mV = 1777.3mV - «10.888 T - 30°C » - «0.00347 2 T - 30°C » °C ¬ ¼ ¬ °C ¼ (1) The parabolic equation is an approximation of the transfer table and the accuracy of the equation degrades slightly at the temperature range extremes. Equation 1 can be solved for T resulting in: T 10 .888 10 .888 2 4 u 0.00347 u 1777 .3 VTEMP mV 2 u ( 0.00347 ) 30 (2) For an even less accurate linear transfer function approximation, a line can easily be calculated over the desired temperature range from the Table using the two-point equation: · ¹ V - V1 = V2 - V1 T2 - T1 · u (T - T1) ¹ (3) Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the coordinates of the highest temperature. For example, if we want to resolve this equation, over a temperature range of 20°C to 50°C, we would proceed as follows: 1558 mV - 1885 mV· u (T - 20oC) 50oC - 20oC ¹ · ¹ V - 1885 mV = (4) o o V - 1885 mV = (-10.9 mV / C) u (T - 20 C) (5) o V = (-10.9 mV / C) u T + 2103 mV (6) Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 11 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com Using this method of linear approximation, the transfer function can be approximated for one or more temperature ranges of interest. 8.4 Device Functional Modes 8.4.1 Mounting and Thermal Conductivity The LMT86 and LMT86-Q1 can be applied easily in the same way as other integrated-circuit temperature sensors. It can be glued or cemented to a surface. To ensure good thermal conductivity, the backside of the LMT86 and LMT86-Q1 die is directly attached to the GND pin (Pin 2). The temperatures of the lands and traces to the other leads of the LMT86 and LMT86-Q1 will also affect the temperature reading. Alternatively, the LMT86 and LMT86-Q1 can be mounted inside a sealed-end metal tube, and can then be dipped into a bath or screwed into a threaded hole in a tank. As with any IC, the LMT86 and LMT86-Q1 and accompanying wiring and circuits must be kept insulated and dry, to avoid leakage and corrosion. This is especially true if the circuit may operate at cold temperatures where condensation can occur. If moisture creates a short circuit from the output to ground or VDD, the output from the LMT86 and LMT86-Q1 will not be correct. Printed-circuit coatings are often used to ensure that moisture cannot corrode the leads or circuit traces. The thermal resistance junction to ambient (RθJA or θJA) is the parameter used to calculate the rise of a device junction temperature due to its power dissipation. The equation used to calculate the rise in the LMT86 and LMT86-Q1 die temperature is: TJ = TA + TJA ª¬(VDDIS ) + (VDD - VO ) IL º¼ (7) where TA is the ambient temperature, IS is the supply current, IL is the load current on the output, and VO is the output voltage. For example, in an application where TA = 30°C, VDD = 5V, IS = 5.4 µA, VO = 1777 mV junction temp 30.014°C self-heating error of 0.014°C. Since the LMT86 and LMT86-Q1's junction temperature is the actual temperature being measured, care should be taken to minimize the load current that the LMT86 and LMT86-Q1 is required to drive. Thermal Information (1) shows the thermal resistance of the LMT86 and LMT86Q1. 8.4.2 Output Noise Considerations A push-pull output gives the LMT86 and LMT86-Q1 the ability to sink and source significant current. This is beneficial when, for example, driving dynamic loads like an input stage on an analog-to-digital converter (ADC). In these applications the source current is required to quickly charge the input capacitor of the ADC. The LMT86 and LMT86-Q1 is ideal for this and other applications which require strong source or sink current. The LMT86 and LMT86-Q1's supply-noise gain (the ratio of the AC signal on VOUT to the AC signal on VDD) was measured during bench tests. Its typical attenuation is shown in Figure 8 found in the Typical Characteristics section. A load capacitor on the output can help to filter noise. For operation in very noisy environments, some bypass capacitance should be present on the supply within approximately 5 centimeters of the LMT86 and LMT86-Q1. 8.4.3 Capacitive Loads The LMT86 and LMT86-Q1 handles capacitive loading well. In an extremely noisy environment, or when driving a switched sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any precautions, the LMT86 and LMT86-Q1 can drive a capacitive load less than or equal to 1100 pF as shown in Figure 10. For capacitive loads greater than 1100 pF, a series resistor may be required on the output, as shown in Figure 11. (1) 12 For information on self-heating and thermal response time see section Mounting and Thermal Conductivity. Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 Device Functional Modes (continued) VDD LMT86 OPTIONAL BYPASS CAPACITANCE OUT GND CLOAD ” 1100 pF Figure 10. LMT86 No Decoupling Required for Capacitive Loads Less than 1100 pF VDD RS LMT86 OPTIONAL BYPASS CAPACITANCE OUT GND CLOAD > 1100 pF Figure 11. LMT86 with Series Resistor for Capacitive Loading Greater than 1100 pF CLOAD MINIMUM RS 1.1 nF to 99 nF 3 kΩ 100 nF to 999 nF 1.5 kΩ 1 μF 800 Ω 8.4.4 Output Voltage Shift The LMT86 and LMT86-Q1 are very linear over temperature and supply voltage range. Due to the intrinsic behavior of an NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the operating range of the device. The location of the shift is determined by the relative levels of VDD and VOUT. The shift typically occurs when VDD- VOUT = 1 V. This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VOUT. Since the shift takes place over a wide temperature change of 5°C to 20°C, VOUT is always monotonic. The accuracy specifications in the Accuracy Characteristics table already include this possible shift. 9 Application and Implementation 9.1 Application Information The LMT86/LMT86-Q1 features make it suitable for many general temperature sensing applications. It can operate down to 2.2V supply with 5.4 uA power consumption making it ideal for battery powered devices. Package options including through-hole TO-92 package allow the LMT86 to be mounted on-board, off-board, to a heat sink, or on multiple unique locations in the same application. Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 13 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 9.2 Typical Applications 9.2.1 Connection to an ADC Simplified Input Circuit of SAR Analog-to-Digital Converter Reset +2.2V to +5.5V Input Pin LMT86 VDD CBP RMUX RSS Sample OUT GND CMUX CFILTER CSAMPLE Figure 12. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage 9.2.1.1 Design Requirements Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such as the LMT86 and LMT86-Q1 temperature sensor and many op amps. This requirement is easily accommodated by the addition of a capacitor, CFILTER. 9.2.1.2 Detailed Design Procedure The size of CFILTER depends on the size of the sampling capacitor and the sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This general ADC application is shown as an example only. 9.2.1.3 Application Curves 3.0 OUTPUT VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5 0.0 ±50 0 50 100 150 TEMPERATURE (ƒC) C001 Figure 13. Analog Output Transfer Function 9.2.2 Conserving Power Dissipation with Shutdown VDD SHUTDOWN VOUT LMT86 Any logic device output Figure 14. Conserving Power Dissipation with Shutdown 9.2.2.1 Design Requirements Since the power consumption of the LMT86 is less than 9 µA it can simply be powered directly from any logic gate output, thus not requiring a specific shutdown pin. The device can even be powered directly from a micro controller GPIO. In this way it can easily be turned off for cases such as battery powered systems where power savings is critical. 14 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 Typical Applications (continued) 9.2.2.2 Detailed Design Procedure Simply connect the VDD pin of the LMT86 directly to the logic shutdown signal from a microcontroller. 9.2.2.3 Application Curves Time: 500 µsec/div; Top Trace: VDD 1 V/div; Bottom Trace: OUT 1 V/div Figure 15. Output Turn-on Response Time without a Capacitive Load and VDD=3.3V Time: 500 µsec/div; Top Trace: VDD 1 V/div; Bottom Trace: OUT 1 V/div Figure 16. Output Turn-on Response Time with a 1.1 nF Capacitive Load and VDD=3.3V Time: 500 µsec/div; Top Trace: VDD 2 V/div; Bottom Trace: OUT 1 V/div Figure 17. Output Turn-on Response Time without a Capacitive Load and VDD=5V Time: 500 µsec/div; Top Trace: VDD 2 V/div; Bottom Trace: OUT 1 V/div Figure 18. Output Turn-on Response Time with 1.1 nF Capacitive Load and VDD=5V 10 Power Supply Recommendations The LMT86's low supply current and supply range of 2.2V to 5.5V allow the device to easily be powered from many sources. Power supply bypassing is optional and is mainly dependent on the noise on the power supply used. In noisy systems it may be necessary to add bypass capacitors to lower the noise that is coupled to the LMT86's output. 11 Layout 11.1 Layout Guidelines The LMT86 is extremely simple to layout. If a power supply bypass capacitor is used it should be connected as shown in the Layout Example. Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 15 LMT86, LMT86-Q1 SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 www.ti.com 11.2 Layout Example VIA to ground plane VIA to power plane GND VDD GND 0.01µ F OUT VDD Figure 19. SC70 Package Recommended Layout GND OUT VDD Figure 20. TO-92 LP Package Recommended Layout GND OUT VDD Figure 21. TO-92 LPM Package Recommended Layout 16 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 LMT86, LMT86-Q1 www.ti.com SNIS169C – MARCH 2013 – REVISED OCTOBER 2015 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LMT86 Click here Click here Click here Click here Click here LMT86-Q1 Click here Click here Click here Click here Click here 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: LMT86 LMT86-Q1 17 PACKAGE OPTION ADDENDUM www.ti.com 25-May-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMT86DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BSA LMT86DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BSA LMT86LP ACTIVE TO-92 LP 3 1800 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -50 to 150 LMT86 LMT86LPG PREVIEW TO-92 LPG 3 1000 TBD Call TI Call TI -50 to 150 LMT86LPGM PREVIEW TO-92 LPG 3 3000 TBD Call TI Call TI -50 to 150 LMT86LPM ACTIVE TO-92 LP 3 2000 Green (RoHS & no Sb/Br) CU SN N / A for Pkg Type -50 to 150 LMT86 LMT86QDCKRQ1 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BTA LMT86QDCKTQ1 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -50 to 150 BTA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-May-2017 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LMT86, LMT86-Q1 : • Catalog: LMT86 • Automotive: LMT86-Q1 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 28-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LMT86DCKR SC70 DCK 5 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMT86DCKT SC70 DCK 5 250 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMT86QDCKRQ1 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMT86QDCKTQ1 SC70 DCK 5 250 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 28-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMT86DCKR SC70 DCK 5 3000 210.0 185.0 35.0 LMT86DCKT SC70 DCK 5 250 210.0 185.0 35.0 LMT86QDCKRQ1 SC70 DCK 5 3000 210.0 185.0 35.0 LMT86QDCKTQ1 SC70 DCK 5 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE LPG0003A TO-92 - 5.05 mm max height SCALE 1.300 TO-92 4.1 3.9 3.25 3.05 3X 0.55 0.40 5.05 MAX 3 1 3X (0.8) 3X 15.5 15.1 3X 0.48 0.35 3X 2X 1.27 0.05 0.51 0.36 2.64 2.44 2.68 2.28 1.62 1.42 2X (45 ) 1 (0.5425) 2 3 0.86 0.66 4221343/B 09/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com EXAMPLE BOARD LAYOUT LPG0003A TO-92 - 5.05 mm max height TO-92 0.05 MAX ALL AROUND TYP FULL R TYP METAL TYP (1.07) 3X ( 0.75) VIA 2X METAL (1.7) 2X (1.7) 2 1 2X SOLDER MASK OPENING 3 2X (1.07) (R0.05) TYP (1.27) SOLDER MASK OPENING (2.54) LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE:20X 4221343/B 09/2016 www.ti.com PACKAGE OUTLINE LP0003A TO-92 - 5.34 mm max height SCALE 1.200 SCALE 1.200 TO-92 5.21 4.44 EJECTOR PIN OPTIONAL 5.34 4.32 (1.5) TYP SEATING PLANE (2.54) NOTE 3 2X 4 MAX (0.51) TYP 6X 0.076 MAX SEATING PLANE 2X 2.6 0.2 3X 12.7 MIN 3X 3X 0.55 0.38 0.43 0.35 2X 1.27 0.13 FORMED LEAD OPTION STRAIGHT LEAD OPTION OTHER DIMENSIONS IDENTICAL TO STRAIGHT LEAD OPTION 3X 2.67 2.03 4.19 3.17 3 2 1 3.43 MIN 4215214/B 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Lead dimensions are not controlled within this area. 4. Reference JEDEC TO-226, variation AA. 5. Shipping method: a. Straight lead option available in bulk pack only. b. Formed lead option available in tape and reel or ammo pack. c. Specific products can be offered in limited combinations of shipping medium and lead options. d. Consult product folder for more information on available options. www.ti.com EXAMPLE BOARD LAYOUT LP0003A TO-92 - 5.34 mm max height TO-92 0.05 MAX ALL AROUND TYP FULL R TYP METAL TYP (1.07) 3X ( 0.85) HOLE 2X METAL (1.5) 2X (1.5) 2 1 (R0.05) TYP 3 2X (1.07) (1.27) SOLDER MASK OPENING 2X SOLDER MASK OPENING (2.54) LAND PATTERN EXAMPLE STRAIGHT LEAD OPTION NON-SOLDER MASK DEFINED SCALE:15X 0.05 MAX ALL AROUND TYP ( 1.4) 2X ( 1.4) METAL 3X ( 0.9) HOLE METAL (R0.05) TYP 2 1 (2.6) SOLDER MASK OPENING 3 2X SOLDER MASK OPENING (5.2) LAND PATTERN EXAMPLE FORMED LEAD OPTION NON-SOLDER MASK DEFINED SCALE:15X 4215214/B 04/2017 www.ti.com TAPE SPECIFICATIONS LP0003A TO-92 - 5.34 mm max height TO-92 13.7 11.7 32 23 (2.5) TYP 0.5 MIN 16.5 15.5 11.0 8.5 9.75 8.50 19.0 17.5 6.75 5.95 2.9 TYP 2.4 3.7-4.3 TYP 13.0 12.4 FOR FORMED LEAD OPTION PACKAGE 4215214/B 04/2017 www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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