± SLLS567E − MAY 2003 − REVISED JANUARY 2004 D RS-232 Bus-Pin ESD Protection Exceeds D D D D D D D D DB OR DW PACKAGE (TOP VIEW) ±15 kV Using Human-Body Model (HBM) Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU v.28 Standards Operates at 5-V VCC Supply Four Drivers and Five Receivers Operates Up To 120 kbit/s Low Supply Current in Shutdown Mode . . . 1 µA Typical External Capacitors . . . 4 × 0.1 µF Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II Applications − Battery-Powered Systems, PDAs, Notebooks, Laptops, Palmtop PCs, and Hand-Held Equipment DOUT3 DOUT1 DOUT2 RIN2 ROUT2 DIN2 DIN1 ROUT1 RIN1 GND VCC C1+ V+ C1− 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 DOUT4 RIN3 ROUT3 SHDN EN RIN4 ROUT4 DIN4 DIN3 ROUT5 RIN5 V− C2− C2+ description/ordering information The MAX211 device consists of four line drivers, five line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 5-V supply. The devices operate at data signaling rates up to 120 kbit/s and a maximum of 30-V/µs driver output slew rate. The MAX211 has both shutdown (SHDN) and enable control (EN). In shutdown mode, the charge pumps are turned off, V+ is pulled down to VCC, V− is pulled to GND, and the transmitter outputs are disabled. This reduces supply current typically to 1 µA. EN is used to put the receiver outputs into the high-impedance state to allow wired-OR connection of two RS-232 ports. It has no effect on the RS-232 drivers or the charge pumps. ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE† TA SOIC (DW) 0°C to 70°C SSOP (DB) SOIC (DW) −40°C to 85°C SSOP (DB) Tube of 20 MAX211CDW Reel of 1000 MAX211CDWR Tube of 50 MAX211CDB Reel of 2000 MAX211CDBR Tube of 20 MAX211IDW Reel of 1000 MAX211IDWR Tube of 50 MAX211IDB Reel of 2000 MAX211IDBR TOP-SIDE MARKING MAX211C MAX211C MAX211I MAX211I † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 Function Tables INPUTS DRIVER RECEIVER DEVICE STATUS L All active All active Normal operation L H All active Z Normal operation H X Z Z Shutdown SHDN EN L X = don’t care, Z = high impedance EACH DRIVER INPUTS DIN SHDN OUTPUT DOUT L L H H L L X H Z DRIVER STATUS Normal operation Powered off X = don’t care, Z = high impedance EACH RECEIVER INPUTS RIN EN OUTPUT ROUT L L H H L L X H Z RECEIVER STATUS Normal operation Powered off X = don’t care, Z = high impedance 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 logic diagram (positive logic) 7 2 DIN1 DOUT1 6 3 DIN2 TTL/CMOS Inputs DOUT2 20 DIN3 DOUT3 21 28 DIN4 DOUT4 25 8 SHDN 9 ROUT1 RIN1 5 4 ROUT2 RIN2 26 TTL/CMOS Outputs RS-232 Outputs 1 27 ROUT3 RIN3 22 RS-232 Inputs 23 ROUT4 RIN4 19 ROUT5 18 RIN5 24 EN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Positive charge pump voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC − 0.3 V to 14 V Negative charge pump voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −14 V Input voltage range, VI: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V+ + 0.3 V Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V Output voltage range, VO: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V− − 0.3 V to V+ + 0.3 V Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Short-circuit duration: DOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Package thermal impedance, θJA (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 62°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4 and Figure 4) Supply voltage Driver high-level input voltage DIN VIH Control high-level input voltage EN, SHDN VIL Driver and control low-level input voltage DIN, EN, SHDN Driver and control input voltage DIN, EN, SHDN VI Receiver input voltage TA Operating free-air temperature MAX211C MAX211I MIN NOM MAX 4.5 5 5.5 UNIT V 2 V 2.4 0.8 0 5.5 −30 30 0 70 −40 85 V V °C NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4) PARAMETER ICC Supply current No load, Shutdown supply current TA = 25°C, ‡ All typical values are at VCC = 5 V, and TA = 25°C. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. 4 TYP‡ MAX See Figure 6 14 20 mA See Figure 1 1 10 µA TEST CONDITIONS POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN UNIT ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER VOH VOL IIH TEST CONDITIONS MIN TYP† High-level output voltage DOUT at RL = 3 kΩ to GND 5 9 Low-level output voltage DOUT at RL = 3 kΩ to GND −5 −9 Driver high-level input current DIN = VCC Control high-level input current EN, SHDN = VCC Driver low-level input current DIN = 0 V IIL Control low-level input current EN, SHDN = 0 V IOS‡ Short-circuit output current VCC = 5.5 V, VO = 0 V MAX UNIT V V 15 200 3 10 −15 −200 −3 −10 ±10 ±60 µA A µA A mA ro Output resistance VCC, V+, and V− = 0 V, VO = ±2 V 300 W † All typical values are at VCC = 5 V, and TA = 25°C. ‡ Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT Maximum data rate CL = 50 pF to 1000 pF, One DOUT switching, RL = 3 kΩ to 7 kΩ, See Figure 2 tPLH (D) Propagation delay time, low- to high-level output CL = 2500 pF, All drivers loaded, RL = 3 kΩ, See Figure 2 2 µs tPHL (D) Propagation delay time, high- to low-level output CL = 2500 pF, All drivers loaded, RL = 3 kΩ, See Figure 2 2 µs tsk(p) Pulse skew§ CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ, See Figure 3 300 ns SR(tr) Slew rate, transition region (see Figure 2) CL = 50 pF to 1000 pF, VCC = 5 V RL = 3 kΩ to 7 kΩ, 120 3 kbit/s 6 30 V/µs TYP UNIT ±15 kV † All typical values are at VCC = 5 V, and TA = 25°C. § Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. ESD protection PIN DOUT, RIN TEST CONDITIONS Human-Body Model POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER TEST CONDITIONS VOH VOL High-level output voltage IOH = −1 mA IOL = 1.6 mA VIT+ VIT− Positive-going input threshold voltage Vhys ri Input hysteresis (VIT+ − VIT−) Low-level output voltage Negative-going input threshold voltage Input resistance VCC = 5 V, VCC = 5 V, TA = 25°C TA = 25°C VCC = 5 V, TA = 25°C MIN TYP† 3.5 VCC−0.4 V 1.7 UNIT V 0.4 V 2.4 V 0.8 1.2 0.2 0.5 1 V 3 5 7 kW ±0.05 ±10 µA 0 ≤ ROUT ≤ VCC Output leakage current EN = VCC, † All typical values are at VCC = 5 V, and TA = 25°C. NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 5 V ± 0.5 V. MAX V switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4) TYP† MAX Propagation delay time, low- to high-level output CL= 150 pF, See Figure 4 0.5 10 µs Propagation delay time, high- to low-level output CL= 150 pF, See Figure 4 0.5 10 µs ten Output enable time CL= 150 pF, See Figure 5 RL = 1 kΩ, 600 ns tdis Output disable time CL= 150 pF, See Figure 5 RL = 1 kΩ, 200 ns tsk(p) Pulse skew‡ See Figure 3 300 ns PARAMETER tPLH (R) tPHL (R) TEST CONDITIONS † All typical values are at VCC = 5 V, and TA = 25°C. ‡ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Test conditions are C1−C4 = 0.1 µF, at VCC = 5 V ± 0.5 V. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN UNIT ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 PARAMETER MEASUREMENT INFORMATION ISHDN 0.1 µF + − 5.5 V 0.1 µF + − VCC C1+ 0.1 µF V+ + − V− 0.1 µF − + C1− C2+ 0.1 µF + − C2− VCC 400 kΩ 5.5 V DOUT DIN 3 kΩ D1 to D4 RIN ROUT +5.5 V EN 0-V or 5.5-V Drive 5 kΩ R1 to R5 5.5 V SHDN GND Figure 1. Shutdown Current Test Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 PARAMETER MEASUREMENT INFORMATION 0V SHDN 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V tPHL (D) CL (see Note A) tPLH (D) 3V Output −3 V TEST CIRCUIT SR(tr) + t PHL (D) 6V or t VOH 3V −3 V VOL VOLTAGE WAVEFORMS PLH (D) NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 120 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2. Driver Slew Rate and Propagation Delay Times 0V SHDN 3V Generator (see Note B) RS-232 Output 50 Ω RL 1.5 V Input 1.5 V 0V CL (see Note A) tPLH (D) tPHL (D) VOH 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 120 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Driver Pulse Skew 0V SHDN Input 3V 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω CL (see Note A) 0V EN tPHL (R) tPLH (R) VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 4. Receiver Propagation Delay Times 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 PARAMETER MEASUREMENT INFORMATION 3V 0V SHDN VCC S1 GND 1.5 V 0V tPZH (S1 at GND) tPHZ (S1 at GND) RL 3 V or 0 V 1.5 V Input Output Output VOH VOH − 0.1 V CL (see Note A) EN Generator (see Note B) 3.5 V tPZL (S1 at VCC) tPLZ (S1 at VCC) 50 Ω VOL + 0.1 V 0.8 V VOL Output TEST CIRCUIT NOTES: A. B. C. D. VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. Figure 5. Receiver Enable and Disable Times POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 APPLICATION INFORMATION DOUT3 DOUT1 DOUT2 RIN2 1 28 2 27 3 RIN3 5 kΩ 4 26 5 kΩ ROUT2 DOUT4 25 24 5 23 5V ROUT3 SHDN EN RIN4 5 kΩ 400 kΩ DIN2 6 22 ROUT4 5V 5V 400 kΩ DIN1 ROUT1 RIN1 GND 7 400 kΩ 21 8 9 5V 10 5 kΩ 400 kΩ 20 CBYPASS − DIN4 DIN3 = 0.1µF + 11 VCC C3 † = 0.1 µF 6.3 V − 18 + 12 13 C1 = 0.1 µF 6.3 V 19 VCC C1+ C4 = 0.1 µF 16 V 5 kΩ V− 14 RIN5 V+ + − ROUT5 C1− C2− 17 − 16 − + C2+ + C2 = 0.1 µF 16 V 15 † C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. Figure 6. Typical Operating Circuit and Capacitor Values 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 APPLICATION INFORMATION capacitor selection The capacitor type used for C1−C4 is not critical for proper operation. The MAX211 requires 0.1-µF capacitors, although capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2×) nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V−. Use larger capacitors (up to 10 µF) to reduce the output impedance at V+ and V−. Bypass VCC to ground with at least 0.1 µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1−C4). electrostatic discharge (ESD) protection Texas Instruments MAX211 devices have standard ESD protection structures incorporated on the pins to protect against electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures were designed to successfully protect these bus pins against ESD discharge of ±15 kV when powered down. ESD test conditions ESD testing is stringently performed by TI, based on various conditions and procedures. Please contact TI for a reliability report that documents test setup, methodology, and results. Human-Body Model The Human-Body Model (HBM) of ESD testing is shown in Figure 7. Figure 8 shows the current waveform that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor charged to the ESD voltage of concern and subsequently discharged into the DUT through a 1.5-kΩ resistor. RD 1.5 kΩ VHBM + − CS 100 pF DUT Figure 7. HBM ESD Test Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 ± SLLS567E − MAY 2003 − REVISED JANUARY 2004 APPLICATION INFORMATION 1.5 VHBM = 2 kV DUT = 10 V, 1-Ω Zener Diode I DUT − A 1.0 0.5 0.0 0 50 100 150 200 Time − ns Figure 8. Typical HBM Current Waveform Machine Model The Machine Model (MM) ESD test applies to all pins, using a 200-pF capacitor with no discharge resistance. The purpose of the MM test is to simulate possible ESD conditions that can occur during the handling and assembly processes of manufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins. However, after PC board assembly, the MM test no longer is as pertinent to the RS-232 pins. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 PACKAGING INFORMATION (1) Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty MAX211CDB ACTIVE SSOP DB 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDBE4 ACTIVE SSOP DB 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDBG4 ACTIVE SSOP DB 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDBR ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDBRE4 ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDBRG4 ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDW ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDWE4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDWG4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDWR ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDWRE4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211CDWRG4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDB ACTIVE SSOP DB 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDBE4 ACTIVE SSOP DB 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDBG4 ACTIVE SSOP DB 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDBR ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDBRE4 ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDBRG4 ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDW ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDWE4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDWG4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDWR ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDWRE4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM MAX211IDWRG4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM The marketing status values are defined as follows: Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-May-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 19-May-2007 Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant MAX211CDBR DB 28 MLA 330 16 8.2 10.5 2.5 12 16 Q1 MAX211CDWR DW 28 TAI 330 32 11.35 18.67 3.1 16 32 Q1 MAX211IDBR DB 28 MLA 330 16 8.2 10.5 2.5 12 16 Q1 MAX211IDWR DW 28 TAI 330 32 11.35 18.67 3.1 16 32 Q1 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) MAX211CDBR DB 28 MLA 342.9 336.6 28.58 MAX211CDWR DW 28 TAI 346.0 346.0 49.0 MAX211IDBR DB 28 MLA 342.9 336.6 28.58 MAX211IDWR DW 28 TAI 346.0 346.0 49.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-May-2007 Pack Materials-Page 3 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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