ams AS1100 Serially interfaced, 8-digit led driver Datasheet

A S 11 0 0
D a ta S he e t
Serially Interfaced, 8-Digit LED Driver
1 General Description
2 Key Features
The AS1100 is an LED driver for 7 segment numeric
displays of up to 8 digits. The AS1100 can be
programmed via a conventional 4 wire serial interface.
The device includes a BCD code-B decoder, a multiplex
scan circuitry, segment and display drivers, and a 64 Bit
memory. The memory is used to store the LED settings,
so that continuous reprogramming is not necessary.
Every individual segment can be addressed and
updated separately. Only one external resistor is
required to set the current through the LED display.
Brightness can be controlled either in an analog or
digital way. The user can choose the internal code-B
decoder to display numeric digits or to address each
segment directly.
The AS1100 features an extremely low shutdown
current of only 20µA and an operational current of less
than 500µA. The number of visible digits can be
programmed as well. The AS1100 can be reset by
software and an external clock can be used. Several test
modes support easy debugging.
!
10MHz Serial Interface
!
Individual LED Segment Control
!
Decode/No-Decode Digit Selection
!
20µA Low-Power Shutdown (Data Retained)
!
Extremely low Operating Current 0.5mA in open
loop
!
Digital and Analog Brightness Control
!
Display Blanked on Power-Up
!
Drive Common-Cathode LED Display
!
Software Reset
!
Optional External clock
!
24-pin DIP and SOIC Packages
3 Applications
The AS1100 is an ideal solution for Bar-Graph Displays,
Industrial Controllers, Panel Meters, LED Matrix
Displays and White Goods such as washing machines
and dishwasher.
The AS1100 is offered in a 24-pin DIP and SOIC
packages.
Figure 1. Typical Application Diagram – Single Cell to 3.3V Synchronous Boost Converter
+5V
19
9.53k
VDD
18
ISET DIFG0-DIG3
MOSI
1 DIN
µP I/O
12 LOAD
SCK
1 CLK
9 GND
8 Digits
SEG A-G
SEP DP
8 Segments
GND
4
8-Digit µP Display
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Revision 1.33
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AS1100
Data Sheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
TOP
DIN
1
24 DOUT
DIG0 2
23 SEG D
DIG4 3
22 SEG DP
GND 4
21 SEG E
DIG6 5
DIG2 6
AS1100
20 SEG C
DIG3 7
19 VDD
18 ISET
DIG7 8
17 SEG G
GND 9
16 SEG B
DIG5 10
15 SEG F
14 SEG A
13 CLK
DIG1 11
LOAD12
DIP/SO
Pin Descriptions
Table 1. Pin Descriptions
Pin
Name
Pin
Number
DIN
1
DIG 0 – DIG 7
2, 3, 5–8,
10, 11
GND
4, 9
LOAD/CS
12
CLK
13
SEG A–G, DP
14–17,
20–23
ISET
18
VDD
19
DOUT
24
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Description
Data input. Data is programmed into the 16Bit shift register on the rising
CLK edge
8 digit driver lines that sink the current from the common cathode of the
display. In shutdown mode the AS1100 switches the outputs to VDD.
Both GND pins must be connected.
Strobe input. With the rising edge of the LOAD signal the 16 bit of serial
data is latched into the register.
Clock input. The interface is capable to support clock frequencies up to
10MHz. The serial data is clocked into the internal shift register with the
rising edge of the CLK signal. On the DOUT pin the data is applied with the
falling edge of CLK.
Seven segment driver lines including the decimal point. When a
segment is turned off the output is connected to GND.
The current into ISET determines the peak current through the segments
and therefore the brightness.
Positive Supply Voltage (+5V)
Serial data output for cascading drivers. The output is valid after 16.5
clock cycles. The output is never set to high impedance.
Revision 1.33
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AS1100
Data Sheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
VDD to GND
-0.3
+6
V
DIN, CLK, LOAD to GND
-0.3
+6
V
All other Pins to GND
-0.3
VDD + 0.3
V
VOUT
-0.3
7
V
Notes
Electro Static Discharge at Digital
Outputs
+500
V
Electro Static Discharge at all other pins
+1000
V
DIG0–DIG7 Sink Current
500
mA
SEGA–G, DP Source Current
100
mA
Latch up Immunity
±200
mA
Narrow Plastic DIP
1066
mW
Derate 13.3mW/°C above +70°C
Wide SO
941
mW
Derate 11.8mW/°C above +70°C
Current
Continuous Power Dissipation (TA = +85°C)
Operating Temperature Ranges (TMIN to TMAX)
AS1100xL
0
+70
ºC
AS1100xE
-40
+85
ºC
Storage Temperature Range
-65
+150
ºC
Package Body Temperature
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+260
Revision 1.33
ºC
The reflow peak soldering temperature
(body temperature) specified is in
accordance with IPC/JEDEC J-STD020C “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid
State Surface Mount Devices”.
The lead finish for Pb-free leaded
packages is matte tin (100% Sn).
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AS1100
Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VDD = 5V, RSET = 9.53kΩ±1%, TA = TMIN to TMAX, unlesss otherwise noted.
Table 3. Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VDD
Operating Supply Voltage
4.0
5.0
5.5
V
IDDSD
Shutdown Supply Current
20
50
µA
IDD
Operating Supply Current
500
µA
All segments and decimal point on,
ISEG = -40mA
Display Scan Rate
8 digits scanned
500
VOUT = 0.65V
320
TA = +25ºC, VOUT = (VDD -1V)
-30
All digital inputs at VDD or GND,
TA = +25ºC
RSET = open circuit
fOSC
Digit Drive Sink Current
IDIGIT
330
800
mA
1300
Hz
mA
ISEG
Segment Drive Source Current
ΔISEG
Segment Drive Current
Matching
IDIGIT
Digit Drive Source Current
Digit off, VDIGIT = (VDD -0.3V)
-2
mA
ISEG
Segment Drive Sink Current
Segment off, VSEG = 0.3V
5
mA
VIN = 0V or VDD
-1
-40
-45
3.0
mA
%
Logic Inputs
IIH, IIL
Input Current DIN, CLK, LOAD
VIH
Logic High Input Voltage
VIL
Logic Low Input Voltage
VOH
Output High Voltage
DOUT, ISOURCE = -1mA
VOL
Output Low Voltage
DOUT, ISINK = 1.6mA
Hysteresis Voltage
DIN, CLK, LOAD
1
3.5
µA
V
0.8
VDD - 1
V
V
0.4
1
V
V
Timing Characteristics
tCP
CLK Clock Period
100
ns
tCH
CLK Pulse Width High
50
ns
tCL
CLK Pulse Width Low
50
ns
tCSH
CLK Rise to LOAD Rise Hold
Time
0
ns
tDS
DIN Setup Time
25
ns
tDH
DIN Hold Time
0
ns
tDO
Output Data Propagation Delay
tLDCK
LOAD Rising Edge to Next
Clock Rising Edge
50
ns
tCSW
Minimum LOAD Pulse High
50
ns
tDSPD
Data-to-Segment Delay
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CLOAD = 50pF
25
2.25
Revision 1.33
ns
ms
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AS1100
Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
Figure 4. Segment Current versa RSET
50
50
45
45
40
40
ISEGMENT (mA) .
Segment Current (mA) .
Figure 3. Segment Driver Capability,
VDD = 5V, Logic Level = High
35
30
25
20
15
35
30
25
20
15
10
10
5
5
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
Voltage below VDD at output (V)
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4.5
10
Revision 1.33
RSET (kOhm)
100
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AS1100
Data Sheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
Serial-Addressing Modes
Programming of the AS1100 is done via 4 wire serial interface. A programming sequence consists of 16-bit packages.
The data is shifted into the internal 16 Bit register with the rising edge of the CLK signal. With the rising edge of the
LOAD signal the data is latched into a digital or control register depending on the address. The LOAD signal must go to
high after the 16th rising clock edge. The LOAD signal can also come later but just before the next rising edge of CLK,
otherwise data would be lost. The content of the internal shift register is applied 16.5 clock cycles later to the DOUT
pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bit-programming package are described in
Table 4. The first 4 Bits D15-D12 are don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit
is D15, the most significant bit (MSB). The exact timing is given in Figure 5.
Figure 5. Timing Diagram
tCSW
LOAD
tCS
tCH
tCL
tCP
tLDCK
CLK
tDH
tDS
DIN
D14
D15
D1
D0
tDO
DOUT
Table 4. Serial data format (16bits)
D15
D14
D13
D12
X
X
X
X
D11
D10
D9
Address
D8
D7
MSB
D6
D5
D4
D3
Data
D2
D1
D0
LSB
Digit and Control Registers
The AS1100 incorporates 15 registers, which are listed in Table 5. The digit and control registers are selected via the
4Bit address word. The 8 digit registers are realized with a 64bit memory. Each digit can be controlled directly without
rewriting the whole contents. The control registers consist of decode mode, display intensity, number of scanned digits,
shutdown, display test, and reset/external clock register.
Shutdown Mode
The AS1100 features a shutdown mode, where it consumes only 20µA current. The shutdown mode is entered via a
write to register 0Ch. Then all segment current sources are pulled to ground and all digit drivers are connected to VDD,
so that nothing is displayed. All internal digit registers keep the programmed values. The shutdown mode can either be
used for power saving or for generating a flashing display by repeatedly entering and leaving the shutdown mode. The
AS1100 needs typically 250µs to exit the shutdown mode. During shutdown the AS1100 is fully programmable. Only
the display test function overrides the shutdown mode.
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Revision 1.33
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AS1100
Data Sheet - D e t a i l e d D e s c r i p t i o n
Initial Power-Up
After powering up the system all register are reset, so that the display is blank. The AS1100 starts the shutdown mode.
All registers should be programmed for normal operation. The default settings enable only scan of one digit, the
internal decoder is disabled, data register and intensity register are set to the minimum value.
Decode-Mode Register
In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code
consists of the numbers 0-9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit.
In case that the decoder is bypassed (logic low) the data Bits D7-D0 correspond to the segment lines of the AS1100. In
Table 7 some possible settings for register 09h are shown. Bit D7, which corresponds to the decimal point, is not
affected by the settings of the decoder. Logic high means that the decimal point is displayed. In Table 8 the font of the
Code B decoder is shown. In Table 9 the correspondence of the register to the appropriate segments of a 7 segment
display is shown (see Figure 6).
Intensity Control and Interdigit Blanking
Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current,
which flows between VDD and ISET, defines the current that flows through the LEDs. The LED current is 100 times the
ISET current. The minimum value of RSET should be 9.53kΩ, which corresponds to 40mA segment current. The
brightness of the display can also be controlled digitally via register 0Ah. The brightness can be programmed in 16
steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display.
Scan-Limit Register
The scan limit register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency
is typically 800Hz. If the number of digits displayed is reduced, the update frequency is reduced as well. The frequency
can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the
brightness, the resistor RSET should be adjusted accordingly. The Table 12 shows the maximum allowed current, when
fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be used to blank
portions of the display (leading zeros).
Table 5. Register address map
Address
D15-D12
D11
D10
D9
D8
Hex
Code
No-Op
X
0
0
0
0
0xX0
Digit 0
X
0
0
0
1
0xX1
Digit 1
X
0
0
1
0
0xX2
Digit 2
X
0
0
1
1
0xX3
Digit 3
X
0
1
0
0
0xX4
Digit 4
X
0
1
0
1
0xX5
Digit 5
X
0
1
1
0
0xX6
Digit 6
X
0
1
1
1
0xX7
Digit 7
X
1
0
0
0
0xX8
Decode Mode
X
1
0
0
1
0xX9
Intensity
X
1
0
1
0
0xXA
Scan Limit
X
1
0
1
1
0xXB
Shutdown
X
1
1
0
0
0xXC
Not used
X
1
1
0
1
0xXD
Reset and ext. Clock
X
1
1
1
0
0xXE
Display Test
X
1
1
1
1
0xXF
Register
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Revision 1.33
7 - 17
AS1100
Data Sheet - D e t a i l e d D e s c r i p t i o n
Table 6. Shutdown Register Format (address (hex) = 0xXC
Register Data
Mode
Address Code
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
Shutdown Mode
0xXC
X
X
X
X
X
X
X
0
Normal Operation
0xXC
X
X
X
X
X
X
X
1
Table 7. Decode-mode Register Examples (address (hex) = 0xX9
Register Data
Decode Mode
Hex Code
D7
D6
D5
D4
D3
D2
D1
D0
No decode for digits 7–0
0
0
0
0
0
0
0
0
0x00
Code B decode for digit 0
No decode for digits 7–1
0
0
0
0
0
0
0
1
0x01
Code B decode for digits 3–0
No decode for digits 7– 4
0
0
0
0
1
1
1
1
0x0F
Code B decode for digits 7–0
1
1
1
1
1
1
1
1
0xFF
Table 8. Code B font
7-Segment
Character
Register Data
D7*
On Segments = 1
D6-D4
D3
D2
D1
D0
0
X
0
0
0
1
X
0
0
2
X
0
3
X
4
DP*
A
B
C
D
E
F
G
0
1
1
1
1
1
1
0
0
1
0
1
1
0
0
0
0
0
1
0
1
1
0
1
1
0
1
0
0
1
1
1
1
1
1
0
0
1
X
0
1
0
0
0
1
1
0
0
1
1
5
X
0
1
0
1
1
0
1
1
0
1
1
6
X
0
1
1
0
1
0
1
1
1
1
1
7
X
0
1
1
1
1
1
1
0
0
0
0
8
X
1
0
0
0
1
1
1
1
1
1
1
9
X
1
0
0
1
1
1
1
1
0
1
1
--
X
1
0
1
0
0
0
0
0
0
0
1
E
X
1
0
1
1
1
0
0
1
1
1
1
H
X
1
1
0
0
0
1
1
0
1
1
1
L
X
1
1
0
1
0
0
0
1
1
1
0
P
X
1
1
1
0
1
1
0
0
1
1
1
blank
X
1
1
1
1
0
0
0
0
0
0
0
Note: The decimal point is set by bit D7 = 1
Table 9. No-decode mode data bits and corresponding segment lines
Register Data
Corresponding Segment Line
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D7
D6
D5
D4
D3
D2
D1
D0
DP
A
B
C
D
E
F
G
Revision 1.33
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AS1100
Data Sheet - D e t a i l e d D e s c r i p t i o n
Figure 6. Standard 7-segment LED
A
F
B
G
C
E
D
DP
Table 10. Intensity register format (address (hex) = 0xXA)
Duty Cycle
D7
D6
D5
D4
D3
D2
D1
D0
Hex Code
1/32 (min on)
X
X
X
X
0
0
0
0
0xX0
3/32
X
X
X
X
0
0
0
1
0xX1
5/32
X
X
X
X
0
0
1
0
0xX2
7/32
X
X
X
X
0
0
1
1
0xX3
9/32
X
X
X
X
0
1
0
0
0xX4
11/32
X
X
X
X
0
1
0
1
0xX5
13/32
X
X
X
X
0
1
1
0
0xX6
15/32
X
X
X
X
0
1
1
1
0xX7
17/32
X
X
X
X
1
0
0
0
0xX8
19/32
X
X
X
X
1
0
0
1
0xX9
21/32
X
X
X
X
1
0
1
0
0xXA
23/32
X
X
X
X
1
0
1
1
0xXB
25/32
X
X
X
X
1
1
0
0
0xXC
27/32
X
X
X
X
1
1
0
1
0xXD
29/32
X
X
X
X
1
1
1
0
0xXE
31/32 (max on)
X
X
X
X
1
1
1
1
0xXF
Table 11. Scan -limit register format (address (hex) = 0xXB)
Decode Mode
Register Data
Hex Code
D7
D6
D5
D4
D3
D2
D1
D0
Display digit 0 only
X
X
X
X
X
0
0
0
0xX0
Display digit 0 & 1
X
X
X
X
X
0
0
1
0xX1
Display digit 0 1 2
X
X
X
X
X
0
1
0
0xX2
Display digit 0 1 2 3
X
X
X
X
X
0
1
1
0xX3
Display digit 0 1 2 3 4
X
X
X
X
X
1
0
0
0xX4
Display digit 0 1 2 3 4 5
X
X
X
X
X
1
0
1
0xX5
Display digit 0 1 2 3 4 5 6
X
X
X
X
X
1
1
0
0xX6
Display digit 0 1 2 3 4 5 6 7
X
X
X
X
X
1
1
1
0xX7
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Revision 1.33
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AS1100
Data Sheet - D e t a i l e d D e s c r i p t i o n
Display Test Register
With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximum
brightness (duty cycle 31/32). All programming of digit and control registers are maintained. The format of the register
is given in Table 13.
Table 12. Maximum segment current for 1-, 2-, or 3-digit displays
Number of digits Displayed
Maximum Segment Current (mA)
1
10
2
20
3
30
Table 13. Display-test register format (address (hex) = 0xXF)
Mode
Register Data
D7
D6
D5
D4
D3
D2
D1
D0
Normal Operation
X
X
X
X
X
X
X
0
Display Test Mode
X
X
X
X
X
X
X
1
Note: The AS1100 remains in display-test mode until the display-test register is reconfigured for normal operation.
No-Op Register (Cascading of AS1100)
The no-operation register 00h is used when AS1100s are cascaded in order to support more than 8 digit displays. The
cascading must be done in a way that all DOUT are connected to DINof the following AS1100. The LOAD and CLK
signals are connected to all devices. For a write operation for example to the fifth device the command must be
followed by four no-operation commands. When the LOAD signal finally goes to high all shift registers are latched. The
first four devices have got no-operation commands and only the fifth device sees the intended command and updates
its register.
Reset and external Clock Register
This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the
CLK pin of the serial interface operates as system clock input.) and to apply an external reset (D1). This brings all
registers (except reg. E) to default state. For standard operation the register contents should be "00h".
Table 14. Reset and External Clock Register (address (hex) = oxXE)
Mode
Address
Register Data
code (Hex)
D7
D6
D5
D4
D3
D2
D1
D0
Normal Operation,
internal clock
0xXE
X
X
X
X
X
X
0
0
Normal Operation,
external clock
0xXE
X
X
X
X
X
X
0
1
Reset state,
internal clock
0xXE
X
X
X
X
X
X
1
0
Reset state,
external clock
0xXE
X
X
X
X
X
X
1
1
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Revision 1.33
10 - 17
AS1100
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
Supply Bypassing and Wiring
In order to achieve optimal performance the AS1100 shall be placed very close to the LED display to minimize effects
of electromagnetic interference and wiring inductance. Furthermore, it is recommended to connect a 10µF electrolytic
and a 0.1µF ceramic capacitor between VDD and GND to avoid power supply ripple. Also, both GNDs must be
connected to ground.
Selecting RSET Resistor and Using External Drivers
The current through the segments is controlled via the external resistor RSET. Segment current is about 100 times the
current in ISET. The right values for ISET are given in Table 15. The maximum current the AS1100 can drive is 40mA.
If higher currents are needed, external drivers must be used. In that case it is no longer necessary that the AS1100
drives high currents. A recommended value for RSET is 47kΩ. In cases that the AS1100 only drives few digits, Table 12
specifies the maximum currents and RSET must be set accordingly. Refer to absolute maximum ratings to calculate
acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop.
Table 15. RSET vs segment current and LED forward voltage
ISEG (mA)
VLED(V)
1.5
2.0
2.5
3.0
3.5
40
12.2kΩ
11.8kΩ
11.0kΩ
10.6kΩ
9.69kΩ
30
17.8kΩ
17.1kΩ
15.8kΩ
15.0kΩ
14.0kΩ
20
29.8kΩ
28.0kΩ
25.9kΩ
24.5kΩ
22.6kΩ
10
66.7kΩ
63.7kΩ
59.3kΩ
55.4kΩ
51.2kΩ
8x8 LED Dot Matrix Driver
The example in Figure 7 uses the AS1100 to drive an 8x8 LED dot matrix. The LED columns have common cathode
and are connected to the DIG0-7 outputs. The rows are connected to the segment drivers. Each of the 64 LEDs can be
addressed separately. The columns are selected via the digits as shown in Table 5. The decode mode register (0xX9)
has to be programmed to ‘00000000’ as stated in Table 4. The single LEDs in a column can be addressed as stated in
Table 9, where D0 corresponds to segment G and d/ to segment DP. For a multiple digit dot matrix several AS1100
have to be cascaded.
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AS1100
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 7. Application example as LED dot matrix driver
SEG G
SEG F
SEG G
SEG E
SEG F
SEG D
SEG E
SEG C
SEG D
SEG B
SEG C
SEG A
SEG B
SEG DP
SEG A
SEG DP
DIG 7
DIG 0
DIG 7
DIG 0
SEG A-G
24
SEP DP
VDD
1
SEG A-G
19
24
SEP DP
DIP
µP
12
1
9
9.53k
LOA
GND
ISET 18
1
GND
9
4
19
DIP
12
CLK
VDD
1
9.53k
LOA
CLK
GND
ISET 18
GND
4
Cascading Drivers
The AS1100 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1100.
Table 16. Package thermal resistance data
Package
Thermal Resistance (θJA)
24 Narrow DIP
+75ºC/W
24 Wide SO
+85ºC/w
Maximum Junction Temperature (TJ) = +150ºC
Maximum Ambient Temperature (TA) = +85ºC
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AS1100
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Computing Power Dissipation
The upper limit for power dissipation (PD) for the AS1100 is determined from the following equation:
PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N)
(EQ 1)
Where:
VDD = supply voltage
DUTY = duty cycle set by intensity register
N = number of segments driven (worst case is 8)
VLED = LED forward voltage
ISEG = segment current set by RSET
Dissipation Example:
ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V
PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.07W
Thus, for a PDIP package θJA = +75°C/W (from Table 13), the maximum allowed ambient temperature TA is given by:
TJ,MAX = TA + PD x θJA = 150°C = TA +1.07W x 75°C/W.
Where:
TA = +69.7°C.
The TA limit for SO Packages in the dissipation example above is +59.0°C.
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AS1100
Data Sheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The device is available in a SOIC-24 package and PDIP-24 package .
Figure 8. SOIC-24 package Diagram
Table 17. SOIC-24 package Dimensions
Symbol
Min
Max
Symbol
Min
Max
A
2.44
2.64
H
10.11
10.51
A1
0.10
0.30
h
0.31
0.71
A2
2.24
2.44
J
0.53
0.73
B
0.36
0.46
K
C
0.23
0.32
L
0.51
1.01
D
15.20
15.40
R
0.63
0.89
E
7.40
7.60
ZD
e
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α
1.27 BSC
Revision 1.33
7° BSC
0.66 REF
0°
8°
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AS1100
Data Sheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
Figure 9. PDIP-24 package Diagram
Table 18. PDIP-24 package Dimensions
Symbol
Min
Typ
A
Max
Symbol
Min
4.32
E1
6.35
Max
6.60
6.86
e1
2.54 BSC
0.56
eA
7.62 BSC
1.52
1.65
L
3.18
3.43
1.14
1.27
1.40
α
0°
15°
C
0.20
0.25
0.30
N
D
31.62
31.75
31.88
Q1
E
7.62
8.26
Q2
A1
0.380
B
0.38
0.46
B1
1.40
b1
S
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Revision 1.33
24
1.40
1.52
1.65
3.30
1.78
1.91
2.03
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AS1100
Data Sheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
Table 19. Ordering Information
Part
AS1100PL
Temp Range
0ºC to +70ºC
Package
Plastic DIP 24-pin
Delivery Form
Tubes
AS1100WL
0ºC to +70ºC
SOIC 24-pin
Tubes
AS1100PE
-40ºC to +85ºC
Plastic DIP 24-pin
Tubes
AS1100WE
-40ºC to +85ºC
SOIC 24-pin
Tubes
AS1100WL-T
0ºC to +70ºC
SOIC 24-pin
Tape & Reel
-40ºC to +85ºC
SOIC 24-pin
Tape & Reel
AS1100WE-T
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AS1100
Data Sheet
Copyrights
Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of the copyright owner.
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Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement.
austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice.
Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring
extended temperature range, unusual environmental requirements, or high reliability applications, such as military,
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A-8141 Schloss Premstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
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