LMV1099 LMV1099 Uplink Far Field Noise Suppression & Downlink SNR Enhancing Microphone Amplifier with Earpiece Driver Literature Number: SNAS490C LMV1099 Uplink Far Field Noise Suppression & Downlink SNR Enhancing Microphone Amplifier with Earpiece Driver General Description ■ Supply current (VDD = 3.6V) 3.8mA (typ) The LMV1099 is an uplink and downlink voice intelligibility enhancing analog IC, ideally suited for mobile handsets. Uplink voice intelligibility is improved by rejecting far-field noise through a unique two-microphone solution. Downlink voice intelligibility is improved by enhancing the SNR (Signal-toNoise Ratio) between the downlink voice and the ambient noise environment at the user’s earpiece. The LMV1099 preserves uplink near-field voice signals within close range of the microphones while rejecting far-field acoustic noise greater than 0.5m from the microphones. The LMV1099 also enhances downlink voice intelligibility by improving near-field SNR based on the user’s environment. The analog circuitry adapts dynamically to both the user’s ambient noise environment as well as the downlink signal amplitude to ensure optimum SNRI (signal-to-noise ratio improvement). The downlink path also provides uplink noise attenuation through an adjustable high pass filter before the SNR enhanced downlink voice reaches the user’s earpiece. Unlike digital-based noise reduction solutions, the all-analog low power consuming LMV1099 increases both uplink and downlink voice intelligibility without DSP-type artifacts, distortions or processing delays. ■ Shutdown current 0.06μA (typ) ■ Uplink PSRR (f = 217Hz) 106dB (typ) ■ Downlink SNR (A-weighted) 102dB (typ) ■ Downlink THD+N 0.03% (typ) Key Specifications ■ Uplink Far Field Noise Suppression (Electrical FFNSE at f = 1kHz) ■ Near-Field SNR Enhancement 33dB (typ) 6 to 18dB (typ) ■ Downlink SNRIE ■ Supply voltage range 16dB (typ) 2.7V to 5.5V ■ Earpiece output power (RL = 32Ω) 83mW (typ) Features ■ Noise reduction without DSP-type artifacts. ■ Adapting AGC (Automatic Gain Control) on ambient noise ■ ■ ■ ■ ■ ■ ■ ■ ■ level & downlink signal strength Downlink adjustable noise-reducing high pass filter Separate Uplink & Downlink Enable Functions No added process delays Low power consumption Shutdown function Maximum AGC Limiter Differential inputs & outputs for noise immunity Earpiece amplifier Available in a 25-bump micro SMD Applications ■ Mobile Handsets ■ Mobile and handheld two-way radios ■ Bluetooth and other power headsets 30107630 FIGURE 1. Voice Enhanced Signal © 2011 National Semiconductor Corporation 301076 www.national.com LMV1099 Uplink Far Field Noise Suppression & Downlink SNR Enhancing Microphone Amplifier with Earpiece Driver March 31, 2011 LMV1099 Block Diagram 30107604 www.national.com 2 LMV1099 Typical Application 30107605 FIGURE 2. Typical Application Circuit Diagram 3 www.national.com LMV1099 Connection Diagrams 25 – Bump micro SMD package 30107644 Top View Order Number LMV1099TL See NS Package Number TLA25GMA 25 – Bump micro SMD Marking 25 – Bump micro SMD Package View 30107626 Bottom View Order Number LMV1099TL See NS Package Number TLA25GMA 30107659 Top View X = Plant Code Y = Date Code TT = Die Traceability ZA5 = LMV1099TL Ordering Information Order Number Package Package Drawing Number Device Marking Transport Media LMV1099TL 25 Bump microSMD TLA25GMA XYTTZA5 250 TNR LMV1099TLX 25 Bump microSMD TLA25GMA XYTTZA5 3k TNR www.national.com 4 LMV1099 Pin Descriptions TABLE 1. Pin Name and Function PIN NAME TYPE UPLINK PIN DESCRIPTIONS D5 MIC1+ Analog Input Uplink Voice Positive Microphone #1 Input E5 MIC1- Analog Input Uplink Voice Negative Microphone #1 Input B5 MIC2+ Analog Input Uplink Voice Positive Microphone #2 Input C5 MIC2- Analog Input Uplink Voice Negative Microphone #2 Input E4 MIC BIAS Analog Output Microphone DC Bias Voltage Output E3 REF Analog Ref Microphone Reference Bypass Pin D3 OUT+ Analog Output Uplink Positive Output (To Baseband Chipset) C3 LPF+ Analog Input Uplink-Output Low Pass Filter Positive Feedback Input D4 OUT- Analog Output Uplink Negative Output (To Baseband Chipset) C4 LPF- Analog Input Uplink-Output Low Pass Filter Negative Feedback Input PIN NAME TYPE DOWNLINK PIN DESCRIPTIONS A4 DV+ Analog Input Downlink Voice Positive Input A5 DV- Analog Input Downlink Voice Negative Input A2 CT1 Analog Ref Control Signal Timing Capacitor B2 CT2 Analog Ref Control Signal Timing Capacitor B1 CT3 Analog Ref Control Signal Timing Capacitor A3 GND Ground Power Supply Ground Pin D1 Bypass Analog Ref Earpiece Reference Bypass Pin B3 EP+ Analog Output Ear Speaker Positive Output (To Ear Piece Speaker) B4 EP- Analog Output Ear Speaker Negative Output (To Ear Piece Speaker) PIN NAME TYPE DIGITAL INTERFACE & SUPPLY PIN DESCRIPTIONS D2 SCL Digital Input I2C Serial Clock Digital Input C2 EN Digital Input E2 SDA Digital I/O E1 I2CVDD Digital Supply I2C Chip Enable Digital Input I2C Serial Data Address Digital Input/Output Pin I2C Digital Supply Voltage Pin A1 VDD Supply Power Supply Voltage Pin C1 DCAP Analog Ref Voice Signal Detection Capacitor Note: Pin assignment subject to change. 5 www.national.com LMV1099 Thermal Resistance Absolute Maximum Ratings (Note 1) 70°C/W θJA (microSMD) (Note 3) Soldering Information See AN-112 “microSMD Wafers Level Chip Scale Package.” If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature ESD Rating (HBM) (Note 4) ESD Rating (MM) (Note 5) ESD Rating (CDM) (Note 6) Junction Temperature (TJMAX) Mounting Temperature Infrared or Convection (20 sec.) 6.0V -85°C to +150°C 2000V 200V 750V 150°C 235°C Operating Ratings (Note 1) 2.7V ≤ VDD ≤ 5.5V Supply Voltage 1.7V ≤ I2CVDD ≤ 5.5V I2CVDD I2CVDD ≤ VDD TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ +85°C Electrical Characteristics VDD = 3.6V (Note 2) Unless otherwise specified, all limits guaranteed for TA = 25°C, VDD = 3.6V, EN = VDD. For Uplink tests, unless otherwise specified, preamplifier gain = 20dB, post amplifier gain = 6dB, VIN = 18mVP-P, f = 1kHz, RL = 100kΩ, CL = 4.7pF and in pass-through mode. For Downlink tests, unless otherwise specified, f = 1kHz, RL = 32Ω, AGCAV = 0dB. LMV1099 Symbol Parameter Conditions Typical (Note 7) Limit (Note 8) 4.5 Units (Limits) GENERAL SPECIFICATIONS IDDQ Supply Quiescent Current VIN = 0V 3.8 EN pin is Low 0.06 1 μA (max) 27 40 ms (max) mA (max) ISD Shutdown Current TON IC Wake-up Time VIH Logic High Input Threshold EN, SCL, SDA 0.7xI2CVDD V (min) VIL Logic Low Input Threshold EN, SCL, SDA 0.3xI2CVDD V (max) UPLINK SPECIFICATIONS f = 1kHz (See Test Method) f = 300Hz (See Test Method) 33 42 27.5 dB (min) dB (min) Signal-to-Noise Ratio Improvement (Electrical) f = 1khz (See Test Method) f = 300Hz (See Test Method) 25 33 19.5 dB (min) dB (min) Maximum Input Signal THD+N < 1%, Pre Amp Gain = 12dB 435 395 mVPP (min) Maximum AC Output Voltage Differential Output, f = 1kHz THD+N < 1% 1.25 1.10 VRMS (min) DC Level at Outputs VIN = GND 825 Output Offset Voltage VIN(Mic1/Mic2) = 0V, Input Referred 0.7 5.0 mV (max) Differential Output 0.1 0.3 % (max) FFNSE Far Field Noise Suppression (Electrical) SNRIE VIN VOUT VOS THD+N Total Harmonic Distortion + Noise mV FR Frequency Response 30Hz – 12kHz (without Filter) ±0.5 dB SNR Signal-to-Noise Ratio VIN = 18mVP-P, A-Weighted, audio band 65 dB eN Input Referred Noise level A-Weighted 7 μVRMS ZIN Input Impedance ZOUT 150 Output Impedance Allowable Load Impedance AM Microphone Pre Amplifier Gain Range Minimum setting Maximum setting AMR Microphone Pre Amplifier Gain Resolution AP Post Amplifier Gain Range APR Post Amplifier Gain Resolution www.national.com 10 100 12 36 2 Minimum setting Maximum setting 6 kΩ (min) pF (max) dB 1.7 2.3 6 12 6.0 kΩ (min) kΩ max) Ω 235 RLOAD CLOAD ZLOAD 127 173 dB (min) dB (max) dB 5.8 6.2 dB (min) dB (max) Parameter Conditions Typical (Note 7) Limit (Note 8) Units (Limits) Input Referred, Input AC Grounded (470nF) PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio f = 217Hz, VRIPPLE = 200mVPP 106 92 dB (min) f = 1kHz, VRIPPLE = 200mVPP 102 91 dB (min) Input referred 60 1.85 2.15 V (max) V (min) VBM Microphone Bias Supply Voltage IBM = 1mA 2.0 eVBM Microphone Bias Supply Noise A-Weighted, CB = 10nF 5.5 IBMAX Maximum Microphone Reference Output Current dB μVRMS 1.2 mA (max) DOWNLINK SPECIFICATIONS VIN(DV) VOS eN Maximum Input Signal (Differential) THD+N < 1%, AGCAV = 0dB 4.7 4.1 VPP(DIFF) (min) Output Offset Voltage VIN(DV) = 0V, RL = 32Ω, Input Referred 0.7 5.0 mV (max) Output Noise level A-Weighted, VIN(DV) = 0V, AGCAV = 0dB 8.9 μVRMS SNR Downlink Signal-to-Noise Ratio PO = 35mW, A-Weighted 102 POUT Output Power THD+N<1%, f = 1kHz, RL = 32Ω 83 VLIMIT Output Voltage Limit PLEV = 0 3.6 VP-P PLEV = 1 4.1 VP-P f = 1kHz, PO = 35mW, RL = 32Ω 0.03 30Hz – 17kHz (without Filter) ±0.5 THD+N Total Harmonic Distortion + Noise FR Frequency Response dB 65 0.05 mW (min) % (max) dB Input AC Grounded (68nF) PSRR Power Supply Rejection Ratio CMRR Common Mode Rejection Ratio ZIN(DL) Downlink Input Impedance f = 217Hz, VRIPPLE = 200mVP-P, RL = 32Ω 93 82 dB (min) f = 1kHz, VRIPPLE = 200mVP-P, RL = 32Ω 92 81 dB (min) VIN = 200mVP-P, f = 217Hz, RL = 32Ω 50 VIN = 200mVP-P, f = 1kHz, RL = 32Ω 60 dB 6.5 9.5 57 kΩ kΩ kΩ 0 18 dB ±0.05 dB VDV = 100mVP-P, VAN= 0.8mVP-P 6 dB VDV = 100mVP-P, VAN = 2mVP-P 16 dB VDV = 100mVP-P, VAN = 1.4mVP-P 12 dB (min) VDV = 100mVP-P, VAN = 2mVP-P 16 dB (min) (See Register Map, Table 7) dB SNR ENHANCEMENT SPECIFICATIONS AGCAV Automatic Gain Control Range ΔAGCAV 0dB Gain Accuracy Minimum setting Maximum setting AGCAV = 0dB, f = 1kHz, VDV = 1V, VAN= 0V fDV = fAN = 300Hz SNRIE Signal-To-Noise Ratio Improvement (Electrical)* fDV = fAN = 1kHz * fDV = Frequency of Downlink signal fAN = Frequency of Ambient Noise signal VDV = Voltage swing of Downlink signal VAN = Voltage swing of Ambient signal 7 www.national.com LMV1099 LMV1099 Symbol LMV1099 I2C Interface Characteristics VDD = 3.3V, 1.8V ≤ I2CVDD ≤ 5.5V (Note 1, Note 2) The following specifications apply for LS and HP VOLUMEGAIN = 0dB LSGAIN = 12B, HPGAIN = 0dB, EPGAIN = 0dB, RL = 8Ω +30μH (Loudspeaker), RL = 32Ω (Headphone), RL = 32Ω (Earpiece), CSET = 0.1µF, ALC disabled, f = 1kHz, unless otherwise specified. Limits apply for TA = 25°C. (Note 7). LMV1099 Symbol Parameter Conditions Typical Limits (Note 7) Units (Limits) t1 SCL Period 2.5 µs (min) t2 SDA Setup Time 250 ns (min) t3 SDA Stable Time 0 ns (min) t4 Start Condition Time 250 ns (min) t5 Stop Condition Time 250 ns (min) t6 SDA Data Hold Time 250 ns (min) VIH VIL Input High Voltage 0.7xI2CVDD V (min) Input Low Voltage 0.3xI2CVDD V (max) Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 3: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 4: Human body model, applicable std. JESD22-A114C. Note 5: Machine model, applicable std. JESD22-A115-A. Note 6: Charge device model, applicable std. JESD22-C101D. Note 7: Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 8: Datasheet min/max specification limits are guaranteed by test or statistical analysis. www.national.com 8 LMV1099 Test Methods 30107635 FIGURE 3. FFNSE, NFSLE, SNRIE Test Circuit two microphones (see Figure 11). In this configuration the speech signal at the microphone closest to the sound source will have greater amplitude than the microphone further away. Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude shift was added to the NFSLE test. The schematic from Figure 3 is used with the following procedure to measure the NFSLE. 1. A 25mVP-P and 17.25mVP-P (0.69*25mVP-P) sine wave is applied to Mic1 and Mic2 respectively. Once again, a signal generator is used to delay the phase of Mic2 by 15.9° for 1Khz, or 4.8° for 300Hz, when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. NFSLE = Y - X dB FAR FIELD NOISE SUPPRESSION (FFNSE) For optimum noise suppression the far field noise should be in a broadside array configuration from the two microphones, see Figure 10. Which means the far field sound source is equidistance from the two microphones. This configuration allows the amplitude of the far field signal to be equal at the two microphone inputs, however a slight phase difference may still exist. To simulate a real world application a slight phase delay was added to the FFNSE test. The block diagram from Figure 3 is used with the following procedure to measure the FFNSE. 1. A sine wave with equal frequency and amplitude (25mVP-P) is applied to Mic1 and Mic2. Using a signal generator, the phase of Mic 2 is delayed by 1.1° for 1kHz, or 0.33° for 300Hz, when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. FFNSE = Y - X dB SINGLE TO NOISE RATIO IMPROVEMENT ELECTRICAL (SNRIE) The SNRIE is the ratio of FFNSE to NFSLE and is defined as: SNRIE = FFNSE - NFSLE NEAR FIELD SPEECH LOSS (NFSLE) For optimum near field speech preservation, the sound source should be in an endfire array configuration from the 9 www.national.com LMV1099 Typical Performance Characteristics Unless otherwise specified, TJ = 25°C, VDD = 3.6V. Uplink Path: Input Voltage = 18mVP-P, f =1 kHz, pass through mode (Note 8), Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pf. Downlink Path: RL = 32Ω, f = 1kHz, SNR Enhancer disabled. THD+N vs Frequency VDD = 3.6V, POUT = 50mW Downlink Path THD+N vs Frequency VDD = 5V, POUT = 150mW Downlink Path 30107660 30107661 THD+N vs Frequency Mic1 = 36mVP-P, Mic2 = AC GND Noise Cancelling Mode, Uplink Path THD+N vs Frequency Mic1 = 36mVP-P, Mic2 = AC GND Noise Cancelling Mode, Uplink Path 30107663 30107662 THD+N vs Frequency Mic1 = 36mV, Pass Through Mode Mic1 Uplink Path THD+N vs Frequency Mic2 = 36mV, Pass Through Mode Mic2 Uplink Path 30107664 www.national.com 30107665 10 LMV1099 THD+N vs Output Power VDD = 3.6V, Downlink Path THD+N vs Output Power VDD = 5V, Downlink Path 30107666 30107667 THD+N vs Input Voltage Mic1 Noise Cancelling Mode Mic2 = AC GND, Uplink Path THD+N vs Input Voltage Mic2 Noise Cancelling Mode Mic1 = AC GND, Uplink Path 30107669 30107668 Output Power vs Power Dissipation VDD = 3.6V, Downlink Path Output Power vs Power Dissipation VDD = 5V, Downlink Path 30107627 30107628 11 www.national.com LMV1099 PSRR vs Frequency VDD = 3.6V, VRIPPLE = 200mVP-P Input Referred, Input = AC Ground Downlink Path PSRR vs Frequency Input Referred, VRIPPLE = 200mVP-P Passthrough Mode, Input = AC Ground Uplink Path 30107632 30107633 PSRR vs Frequency VDD = 5V Input Referred, VRIPPLE = 200mVP-P Input = AC Ground, Downlink Path 30107634 www.national.com 12 UPLINK FAR-FIELD NOISE REDUCTION OVERVIEW The uplink portion of the LMV1099 is a fully analog solution to reduce the far field noise picked up by microphones in a 30107670 FIGURE 4. Simplified Block Diagram of the LMV1099 Uplink path The output signal of the microphones is amplified by a preamplifier with adjustable gain between 12dB and 36dB. The matched signals are then routed through the Analog Noise Cancelling block which suppresses the far-field signal. The output of the analog noise cancelling processor is amplified in the post amplifier with selectable gain, 6dB or 12dB. For optimum noise and EMI immunity, the microphones have a differential connection to the LMV1099 and the uplink output is also differential. The adjustable gain functions can be controlled via I2C. Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling capacitor on the VREF pin determines the noise voltage on this internal reference. This capacitor should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias output. GAIN BALANCE AND GAIN BUDGET In systems where input signals have a high dynamic range, critical noise levels or where the dynamic range of the output voltage is also limited, careful gain balancing is essential for the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels, while too high of a gain setting in the preamplifier will result in saturation of the noise cancelling processor and output stages. The gain ranges and maximum signal levels for the different functional blocks are shown in Figure 5. Two examples are given as a guideline on how to select proper gain settings. POWER SUPPLY CIRCUITS A low drop-out (LDO) voltage regulator in the LMV1099 allows the device to be independent of supply voltage variations. The Power On Reset (POR) circuitry in the LMV1099 requires the supply voltage to rise from 0V to VDD in less than 100ms. The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on the Mic 30107674 FIGURE 5. Maximum Signal Levels 13 www.national.com LMV1099 communication system. A simplified block diagram is provided in Figure 4. Application Data LMV1099 I2C Compatible Interface The LMV1099 is controlled through an I2C compatible serial interface that consists of a serial data line (SDA) and a serial clock (SCL). The clock line is uni-directional. The data line is bi-directional (open-collector) although the LMV1099 does not write to the I2C bus. The LMV1099 and the master can communicate at clock rates up to 400kHz. Figure 5 shows the I2C Interface timing diagram. Data on the SDA line must be stable during the HIGH period of SCL. The LMV1099 is a transmit/receive slave-only device, reliant upon the master to generate the SCL signal. Each transmission sequence is framed by a START condition and a STOP condition (Figure 6). The data line is 8 bits long and is always followed by an acknowledge pulse (Figure 7). Example 1: An application using microphones with 50mVP-P maximum output voltage, and a baseband chip after the LMV1099 with 1.5VP-P maximum input voltage. For optimum noise performance, the gain of the input stage should be set to the maximum. 1. 50mVP-P + 36dB = 3.1VP-P. 2. 3.1VP-P is higher than the maximum 1.5VP-P allowed for the Noise Cancelling Block (NCB). This means a gain lower than 29.5dB should be selected. 3. Select the nearest lower gain from the gain settings shown in Table 6, 28dB is selected. This will prevent the NCB from being overloaded by the microphone. With this setting, the resulting output level of the Pre Amplifier will be 1.26VP-P. 4. The NCB has a gain of 0dB which will result in 1.26VP-P at the output of the LMV1099. This level is less than the maximum level that is allowed at the input of the post amp of the LMV1099. 5. The baseband chip limits the maximum output voltage to 1.5VP-P with the minimum of 6dB post amp gain, this results in requiring a lower level at the input of the post amp of 0.75VP-P. Now calculating this for a maximum preamp gain, the output of the preamp must be no more than 0.75mVP-P. 6. Calculating the new gain for the preamp will result in <23.5dB gain. 7. The nearest lower gain will be 22dB. So using preamp gain = 22dB and postamp gain = 6dB is the optimum for this application. I2C Compatible Interface Power Supply Pin (I2CVDD) The LMV1099 I2C interface is powered up through the I2CVDD pin. The LMV1099 I2C interface operates at a voltage level set by the I2CVDD pin which can be set independent to that of the main power supply pin VDD. This is ideal whenever logic levels for the I2C Interface are dictated by a microcontroller or microprocessor that is operating at a lower supply voltage than the main battery of a portable system. I2C Bus Format The I2C bus format is shown in Figure 7. The START signal, the transition of SDA from HIGH to LOW while SCL is HIGH is generated, alerting all devices on the bus that a device address is being written to the bus. The 7-bit device address is written to the bus, most significant bit (MSB) first followed by the R/W bit, R/W = 0 indicates the master is writing to the slave device, R/W = 1 indicates the master wants to read data from the slave device. Set R/W = 0; the LMV1099 is a WRITEONLY device and will not respond to the R/W = 1. The data is latched in on the rising edge of the clock. Each address bit must be stable while SCL is HIGH. After the last address bit is transmitted, the mater device release SDA, during which time, an acknowledge clock pulse is generated by the slave device. If the LMV1099 receives the correct address, the device pulls the SDA line low, generating an acknowledge bit (ACK) Once the master device registers the ACK bit, the 8-bit register data word is sent. Each data bit should be stable while SCL is HIGH. After the 8-bit register data word is sent, the LMV1099 sends another ACK bit. Following the acknowledgement of the last register data word, the master issues a STOP bit, allowing SDA to go high while SCL is high. Example 2: An application using microphones with 10mVP-P maximum output voltage, and a baseband chip after the LMV1099 with 3.3VP-P maximum input voltage. For optimum noise performance we would like to have the maximum gain at the input stage. 1. 10mVP-P + 36dB = 631mVP-P. 2. This is lower than the maximum 1.5VP-P, so this is OK. 3. The NCB has a gain of 0dB which will result in 1.5VP-P at the output of the LMV1099. This level is lower than the maximum level that is allowed at the input of the Post Amp of the LMV1099. 4. With a Post Amp gain setting of 6dB the output of the Post Amp will be 3VP-P which is OK for the baseband. 5. The nearest lower Post Amp gain will be 6dB. So using preamp gain = 36dB and postamp gain = 6dB is optimum for this application. www.national.com 14 LMV1099 30107671 FIGURE 6. I2C Timing Diagram 30107672 FIGURE 7. I2C Start Stop Conditions 30107673 FIGURE 8. Start and Stop Diagram until an I2C command brings the device out of shutdown (see timing diagram in Figure 9). This pin can be connected to the I2CVDD pin to prevent undefined and unwanted state changes that may occur when the I2C supply voltage is cycled. I2C RESET PIN When the I2C RESET pin is pulled low, the device will go into shutdown and the Power_on bit (see Table 3) in the shutdown control register will reset. The device will remain in shutdown 30107675 FIGURE 9. I2C Reset Timing Diagram 15 www.national.com LMV1099 TABLE 2. Chip Address B7 B6 B5 B4 B3 B2 B1 B0/W 1 1 0 0 1 1 1 0 Chip Address NOTE: The 7th Bit (B7) of the Register Data determines whether it will activate Register A or Register B. TABLE 3. Control Registers Register Name Register Address B<6:5> B<4> B<3> B<2> B<1> B<0> Shutdown control 00 x x enable_ep I2CVDD_sd power_on Mic mode control 01 mic_sel1 mic_sel0 agc_mic_mute mute_mic2 mute_mic1 Mic Gain control 10 mic_post_gain mic_pre_gain3 mic_pre_gain2 mic_pre_gain1 mic_pre_gain0 EP 11 ep_mute plev ep_bypass_agc ep_ri1 ep_ri0 TABLE 4. Shutdown Control Register BIT B2 B1 B0 NAME DESCRIPTION enable_ep I2CVDD_SD power_on 0 Disable earpiece 1 Enable earpiece 0 I2CVDD is an active low RESET input. If I2CVDD drops below 1.1V the device resets and the I2C registers are restored to their default state 1 Normal operation. I2CVDD voltage does not reset the device 0 Device disable 1 Device enable TABLE 5. LMV1099 Microphone Mode Control Register BIT B4:B3 B2 B1 B0 NAME mic_sel<4> mic_sel<3> DESCRIPTION B4 B3 0 0 Noise canceling mode 0 1 Only mic1 enabled (pass through) 1 0 Only mic2 enabled (pass through) 1 1 (mic1+mic2)/2 agc_mic_mute mute_mic2* mute_mic1* 0 mic1 & mic2 mute not allowed 1 mic1 & mic2 mute allowed 0 mic2 on 1 mic2 mute 0 mic1 on 1 mic1 mute * agc_mic_mute overrides mute_mic1 and mute_mic2 www.national.com 16 LMV1099 TABLE 6. LMV1099 Microphone Gain Control Register BIT NAME B4 mic_post_gain B3:B0 mic_pre_gain<3> mic_pre_gain<2> mic_pre_gain<1> mic_pre_gain<0> DESCRIPTION 0 6dB 1 12dB B3 B2 B1 B0 0 0 0 0 12dB 0 0 0 1 12dB 0 0 1 0 12dB 0 0 1 1 12dB 0 1 0 0 14dB 0 1 0 1 16dB 0 1 1 0 18dB 0 1 1 1 20dB 1 0 0 0 22dB 1 0 0 1 24dB 1 0 1 0 26dB 1 0 1 1 28dB 1 1 0 0 30dB 1 1 0 1 32dB 1 1 1 0 34dB 1 1 1 1 36dB TABLE 7. LMV1099 Earpiece Control Register BIT B4 NAME DESCRIPTION ep_mute 0 EP on 1 EP mute 3.6VP-P Earpiece Output Level 0 B3 (50mW with 32Ω load) plev 4.1VP-P Earpiece Output Level 1 B2 B1:B0 ep_bypass_agc ep_ri<1> ep_ri<0> (70mW with 32Ω load) 0 Normal operation 1 Downlink SNR Enhancer Circuit bypassed (earpiece is still active) B1 B0 0 0 60kΩ input impedance 0 1 9kΩ input impedance 1 0 6kΩ input impedance 1 1 6kΩ input impedance 17 www.national.com LMV1099 a low leakage rating. Electrolytic capacitors should not be used. The SNR enhancing circuit will analyze the various energy levels for different frequency ranges and weight the AGC’s gain change accordingly such that the downlink voice will remain intelligent. The overall intent of the circuit is for the gain changes to be transparent. Great care has gone into ensuring that gain changes won’t be too perceptible or obnoxious. The system with have more dynamic gain change capability at low ambient noise levels in order to respond to fast changing noise sources. At the other extreme the system will have less dynamic gain change at high ambient noise levels since the environment will constantly be affecting intelligibility. Shutdown Function As part of the Powerwise™ family, the LMV1099 consumes only 0.50mA of current. In many applications the part does not need to be continuously operational. To further reduce the power consumption in the inactive period, the LMV1099 provides two individual microphone power down functions (controlled through the mode control registers B3:B4). When either one of the shutdown functions is activated the part will go into shutdown mode consuming only a few μA of supply current. Shutdown functions can be controlled via the I2C interface or a hardware pin. SHUTDOWN VIA HARDWARE PIN The hardware shutdown function is operated via the EN pin. In normal operation the EN pin must be at a ‘high’ level (VDD). Whenever a ‘low’ level (GND) is applied to the EN pin the part will go into shutdown mode disabling all internal circuits. Earpiece Control Registers OUTPUT POWER LIMIT (PLEV) While National has done extensive ambient SPL analysis, there will always be unusual circumstances that may cause the amplifier to be at its maximum 18dB setting. LMV1099 features an Output Voltage Limit function to limit the output power delivered to a speaker. When the SNR enhancer is active, the Output Voltage Limit works to protect the loudspeaker in conditions where a large downlink input signal is present. The Output Voltage Limit can be set to a selectable (3.6VP-P or 4.1VP-P) output level to avoid violating the maximum power limitation of the transducer. Microphone Mode Control The LMV1099 features four Microphone modes, Noise Cancellation Mode, Mic 1 pass through, Mic 2 pass through, and (Mic1+Mic2)/2. When in Noise Cancellation mode, it is imperative that Mic 1 and Mic 2 are NOT muted. If the mute function for either microphone path is enabled, the noise cancellation circuitry will be disabled. In mic1/mic2 pass through mode the noise canceling block is bypassed, and the LMV1099 is simply used as a microphone amplifier where the microphone signal passes through the pre and post amplifier gain stages. The last mode provides an average of the two microphone pass through signals (noise cancelling block is bypassed). The microphone input paths can be muted individually via I2C (Mic mode control register B1:B0). To enable the mute function, set bit B2 of the microphone mode control register to 1. If B2 is set to 0, the mute function will not activate. SNR ENHANCER BYPASS (EP_BYPASS_AGC) The SNR enhancer can be bypassed by setting B4 of the Earpiece Control Register to 1. When the SNR enhancer is bypassed, the earpiece amplifier has a fixed 0dB gain. EP_RI (INPUT IMPEDANCE) The earpiece input of the LMV1099 features three input impedance options, this impedance in conjunction with the input capacitor creates a high-pass filter. The three options provide various cutoff frequencies for the high-pass filter. Table 8 shows the respective cutoff frequencies for each of the input impedance options when using a 68nF input capacitor. Signal-to-Noise Ratio Enhancer (SNR Enhancer) TABLE 8. Input Impedance options The SNR Enhancer in the LMV1099 is designed to provide excellent voice intelligibility in noisy environments. The control signal for the output gain adjustment is dependent on both the level and the type of ambient noise, compared with the signal energy of the downlink voice. The system was designed to operate transparently to the user, such that the gain changes are not evident but provide excellent voice intelligibility. National has invested considerable amount of time evaluating the acoustic effects of different ambient noise source types along with their practical SPL levels to determine optimum timing capacitor values for the proprietary downlink solution. These timing capacitor values should not be changed. We recommend using standard ceramic chip type capacitors with www.national.com Input Impedance fC 60kΩ 40Hz 9kΩ 260Hz 6kΩ 390Hz Changing the input coupling capacitor will affect the filters – 3dB point through the simple RC equation shown below: f = 1 / 2πRC 18 Because the LMV1099 is a microphone array Far Field Noise Reduction solution, proper microphone placement is critical for optimum performance. Two things need to be considered: The spacing between the two microphones and the position of the two microphones relative to near field source. If the spacing between the two microphones is too small near field speech will be canceled along with the far field noise. Conversely, if the spacing between the two microphones is 30107679 FIGURE 10. Broadside Array (WRONG) 30107676 FIGURE 11. Endfire Array (CORRECT) 19 www.national.com LMV1099 large, the far field noise reduction performance will be degraded. The optimum spacing between mic1 and mic2 is 1.5-2.5cm. This range provides a balance of minimal near field speech loss and maximum far field noise reduction. The microphones should be in line with the desired sound source 'near speech' and configured in an endfire array (see Figure 11) orientation from the sound source. If the 'near speech' (desired sound source) is equidistant to the source like a broadside array (see Figure 10) the result will be a great deal of near field speech loss. Microphone Placement LMV1099 TABLE 9. Low-Pass Filter Capacitor For 2kHz Low-Pass Filter At The Output At the output of the LMV1099 there is a provision to create a 1st order low-pass filter (only enabled in 'Noise Cancelling' mode). This low-pass filter can be used to compensate for the change in frequency response that results from the noise cancellation process. The change in frequency response resembles a first-order high-pass filter, and for many of the applications it can be compensated by a first-order low-pass filter with cutoff frequency between 1.5kHz and 2.5kHz. The transfer function of the low-pass filter is derived as: Post Amplifier Gain Setting (dB) Rf (kΩ) Cf (nF) 6 20 3.9 12 40 2.0 A-Weighted Filter The human ear is sensitive for acoustic signals within a frequency range from about 20Hz to 20kHz. Within this range the sensitivity of the human ear is not equal for each frequency. To approach the hearing response, weighting filters are introduced. One of those filters is the A-weighted filter. The A-weighted filter is used in signal to noise measurements, where the wanted audio signal is compared to device noise and distortion. The use of this filter improves the correlation of the measured values to the way these ratios are perceived by the human ear. This low-pass filter is created by connecting a capacitor between the LPF pin and the OUT pin of the LMV1099. The value of this capacitor also depends on the selected output gain. For different gains the feedback resistance in the lowpass filter network changes as shown in . This will result in the following values for a cutoff frequency of 2000 Hz: 30107629 FIGURE 12. A-Weighted Filter www.national.com 20 The overall noise of the LMV1099 is measured within the frequency band from 10Hz to 22kHz using an A-weighted filter. 30107680 FIGURE 13. Noise Measurement Setup For the signal to noise ratio (SNR) the signal level at the output is measured with a 1kHz input signal of 18mVP-P using an A-weighted filter. This voltage represents the output voltage of a typical electret condenser microphone at a sound pressure level of 94dB SPL, which is the standard level for these measurements. The LMV1099 is programmed for 26dB of to- tal gain (20dB preamplifier and 6dB postamplifier) with only mic1 or mic2 used. (See also I2C Compatible Interface). The input signal is applied differentially between the Mic+ and Mic-. Because the part is in Pass Through mode the low-pass filter at the output of the LMV1099 is disabled. 21 www.national.com LMV1099 The Mic+ and Mic- inputs of the LMV1099 are AC shorted between the input capacitors, see Figure 13. Measuring Uplink Noise and SNR LMV1099 Revision History Rev Date 1.0 08/12/10 Initial release. 1.01 12/10/10 Added the X1, X2, and X3 values of the mktg outline. 1.02 03/30/11 Edited Table 3 (Control Registers). www.national.com Description 22 LMV1099 Physical Dimensions inches (millimeters) unless otherwise noted 25 Bump micro SMD Technology NS Package Number TLA25GMA X1 = 2.644±0.030mm, X2 = 2.771±0.030mm, X3 = 0.600±0.075mm, 23 www.national.com LMV1099 Uplink Far Field Noise Suppression & Downlink SNR Enhancing Microphone Amplifier with Earpiece Driver Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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