FUNCTIONAL BLOCK DIAGRAMS FEATURES ADM6711 VCC VREF MR RESET GND DEBOUNCE Figure 1. ADM6713 VCC RESET GENERATOR 240ms VREF APPLICATIONS Microprocessor systems Computers Controllers Intelligent instruments Automotive systems RESET GENERATOR 240ms 03754-011 Specified over temperature Low power consumption (12 μA) Precision monitoring of 2.5 V, 3 V, 3.3 V, and 5 V power supply voltages Reset timeout period of 140 ms (minimum) Manual reset input Output stages Push-pull RESET output (ADM6711) Open-drain RESET output (ADM6713) Reset assertion down to 1 V VCC Power supply glitch immunity 4-lead SC70 package MR RESET GND DEBOUNCE 03754-001 Data Sheet Microprocessor Supervisory Circuit in 4-Lead SC70 ADM6711/ADM6713 Figure 2. GENERAL DESCRIPTION With six different reset threshold options available ranging from 2.32 V to 4.63 V, the ADM6711/ADM6713 are suitable for monitoring 2.5 V, 3 V, 3.3 V, and 5 V supplies. A reset timeout of at least 140 ms occurs when VCC rises above the threshold. This gives the supply voltage time to stabilize before the microprocessor starts up. The ADM6711 has a push-pull output, so no additional external components are needed. The ADM6713 open-drain output requires an external pull-up resistor that can be connected to a voltage higher than VCC, if desired. The parts are highly reliable with accurate voltage references and immunity to fast, negative-going transients on VCC. Low current consumption and space-efficient, 4-lead SC70 packaging make the ADM6711/ADM6713 ideal for use in low power portable applications. VCC MR VCC *RPULL-UP MICROPROCESSOR SYSTEM ADM6711/ ADM6713 RESET RESET GND GND *ADM6713 ONLY 03754-002 The ADM6711/ADM6713 are reset generator circuits suitable for use in microprocessor-based systems. They provide a reset signal on power-up, power-down, and whenever the supply voltage falls below a preset threshold. In addition, both parts have a debounced manual reset input so that a reset signal can also be initiated with an external switch or logic signal. Figure 3. Typical Operating Circuit Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006–2011 Analog Devices, Inc. All rights reserved. ADM6711/ADM6713 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications....................................................................................... 1 Circuit Description............................................................................8 Functional Block Diagrams............................................................. 1 Manual Reset Input .......................................................................8 General Description ......................................................................... 1 Power Supply Glitch Immunity ...................................................8 Revision History ............................................................................... 2 ADM6713 RESET Output Logic Levels .....................................8 Specifications..................................................................................... 3 Ensuring a Valid RESET Output Down To VCC = 0 V ............8 Absolute Maximum Ratings............................................................ 5 Outline Dimensions ..........................................................................9 ESD Caution.................................................................................. 5 Ordering Guide .............................................................................9 Pin Configuration and Function Descriptions............................. 6 REVISION HISTORY 9/11—Rev. A to Rev. B Changes to Input Threshold Parameter, Table 1 .......................... 4 Updated Outline Dimensions ......................................................... 9 12/06—Rev. 0 to Rev. A Updated Format..................................................................Universal Changes to Specifications Table...................................................... 3 Changes to Figure 10........................................................................ 8 Changes to Ordering Guide ............................................................ 9 8/03—Revision 0: Initial Version Rev. B | Page 2 of 12 Data Sheet ADM6711/ADM6713 SPECIFICATIONS VCC = full operating range; TA = TMIN to TMAX; VCC typ = 5 V for L/M models, 3.3 V for T/S models, 3 V for R models, and 2.5 V for Z models, unless otherwise noted. Table 1. Parameter SUPPLY VCC Operating Voltage Range Min Typ Max Unit Test Conditions/Comments 16 5.5 5.5 35 V V μA 12 30 μA 60 μA 60 μA TA = 0°C to 70°C TA = −40°C to +125°C VCC < 5.5 V, ADM671_L/M, TA = −40°C to +85°C VCC < 3.6 V, ADM671_R/S/T/Z, TA = −40°C to +85°C VCC < 5.5 V, ADM671_L/M, TA = 85°C to 125°C VCC < 3.6 V, ADM671_R/S/T/Z, TA = 85°C to 125°C 4.70 4.75 4.82 4.45 4.50 4.56 3.11 3.15 3.21 2.96 3.00 3.05 2.66 2.70 2.74 2.35 2.38 2.42 V V V V V V V V V V V V V V V V V V ppm/°C μs TA = 25°C TA = −40°C to +85°C TA = 85°C to 125°C TA = 25°C TA = −40°C to +85°C TA = 85°C to 125°C TA = 25°C TA = −40°C to +85°C TA = 85°C to 125°C TA = 25°C TA = −40°C to +85°C TA = 85°C to 125°C TA = 25°C TA = −40°C to +85°C TA = 85°C to 125°C TA = 25°C TA = −40°C to +85°C TA = 85°C to 125°C 460 640 ms ms TA = −40°C to +85°C TA = 85°C to 125°C 0.3 V 0.4 V 0.3 0.8 VCC V V 0.8 VCC V VCC = VTH min, ISINK = 1.2 mA, ADM671_R/S/T/Z VCC = VTH min, ISINK = 3.2 mA, ADM671_L/M VCC >1.0 V, ISINK = 50 μA VCC > VTH max, ISOURCE = 500 μA, ADM6711R/S/T/Z VCC > VTH max, ISOURCE = 800 μA, ADM6711L/M 1.0 1.2 Supply Current RESET VOLTAGE THRESHOLD ADM671_L ADM671_M ADM671_T ADM671_S ADM671_R ADM671_Z 4.56 4.50 4.44 4.31 4.25 4.20 3.04 3.00 2.95 2.89 2.85 2.81 2.59 2.55 2.52 2.28 2.25 2.22 RESET THRESHOLD TEMPERATURE COEFFICIENT VCC to RESET DELAY RESET ACTIVE TIMEOUT PERIOD 4.63 4.38 3.08 2.93 2.63 2.32 30 20 140 100 240 VCC = VTH to (VTH − 100 mV) RESET OUTPUT VOLTAGE Low (ADM6711/ADM6713) High (ADM6711) Rev. B | Page 3 of 12 ADM6711/ADM6713 Parameter RESET OPEN-DRAIN OUTPUT LEAKAGE CURRENT Data Sheet Min Typ MANUAL RESET (MR) Input Threshold Pull-Up Resistance Minimum Pulse width Glitch Immunity Reset Delay 0.7 VCC 10 1 20 100 200 Rev. B | Page 4 of 12 Max 1 Unit μA Test Conditions/Comments VCC > VTH, RESET deasserted 0.3 VCC V V kΩ μs ns ns VIL VIH Data Sheet ADM6711/ADM6713 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. RESET Threshold Options Table 2. Model RESET Threshold (V) Parameter VCC RESET (Push-Pull) RESET (Open-Drain) MR Input Current VCC, MR Output Current RESET Rate of Rise, VCC θJA Thermal Impedance, SC70 Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec) ADM671_L ADM671_M ADM671_T ADM671_S ADM671_R ADM671_Z 4.63 4.38 3.08 2.93 2.63 2.32 Rating −0.3 V to +6 V −0.3 V to (VCC + 0.3 V) −0.3 V to +6 V −0.3 V to (VCC + 0.3 V) 20 mA ESD CAUTION 20 mA 100 V/μs 146°C/W −40°C to +125°C −65°C to +150°C 300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. B | Page 5 of 12 ADM6711/ADM6713 Data Sheet GND 1 ADM6711/ ADM6713 4 VCC 3 MR TOP VIEW (Not to Scale) RESET 2 03754-003 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 Mnemonic GND RESET 3 MR 4 VCC Description Ground Reference for All Signals (0 V). Active Low Logic Input. RESET remains low while VCC is below the reset threshold and remains low for 240 ms (typical) after VCC rises above the reset threshold. Manual Reset. This active low debounced input ignores input pulses of 100 ns (typical) and is guaranteed to accept input pulses greater than 1 μs. Leave floating when not used. Supply Voltage Being Monitored. Rev. B | Page 6 of 12 Data Sheet ADM6711/ADM6713 TYPICAL PERFORMANCE CHARACTERISTICS 12 1.007 1.006 IDD @ VCC = 3V 6 4 0 –40 –20 0 20 30 50 03754-004 IDD @ VCC = 1V 2 70 85 100 1.005 1.004 1.003 1.002 1.001 1.000 0.999 0.998 0.997 03754-008 IDD (µA) 8 NORMALIZED RESET THRESHOLD IDD @ VCC = 5.5V 10 0.996 0.995 –40 120 –20 0 20 Figure 5. Supply Current vs. Temperature 600 500 VOD = 20mV 300 200 VOD = 200mV 0 –40 –20 0 03754-005 100 VOD = 125mV 20 30 50 70 85 100 100 120 800 700 600 500 VOD = 20mV 300 200 03754-006 VOD = 125mV 30 50 70 250 200 ADM671_L/M 150 100 ADM671_R/S/T/Z 50 0 10 100 1000 Figure 9. Maximum Transient Duration (Without Causing a RESET Pulse) vs. RESET Comparator Overdrive 900 20 300 RESET COMPARATOR OVERDRIVE, VTH – VCC (mV) Figure 6. Power-Down RESET Delay vs. Temperature: ADM671_R/ ADM671_S/ADM671_T/ADM671_Z VOD = 200mV 0 –40 –20 0 350 0 120 TEMPERATURE (°C) POWER-DOWN RESET DELAY (µs) 85 03754-009 700 MAXIMUM TRANSIENT DURATION (µs) POWER-DOWN RESET DELAY (µs) 800 100 70 400 900 400 50 Figure 8. RESET Threshold Deviation vs. Temperature 1000 400 30 TEMPERATURE (°C) TEMPERATURE (°C) 85 100 120 TEMPERATURE (°C) Figure 7. Power-Down RESET Delay vs. Temperature: ADM671_L/ ADM671_M Rev. B | Page 7 of 12 ADM6711/ADM6713 Data Sheet CIRCUIT DESCRIPTION MANUAL RESET INPUT The ADM6711/ADM6713 manual reset (MR) input allows the system operator to reset a system by means of an external manual switch. Alternatively, a logic signal from another digital circuit can be used to trigger a reset via the MR input. The ADM6713 open-drain RESET output is designed for use with an external pull-up resistor. This resistor can be tied to VCC or any other reasonable voltage level, offering the flexibility to use the ADM6713 to drive a variety of different logic level circuitry. ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0 V When VCC falls below 0.8 V, the ADM6711/ADM6713 RESET output no longer sinks current, and a high impedance CMOS logic input connected to RESET may drift to undetermined logic levels. To eliminate this problem, a pull-down resistor is connected from RESET to ground. A 100 kΩ resistor is large enough not to load RESET and small enough to pull RESET to ground. VCC The MR input ignores negative-going pulses faster than 100 ns (typical) and is guaranteed to accept any negative-going input pulse of a duration greater than or equal to 1 μs. The RESET output remains low while MR is held low and for 240 ms (typical) after MR returns high. If MR is connected to long cables or is used in a noisy environment, then placing a 0.1 μF capacitor between the MR input and ground helps to remove any fast, negative-going transients. VCC ADM6711 RESET 100kΩ GND ADM6711 VCC POWER SUPPLY GLITCH IMMUNITY RESET GENERATOR 240ms VREF The ADM6711/ADM6713 contain internal filtering circuitry that provides immunity to fast transient glitches on the power supply line. Figure 9 illustrates glitch immunity performance by showing the maximum transient duration without causing a reset pulse for glitches with amplitudes in the range of 1 mV to 1000 mV. Glitch immunity makes the ADM6711/ADM6713 suitable for use in noisy environments. Mounting a 0.1 μF decoupling capacitor as close as possible to the VCC pin improves glitch immunity further. Rev. B | Page 8 of 12 MR DEBOUNCE RESET GND Figure 10. Ensuring a Valid RESET Output Down to VCC = 0 V 03754-011 When the ADM6711/ADM6713 are powered up, the RESET output remains low for a period equal to the typical reset active timeout period. This is designed to give the system time to power up correctly and for the power supply to stabilize before any devices are brought out of reset and allowed to begin executing instructions. Initializing a system in this way provides a more reliable startup for microprocessor systems. ADM6713 RESET OUTPUT LOGIC LEVELS 03754-010 The ADM6711/ADM6713 are designed to protect the integrity of a system’s operation by ensuring the proper operation of the system during power-up, power-down, and brownout conditions. Data Sheet ADM6711/ADM6713 OUTLINE DIMENSIONS 2.20 1.80 4 1 0.65 BSC 3 2.40 1.80 2 0.50 BSC 0.40 0.10 1.10 0.80 1.00 0.80 0.10 MAX COPLANARITY 0.10 0.30 0.15 *0.70 0.50 SEATING PLANE 0.18 0.10 0.30 0.10 072809-A 1.35 1.15 *PACKAGE OUTLINE CORRESPONDS IN FULL TO EIAJ SC82 EXCEPT FOR WIDTH OF PIN 2 AS SHOWN. Figure 11. 4-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-4) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADM6711LAKS-REEL ADM6711LAKSZ-REEL ADM6711LAKSZ-REEL7 ADM6711MAKS-REEL ADM6711MAKS-REEL7 ADM6711MAKSZ-REEL7 ADM6711TAKS-REEL ADM6711TAKSZ-REEL ADM6711TAKS-REEL7 ADM6711TAKSZ-REEL7 ADM6711SAKS-REEL ADM6711SAKSZ-REEL ADM6711SAKS-REEL7 ADM6711SAKSZ-REEL7 ADM6711RAKS-REEL ADM6711RAKSZ-REEL ADM6711RAKS-REEL7 ADM6711RAKSZ-REEL7 ADM6711ZAKS-REEL ADM6711ZAKSZ-REEL ADM6711ZAKS-REEL7 ADM6711ZAKSZ-REEL7 ADM6713LAKS-REEL ADM6713LAKSZ-REEL ADM6713LAKSZ-REEL7 ADM6713MAKS-REEL ADM6713MAKS-REEL7 ADM6713MAKSZ-REEL7 ADM6713TAKS-REEL RESET Threshold (V) 4.63 4.63 4.63 4.38 4.38 4.38 3.08 3.08 3.08 3.08 2.93 2.93 2.93 2.93 2.63 2.63 2.63 2.63 2.32 2.32 2.32 2.32 4.63 4.63 4.63 4.38 4.38 4.38 3.08 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 Rev. B | Page 9 of 12 Package Option KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 Ordering Quantity (k) 10 10 3 10 3 3 10 10 3 3 10 10 3 3 10 10 3 3 10 10 3 3 10 10 3 10 3 3 10 Branding M0B M4U M4U M0C M0C M86 M0D M4A M0D M4A M0E M4B M0E M4B M0F M5F M0F M5F M0G M4H M0G M4H M0H M87 M87 M0J M0J M88 M0K ADM6711/ADM6713 Model 1 ADM6713TAKS-REEL7 ADM6713TAKSZ-REEL7 ADM6713SAKS-REEL ADM6713SAKSZ-REEL ADM6713SAKS-REEL7 ADM6713SAKSZ-REEL7 ADM6713RAKS-REEL ADM6713RAKSZ-REEL ADM6713RAKS-REEL7 ADM6713RAKSZ-REEL7 ADM6713ZAKS-REEL ADM6713ZAKSZ-REEL ADM6713ZAKS-REEL7 ADM6713ZAKSZ-REEL7 1 RESET Threshold (V) 3.08 3.08 2.93 2.93 2.93 2.93 2.63 2.63 2.63 2.63 2.32 2.32 2.32 2.32 Data Sheet Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 4-Lead SC70 Z = RoHS Compliant Part. Rev. B | Page 10 of 12 Package Option KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 KS-4 Ordering Quantity (k) 3 3 10 10 3 3 10 10 3 3 10 10 3 3 Branding M0K M89 M0L M57 M0L M57 M0M M4S M0M M4S M0N M4R M0N M4R Data Sheet ADM6711/ADM6713 NOTES Rev. B | Page 11 of 12 ADM6711/ADM6713 Data Sheet NOTES ©2006–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03754-0-9/11(B) Rev. B | Page 12 of 12