Micrel MIC4425BN Dual 3a-peak low-side mosfet driver bipolar/cmos/dmos process Datasheet

MIC4423/4424/4425
Micrel
MIC4423/4424/4425
Dual 3A-Peak Low-Side MOSFET Driver
Bipolar/CMOS/DMOS Process
General Description
Features
The MIC4423/4424/4425 family are highly reliable BiCMOS/
DMOS buffer/driver/MOSFET drivers. They are higher output
current versions of the MIC4426/4427/4428, which are
improved versions of the MIC426/427/428. All three families
are pin-compatible. The MIC4423/4424/4425 drivers are
capable of giving reliable service in more demanding electrical
environments than their predecessors. They will not latch
under any conditions within their power and voltage ratings.
They can survive up to 5V of noise spiking, of either polarity,
on the ground pin. They can accept, without either damage or
logic upset, up to half an amp of reverse current (either
polarity) forced back into their outputs.
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The MIC4423/4424/4425 series drivers are easier to use,
more flexible in operation, and more forgiving than other
CMOS or bipolar drivers currently available. Their BiCMOS/
DMOS construction dissipates minimum power and provides
rail-to-rail voltage swings.
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Reliable, low-power bipolar/CMOS/DMOS construction
Latch-up protected to >500mA reverse current
Logic input withstands swing to –5V
High 3A-peak output current
Wide 4.5V to 18V operating range
Drives 1800pF capacitance in 25ns
Short <40ns typical delay time
Delay times consistent with in supply voltage change
Matched rise and fall times
TTL logic input independent of supply voltage
Low equivalent 6pF input capacitance
Low supply current
3.5mA with logic-1 input
350µA with logic-0 input
Low 3.5Ω typical output impedance
Output voltage swings within 25mV of ground or VS.
‘426/7/8-, ‘1426/7/8-, ‘4426/7/8-compatible pinout
Inverting, noninverting, and differential configurations
Primarily intended for driving power MOSFETs, the MIC4423/
4424/4425 drivers are suitable for driving other loads
(capacitive, resistive, or inductive) which require lowimpedance, high peak currents, and fast switching times.
Heavily loaded clock lines, coaxial cables, or piezoelectric
transducers are some examples. The only known limitation on
loading is that total power dissipated in the driver must be kept
within the maximum power dissipation limits of the package.
Functional Diagram
VS
0.6mA
Integrated Component Count:
4 Resistors
4 Capacitors
52 Transistors
INVERTING
0.1mA
OUTA
INA
2kΩ
NONINVERTING
0.6mA
INVERTING
0.1mA
OUTB
INB
2kΩ
NONINVERTING
GND
Ground Unused Inputs
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
January 1999
1
MIC4423/4424/4425
MIC4423/4424/4425
Micrel
Ordering Information
Part Number
Temperature Range
Package
Configuration
MIC4423CWM
MIC4423BWM
0°C to +70°C
–40°C to +85°C
16-Pin Wide SOIC
Dual Inverting
MIC4423BM
–40°C to +85°C
8-Pin SOIC
Dual Inverting
MIC4423CN
MIC4423BN
0°C to +70°C
–40°C to +85°C
8-Pin Plastic DIP
Dual Inverting
MIC4424CWM
MIC4424BWM
0°C to +70°C
–40°C to +85°C
16-Pin Wide SOIC
Dual Non-Inverting
MIC4424BM
–40°C to +85°C
8-Pin SOIC
Dual Non-Inverting
MIC4424CN
MIC4424BN
0°C to +70°C
–40°C to +85°C
8-Pin Plastic DIP
Dual Non-Inverting
MIC4425CWM
MIC4425BWM
0°C to +70°C
–40°C to +85°C
16-Pin Wide SOIC
Inverting + Non Inverting
MIC4425BM
–40°C to +85°C
8-Pin SOIC
Inverting + Non Inverting
MIC4425CN
MIC4425BN
0°C to +70°C
–40°C to +85°C
8-Pin Plastic DIP
Inverting + Non Inverting
Pin Configuration
Driver Configuration
MIC4423xN/M
NC 1
MIC4423xWM
NC
8
14 OUTA
INA 2
INA 2
7
OUTA
GND 3
6
VS
INB 4
5
OUTB
8-pin DIP (N)
8-pin SOIC (M)
WM Package Note:
Duplicate GND, VS,
OUTA, and OUTB pins
must be externally
connected together.
A
7 OUTA
INA 2
A
15 OUTA
10 OUTB
INB 4
B
5 OUTB
INB 7
B
11 OUTB
MIC4424xN/M
MIC4424xWM
14 OUTA
INA 2
NC 1
16 NC
INA 2
15 OUTA
NC 3
14 OUTA
GND 4
13 VS
GND 5
12 VS
A
7 OUTA
11 OUTB
INB 7
10 OUTB
10 OUTB
INB 4
B
5 OUTB
INB 7
B
11 OUTB
MIC4425xWM
14 OUTA
INA 2
A
7 OUTA
INA 2
A
15 OUTA
10 OUTB
9 NC
NC 8
A
15 OUTA
MIC4425xN/M
NC 6
INA 2
INB 4
B
5 OUTB
INB 7
B
11 OUTB
16-lead Wide SOIC (WM)
Pin Description
Pin Number
DIP, SOIC
Pin Number
Wide SOIC
Pin Name
Pin Function
2/4
2/7
INA/B
Control Input
3
4, 5
GND
Ground: Duplicate pins must be externally connected together.
6
12, 13
VS
7/5
14, 15 / 10, 11
OUTA/B
1, 8
1, 3, 6, 8, 9, 16
NC
MIC4423/4424/4425
Supply Input: Duplicate pins must be externally connected together.
Output: Duplicate pins must be externally connected together.
not connected
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MIC4423/4424/4425
Micrel
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
Supply Voltage ........................................................... +22V
Input Voltage ................................. VS + 0.3V to GND – 5V
Junction Temperature .............................................. 150°C
Storage Temperature Range .................... –65°C to 150°C
Lead Temperature (10 sec.) ..................................... 300°C
ESD Susceptability, Note 3 ...................................... 1000V
Supply Voltage (VS) .................................... +4.5V to +18V
Temperature Range
C Version .................................................. 0°C to +70°C
B Version ............................................... –40°C to +85°C
Package Thermal Resistance
DIP θJA ............................................................. 130°C/W
DIP θJC ............................................................... 42°C/W
Wide-SOIC θJA ................................................. 120°C/W
Wide-SOIC θJC ................................................... 75°C/W
SOIC θJA .......................................................... 120°C/W
SOIC θJC ............................................................ 75°C/W
MIC4423/4424/4425 Electrical Characteristics
4.5V ≤ VS ≤ 18V; TA = 25°C, bold values indicate –40°C ≤ TA ≤ +85°C; unless noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Input
VIH
Logic 1 Input Voltage
VIL
Logic 0 Input Voltage
IIN
Input Current
2.4
0V ≤ VIN ≤ VS
V
–1
–10
0.8
V
1
10
µA
µA
Output
VOH
High Output Voltage
VOL
Low Output Voltage
RO
Output Resistance HI State
Output Resistance LO State
IPK
Peak Output Current
I
Latch-Up Protection
Withstand Reverse Current
VS–0.025
V
0.025
V
IOUT = 10mA, VS = 18V
2.8
5
Ω
VIN = 0.8V, IOUT = 10mA, VS = 18V
3.7
8
Ω
IOUT = 10mA, VS = 18V
3.5
5
Ω
VIN = 2.4V, IOUT = 10mA, VS = 18V
4.3
8
Ω
3
A
>500
mA
Switching Time (Note 4)
tR
Rise Time
test Figure 1, CL = 1800pF
23
28
35
60
ns
ns
tF
Fall Time
test Figure 1, CL = 1800pF
25
32
35
60
ns
ns
tD1
Delay Tlme
test Ffigure 1, CL = 1800pF
33
32
75
100
ns
ns
tD2
Delay Time
test Figure 1, CL = 1800pF
38
38
75
100
ns
ns
IS
Power Supply Current
VIN = 3.0V (both inputs)
1.5
2
2.5
3.5
mA
mA
IS
Power Supply Current
VIN = 0.0V (both inputs)
0.15
0.2
0.25
0.3
mA
mA
Power Supply
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive. Handling precautions recommended. ESD tested to human body model, 1.5k in series with 100pF.
Note 4.
Switching times guaranteed by design.
January 1999
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MIC4423/4424/4425
MIC4423/4424/4425
Micrel
Test Circuit
VS = 18V
VS = 18V
0.1µF
0.1µF
OUTA
A
INA
4.7µF
OUTA
A
INA
1800pF
1800pF
MIC4423
MIC4424
B
INB
OUTB
B
INB
OUTB
1800pF
INPUT
5V
90%
VS
90%
1800pF
2.5V
tPW ≥ 0.5µs
10%
0V
tD1
tPW
tF
tD2
INPUT
5V
90%
2.5V
tPW ≥ 0.5µs
10%
0V
tR
VS
90%
tD1
tPW
tR
tD2
tF
OUTPUT
OUTPUT
10%
0V
10%
0V
Figure 1a. Inverting Driver Switching Time
MIC4423/4424/4425
4.7µF
Figure 1b. Noninverting Driver Switching Time
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MIC4423/4424/4425
Micrel
Typical Characteristic Curves
Rise Time vs.
Supply Voltage
100
Fall Time vs.
Supply Voltage
100
4700pF
80
80
1000pF
2200pF
40
20
3300pF
60
20
10 12 14
VSUPPLY (V)
0
18
TIME (ns)
40
90
80
70
70
60
500kHz
20kHz
100kHz
20
10
100
90
1000
CLOAD (pF)
Supply Current
vs. Frequency
ISUPPLY (mA)
80
60
30
1000pF
100pF
3300pF
20
TD1
Supply Current
vs. Frequency
0
100
VSUPPLY = 18V
90
1000pF
3300pF
40
100pF
30
Supply Current vs.
Capacitive Load
90
80
70
70
60
2MHz
40
500kHz
40
30
10
January 1999
5
20kHz
100kHz
1000
CLOAD (pF)
0
10
10000
Supply Current
vs. Frequency
VSUPPLY = 5V
10000pF
4700pF
50
20
10000
500kHz
60
10
1000
CLOAD (pF)
2MHz
30
80
0
100
VSUPPLY = 12V
100
VSUPPLY = 5V
12
Supply Current vs.
Capacitive Load
0
100
1000
10
40
10
100kHz
6
8
INPUT (V)
50
10
30
4
60
20
50
2
70
20
100
FREQUENCY (kHz)
0
80
10000pF
10
1000
VS = 18V
CLOAD = 1800pF
TD2
20
100
FREQUENCY (kHz)
10000
Propagation Delay vs.
Input Amplitude
30
20
0
10
1000
CLOAD (pF)
10
50
90
10000pF
70
40
18V
40
60
100
VSUPPLY = 12V
50
40
50
TF
0
10
10000
ISUPPLY (mA)
0
100
Rise and Fall Time
vs. Temperature
TR
80
30
12V
0
100
18
20
100
VSUPPLY = 18V
40
16
0
-75
-30
15
60
105 150
JUNCTION TEMPERATURE (˚C)
10000
Supply Current vs.
Capacitive Load
50
10 12 14
VSUPPLY (V)
10
18V
1000
CLOAD (pF)
8
30
12V
20
6
VS = 18V
CLOAD = 1800pF
5V
60
4
40
ISUPPLY (mA)
TFALL (ns)
80
ISUPPLY (mA)
16
T (ns)
8
Fall Time vs.
Capacitive Load
0
100
60
20
ISUPPLY (mA)
6
5V
470pF
ISUPPLY (mA)
4
100
90
1000pF
2200pF
40
470pF
100
TRISE (ns)
3300pF
1800pF
TFALL (ns)
TRISE (ns)
1800pF
0
100
4700pF
80
60
Rise Time
vs. Capacitive Load
2200pF
1000pF
100pF
100
FREQUENCY (kHz)
1000
MIC4423/4424/4425
MIC4423/4424/4425
Micrel
Delay Time vs.
Supply Voltage
60
50
40
40
T (ns)
TD2
TD1
20
BOTH INPUTS = 0
0.1
4
6
8
10
12 14
VSUPPLY (V)
16
0
-55
18
Quiescent Current
vs. Temperature
6
-25
5
35 65 95
TEMPERATURE (˚C)
125
0.01
Output Resistance (Output
High) vs. Supply Voltage
6
4
6
8
10 12 14
VSUPPLY (V)
16
18
Output Resistance (Output
Low) vs. Supply Voltage
VS = 10V
1.0
INPUTS = 1
0.8
0.6
0.4
INPUTS = 0
0.2
0
-55
-25 5
35 65 95
TEMPERATURE (˚C)
MIC4423/4424/4425
125
5
5
4
4
RDS(ON) (Ω)
IQUIESCENT (mA)
TD1
BOTH INPUTS = 1
1
10
1.4
1.2
TD2
20
10
0
TJ = 25˚C
30
RDS(ON) (Ω)
T (ns)
50
30
10
Quiescent Supply Current
vs. Voltage
CLOAD = 2200 pF
CLOAD = 2200 pF
IQUIESCENT (mA)
60
Delay Time
vs. Temperature
125˚C
3
25˚C
2
1
0
125˚C
25˚C
3
2
1
4
6
8
10 12 14
VSUPPLY (V)
6
16
18
0
4
6
8
10 12 14
VSUPPLY (V)
16
18
January 1999
MIC4423/4424/4425
Micrel
requires attention to the ground path. Two things other than
the driver affect the rate at which it is possible to turn a load
off: The adequacy of the grounding available for the driver,
and the inductance of the leads from the driver to the load. The
latter will be discussed in a separate section.
Application Information
Although the MIC4423/24/25 drivers have been specifically
constructed to operate reliably under any practical
circumstances, there are nonetheless details of usage which
will provide better operation of the device.
Best practice for a ground path is obviously a well laid out
ground plane. However, this is not always practical, and a
poorly-laid out ground plane can be worse than none. Attention
to the paths taken by return currents even in a ground plane
is essential. In general, the leads from the driver to its load, the
driver to the power supply, and the driver to whatever is driving
it should all be as low in resistance and inductance as
possible. Of the three paths, the ground lead from the driver
to the logic driving it is most sensitive to resistance or
inductance, and ground current from the load are what is most
likely to cause disruption. Thus, these ground paths should be
arranged so that they never share a land, or do so for as short
a distance as is practical.
Supply Bypassing
Charging and discharging large capacitive loads quickly
requires large currents. For example, charging 2000pF from
0 to 15 volts in 20ns requires a constant current of 1.5A. In
practice, the charging current is not constant, and will usually
peak at around 3A. In order to charge the capacitor, the driver
must be capable of drawing this much current, this quickly,
from the system power supply. In turn, this means that as far
as the driver is concerned, the system power supply, as seen
by the driver, must have a VERY low impedance.
As a practical matter, this means that the power supply bus
must be capacitively bypassed at the driver with at least 100X
the load capacitance in order to achieve optimum driving
speed. It also implies that the bypassing capacitor must have
very low internal inductance and resistance at all frequencies
of interest. Generally, this means using two capacitors, one a
high-performance low ESR film, the other a low internal
resistance ceramic, as together the valleys in their two
impedance curves allow adequate performance over a broad
enough band to get the job done. PLEASE NOTE that many
film capacitors can be sufficiently inductive as to be useless
for this service. Likewise, many multilayer ceramic capacitors
have unacceptably high internal resistance. Use capacitors
intended for high pulse current service (in-house we use
WIMA™ film capacitors and AVX Ramguard™ ceramics;
several other manufacturers of equivalent devices also exist).
The high pulse current demands of capacitive drivers also
mean that the bypass capacitors must be mounted very close
to the driver in order to prevent the effects of lead inductance
or PCB land inductance from nullifying what you are trying to
accomplish. For optimum results the sum of the lengths of the
leads and the lands from the capacitor body to the driver body
should total 2.5cm or less.
To illustrate what can happen, consider the following: The
inductance of a 2cm long land, 1.59mm (0.062") wide on a
PCB with no ground plane is approximately 45nH. Assuming
a dl/dt of 0.3A/ns (which will allow a current of 3A to flow after
10ns, and is thus slightly slow for our purposes) a voltage of
13.5 Volts will develop along this land in response to our
postulated ∆Ι. For a 1cm land, (approximately 15nH) 4.5 Volts
is developed. Either way, anyone using TTL-level input signals
to the driver will find that the response of their driver has been
seriously degraded by a common ground path for input to and
output from the driver of the given dimensions. Note that this
is before accounting for any resistive drops in the circuit. The
resistive drop in a 1.59mm (0.062") land of 2oz. Copper
carrying 3A will be about 4mV/cm (10mV/in) at DC, and the
resistance will increase with frequency as skin effect comes
into play.
The problem is most obvious in inverting drivers where the
input and output currents are in phase so that any attempt to
raise the driver’s input voltage (in order to turn the driver’s load
off) is countered by the voltage developed on the common
ground path as the driver attempts to do what it was supposed
to. It takes very little common ground path, under these
circumstances, to alter circuit operation drastically.
Bypass capacitance, and its close mounting to the driver
serves two purposes. Not only does it allow optimum
performance from the driver, it minimizes the amount of lead
length radiating at high frequency during switching, (due to the
large ∆ I) thus minimizing the amount of EMI later available for
system disruption and subsequent cleanup. It should also be
noted that the actual frequency of the EMI produced by a
driver is not the clock frequency at which it is driven, but is
related to the highest rate of change of current produced
during switching, a frequency generally one or two orders of
magnitude higher, and thus more difficult to filter if you let it
permeate your system. Good bypassing practice is essential
to proper operation of high speed driver ICs.
Output Lead Inductance
The same descriptions just given for PCB land inductance
apply equally well for the output leads from a driver to its load,
except that commonly the load is located much further away
from the driver than the driver’s ground bus.
Generally, the best way to treat the output lead inductance
problem, when distances greater than 4cm (2") are involved,
requires treating the output leads as a transmission line.
Unfortunately, as both the output impedance of the driver and
the input impedance of the MOSFET gate are at least an order
of magnitude lower than the impedance of common coax,
using coax is seldom a cost-effective solution. A twisted pair
works about as well, is generally lower in cost, and allows use
of a wider variety of connectors. The second wire of the
twisted pair should carry common from as close as possible
Grounding
Both proper bypassing and proper grounding are necessary
for optimum driver operation. Bypassing capacitance only
allows a driver to turn the load ON. Eventually (except in rare
circumstances) it is also necessary to turn the load OFF. This
January 1999
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MIC4423/4424/4425
MIC4423/4424/4425
Micrel
to the ground pin of the driver directly to the ground terminal
of the load. Do not use a twisted pair where the second wire
in the pair is the output of the other driver, as this will not
provide a complete current path for either driver. Likewise, do
not use a twisted triad with two outputs and a common return
unless both of the loads to be driver are mounted extremely
close to each other, and you can guarantee that they will never
be switching at the same time.
approximately 1.5V which makes the driver directly compatible
with TTL signals, or with CMOS powered from any supply
voltage between 3V and 15V.
The MIC4423/24/25 drivers can also be driven directly by the
SG1524/25/26/27, TL494/95, TL594/95, NE5560/61/62/68,
TSC170, MIC38C42, and similar switch mode power supply
ICs. By relocating the main switch drive function into the driver
rather than using the somewhat limited drive capabilities of a
PWM IC. The PWM IC runs cooler, which generally improves
its performance and longevity, and the main switches switch
faster, which reduces switching losses and increase system
efficiency.
For output leads on a printed circuit, the general rule is to
make them as short and as wide as possible. The lands should
also be treated as transmission lines: i.e. minimize sharp
bends, or narrowings in the land, as these will cause ringing.
For a rough estimate, on a 1.59mm (0.062") thick G-10 PCB
a pair of opposing lands each 2.36mm (0.093") wide translates
to a characteristic impedance of about 50Ω. Half that width
suffices on a 0.787mm (0.031") thick board. For accurate
impedance matching with a MIC4423/24/25 driver, on a
1.59mm (0.062") board a land width of 42.75mm (1.683")
would be required, due to the low impedance of the driver and
(usually) its load. This is obviously impractical under most
circumstances. Generally the tradeoff point between lands
and wires comes when lands narrower than 3.18mm (0.125")
would be required on a 1.59mm (0.062") board.
The input protection circuitry of the MIC4423/24/25, in addition
to providing 2kV or more of ESD protection, also works to
prevent latchup or logic upset due to ringing or voltage spiking
on the logic input terminal. In most CMOS devices when the
logic input rises above the power supply terminal, or descends
below the ground terminal, the device can be destroyed or
rendered inoperable until the power supply is cycled OFF and
ON. The MIC4423/24/25 drivers have been designed to
prevent this. Input voltages excursions as great as 5V below
ground will not alter the operation of the device. Input excursions
above the power supply voltage will result in the excess
voltage being conducted to the power supply terminal of the
IC. Because the excess voltage is simply conducted to the
power terminal, if the input to the driver is left in a high state
when the power supply to the driver is turned off, currents as
high as 30mA can be conducted through the driver from the
input terminal to its power supply terminal. This may overload
the output of whatever is driving the driver, and may cause
other devices that share the driver’s power supply, as well as
the driver, to operate when they are assumed to be off, but it
will not harm the driver itself. Excessive input voltage will also
slow the driver down, and result in much longer internal
propagation delays within the drivers. TD2, for example, may
increase to several hundred nanoseconds. In general, while
the driver will accept this sort of misuse without damage,
proper termination of the line feeding the driver so that line
spiking and ringing are minimized, will always result in faster
and more reliable operation of the device, leave less EMI to be
filtered elsewhere, be less stressful to other components in
the circuit, and leave less chance of unintended modes of
operation.
To obtain minimum delay between the driver and the load, it
is considered best to locate the driver as close as possible to
the load (using adequate bypassing). Using matching
transformers at both ends of a piece of coax, or several
matched lengths of coax between the driver and the load,
works in theory, but is not optimum.
Driving at Controlled Rates
Occasionally there are situations where a controlled rise or fall
time (which may be considerably longer than the normal rise
or fall time of the driver’s output) is desired for a load. In such
cases it is still prudent to employ best possible practice in
terms of bypassing, grounding and PCB layout, and then
reduce the switching speed of the load (NOT the driver) by
adding a noninductive series resistor of appropriate value
between the output of the driver and the load. For situations
where only rise or only fall should be slowed, the resistor can
be paralleled with a fast diode so that switching in the other
direction remains fast. Due to the Schmitt-trigger action of the
driver’s input it is not possible to slow the rate of rise (or fall)
of the driver’s input signal to achieve slowing of the output.
Power Dissipation
CMOS circuits usually permit the user to ignore power
dissipation. Logic families such as 4000 series and 74Cxxx
have outputs which can only source or sink a few milliamps of
current, and even shorting the output of the device to ground
or VCC may not damage the device. CMOS drivers, on the
other hand, are intended to source or sink several Amps of
current. This is necessary in order to drive large capacitive
loads at frequencies into the megahertz range. Package
power dissipation of driver ICs can easily be exceeded when
driving large loads at high frequencies. Care must therefore
be paid to device dissipation when operating in this domain.
Input Stage
The input stage of the MIC4423/24/25 consists of a singleMOSFET class A stage with an input capacitance of ≤38pF.
This capacitance represents the maximum load from the
driver that will be seen by its controlling logic. The drain load
on the input MOSFET is a –2mA current source. Thus, the
quiescent current drawn by the driver varies, depending on
the logic state of the input.
Following the input stage is a buffer stage which provides
~400mV of hysteresis for the input, to prevent oscillations
when slowly-changing input signals are used or when noise is
present on the input. Input voltage switching threshold is
MIC4423/4424/4425
The Supply Current vs Frequency and Supply Current vs
Load characteristic curves furnished with this data sheet aid
8
January 1999
MIC4423/4424/4425
Micrel
on resistance of the driver when its output is in the high state,
or its on resistance when the driver is in the low state,
depending on how the inductor is connected, and this is still
only half the story. For the part of the cycle when the inductor
is forcing current through the driver, dissipation is best
described as
in estimating power dissipation in the driver. Operating
frequency, power supply voltage, and load all affect power
dissipation.
Given the power dissipation in the device, and the thermal
resistance of the package, junction operating temperature for
any ambient is easy to calculate. For example, the thermal
resistance of the 8-pin plastic DIP package, from the datasheet,
is 150°C/W. In a 25°C ambient, then, using a maximum
junction temperature of 150°C, this package will dissipate
960mW.
PL2 = I VD (1 – D)
where VD is the forward drop of the clamp diode in the driver
(generally around 0.7V). The two parts of the load dissipation
must be summed in to produce PL
Accurate power dissipation numbers can be obtained by
summing the three sources of power dissipation in the device:
PL = PL1 + PL2
Quiescent Power Dissipation
Quiescent power dissipation (PQ, as described in the input
section) depends on whether the input is high or low. A low
input will result in a maximum current drain (per driver) of
≤0.2mA; a logic high will result in a current drain of ≤2.0mA.
Quiescent power can therefore be found from:
• Load power dissipation (PL)
• Quiescent power dissipation (PQ)
• Transition power dissipation (PT)
Calculation of load power dissipation differs depending on
whether the load is capacitive, resistive or inductive.
Resistive Load Power Dissipation
Dissipation caused by a resistive load can be calculated as:
PQ = VS [D IH + (1 – D) IL]
where:
PL = I2 RO D
IH =
IL =
D=
VS =
where:
I = the current drawn by the load
RO = the output resistance of the driver when the
output is high, at the power supply voltage used
(See characteristic curves)
D = fraction of time the load is conducting (duty cycle)
Transition Power Dissipation
Transition power is dissipated in the driver each time its output
changes state, because during the transition, for a very brief
interval, both the N- and P-channel MOSFETs in the output
totem-pole are ON simultaneously, and a current is conducted
through them from VS to ground. The transition power
dissipation is approximately:
Capacitive Load Power Dissipation
Dissipation caused by a capacitive load is simply the energy
placed in, or removed from, the load capacitance by the driver.
The energy stored in a capacitor is described by the equation:
PT = f VS (A•s)
E = 1/2 C V2
where (A•s) is a time-current factor derived from Figure 2.
As this energy is lost in the driver each time the load is charged
or discharged, for power dissipation calculations the 1/2 is
removed. This equation also shows that it is good practice not
to place more voltage in the capacitor than is necessary, as
dissipation increases as the square of the voltage applied to
the capacitor. For a driver with a capacitive load:
Total power (PD) then, as previously described is just
PD = PL + PQ +PT
Examples show the relative magnitude for each term.
EXAMPLE 1: A MIC4423 operating on a 12V supply driving
two capacitive loads of 3000pF each, operating at 250kHz,
with a duty cycle of 50%, in a maximum ambient of 60°C.
PL = f C (VS)2
where:
First calculate load power loss:
f = Operating Frequency
C = Load Capacitance
VS = Driver Supply Voltage
PL = f x C x (VS)2
PL = 250,000 x (3 x 10–9 + 3 x 10–9) x 122
= 0.2160W
Inductive Load Power Dissipation
For inductive loads the situation is more complicated. For the
part of the cycle in which the driver is actively forcing current
into the inductor, the situation is the same as it is in the
resistive case:
Then transition power loss:
PT = f x VS x (A•s)
= 250,000 • 12 • 2.2 x 10–9 = 6.6mW
Then quiescent power loss:
PL1 = I2 RO D
PQ = VS x [D x IH + (1 – D) x IL]
However, in this instance the RO required may be either the
January 1999
quiescent current with input high
quiescent current with input low
fraction of time input is high (duty cycle)
power supply voltage
9
MIC4423/4424/4425
MIC4423/4424/4425
Micrel
= 0.213W
= 12 x [(0.5 x 0.0035) + (0.5 x 0.0003)]
= 0.0228W
In a ceramic package with an θJA of 100°C/W, this amount of
power results in a junction temperature given the maximum
40°C ambient of:
Total power dissipation, then, is:
PD = 0.2160 + 0.0066 + 0.0228
= 0.2454W
(0.213 x 100) + 40 = 61.4°C
Assuming an SOIC package, with an θJA of 120°C/W, this will
result in the junction running at:
The actual junction temperature will be lower than calculated
both because duty cycle is less than 100% and because the
graph lists RDS(on) at a TJ of 125°C and the RDS(on) at 61°C
TJ will be somewhat lower.
0.2454 x 120 = 29.4°C
above ambient, which, given a maximum ambient temperature
of 60°C, will result in a maximum junction temperature of
89.4°C.
Definitions
CL = Load Capacitance in Farads.
D = Duty Cycle expressed as the fraction of time the input
to the driver is high.
EXAMPLE 2: A MIC4424 operating on a 15V input, with one
driver driving a 50Ω resistive load at 1MHz, with a duty cycle
of 67%, and the other driver quiescent, in a maximum ambient
temperature of 40°C:
f = Operating Frequency of the driver in Hertz
IH = Power supply current drawn by a driver when both
inputs are high and neither output is loaded.
PL = I2 x RO x D
First, IO must be determined.
IL = Power supply current drawn by a driver when both
inputs are low and neither output is loaded.
IO = VS / (RO + RLOAD)
ID = Output current from a driver in Amps.
Given RO from the characteristic curves then,
IO = 15 / (3.3 + 50)
PD = Total power dissipated in a driver in Watts.
IO = 0.281A
PL = Power dissipated in the driver due to the driver’s load
in Watts.
and:
PQ = Power dissipated in a quiescent driver in Watts.
PL = (0.281)2 x 3.3 x 0.67
= 0.174W
PT = F x VS x (A•s)/2
PT = Power dissipated in a driver when the output changes
states (“shoot-through current”) in Watts. NOTE: The
“shoot-through” current from a dual transition (once
up, once down) for both drivers is stated in the graph
on the following page in ampere-nanoseconds. This
figure must be multiplied by the number of repetitions
per second (frequency to find Watts).
(because only one side is operating)
= (1,000,000 x 15 x 3.3 x 10–9) / 2
= 0.025 W
and:
RO= Output resistance of a driver in Ohms.
PQ = 15 x [(0.67 x 0.00125) + (0.33 x 0.000125) +
(1 x 0.000125)]
VS= Power supply voltage to the IC in Volts.
(this assumes that the unused side of the driver has its input
grounded, which is more efficient)
= 0.015W
then:
PD = 0.174 + 0.025 + 0.0150
MIC4423/4424/4425
10
January 1999
MIC4423/4424/4425
Micrel
Crossover
Energy Loss
A•s (Ampere-seconds)
10-8
10-9
10-10
0
2
4
6
8 10 12 14 16 18
VIN
NOTE: THE VALUES ON THIS GRAPH REPRESENT THE LOSS SEEN BY BOTH
DRIVERS IN A PACKAGE DURING ONE COMPLETE CYCLE. FOR A SINGLE
DRIVER DIVIDE THE STATED VALUES BY 2. FOR A SINGLE TRANSITION OF A
SINGLE DRIVER, DIVIDE THE STATED VALUE BY 4.
Figure 2.
MAXIMUM PACKAGE
POWER DISSIPATION (mW)
1250
1000
SOIC
750
PDIP
500
250
0
25
January 1999
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
11
MIC4423/4424/4425
MIC4423/4424/4425
Micrel
Package Information
PIN 1
DIMENSIONS:
INCH (MM)
0.380 (9.65)
0.370 (9.40)
0.255 (6.48)
0.245 (6.22)
0.135 (3.43)
0.125 (3.18)
0.300 (7.62)
0.013 (0.330)
0.010 (0.254)
0.018 (0.57)
0.380 (9.65)
0.320 (8.13)
0.130 (3.30)
0.100 (2.54)
0.0375 (0.952)
8-Pin DIP (N)
0.026 (0.65)
MAX)
PIN 1
0.157 (3.99)
0.150 (3.81)
DIMENSIONS:
INCHES (MM)
0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
TYP
0.064 (1.63)
0.045 (1.14)
45°
0.0098 (0.249)
0.0040 (0.102)
0.197 (5.0)
0.189 (4.8)
0°–8°
0.010 (0.25)
0.007 (0.18)
0.050 (1.27)
0.016 (0.40)
SEATING
PLANE
0.244 (6.20)
0.228 (5.79)
8-Pin SOIC (M)
PIN 1
DIMENSIONS:
INCHES (MM)
0.301 (7.645)
0.297 (7.544)
0.027 (0.686)
0.031 (0.787)
0.094 (2.388)
0.090 (2.286)
0.297 (7.544)
0.293 (7.442)
0.103 (2.616)
0.050 (1.270) 0.016 (0.046) 0.099 (2.515)
TYP
TYP
0.409 (10.389)
0.405 (10.287)
7°
TYP
0.015
R
(0.381)
0.015
(0.381)
SEATING MIN
PLANE
0.330 (8.382)
0.326 (8.280)
0.022 (0.559)
0.018 (0.457)
5°
TYP
10° TYP
0.032 (0.813) TYP
0.408 (10.363)
0.404 (10.262)
16-Pin Wide SOIC (WM)
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
USA
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 1999 Micrel Incorporated
MIC4423/4424/4425
12
January 1999