NVTFS4C13N Power MOSFET 30 V, 9.4 mW, 40 A, Single N−Channel, m8FL Features • • • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses NVTFS4C13NWF − Wettable Flanks Product NVT Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 9.4 mW @ 10 V 30 V 40 A 14 mW @ 4.5 V D (5,6) MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Symbol Value Unit Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ±20 V ID 14 A Parameter TA = 25°C Continuous Drain Current RqJA (Notes 1, 2, 4) Power Dissipation RqJA (Note 1, 2, 4) Continuous Drain Current RqJC (Note 1, 3, 4) TA = 100°C TA = 25°C Steady State Pulsed Drain Current TA = 100°C PD TA = 25°C, tp = 10 ms Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, IL = 14 Apk, L = 0.1 mH) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) MARKING DIAGRAM 40 TA = 100°C Operating Junction and Storage Temperature W 1.5 ID TA = 25°C N−CHANNEL MOSFET 3.0 TA = 100°C Power Dissipation RqJC (Note 1, 3, 4) S (1,2,3) 10 PD TA = 25°C G (4) 1 28 A 26 W WDFN8 (m8FL) CASE 511AB 1 S S S G XXXX AYWWG G D D D D 13 IDM 152 A TJ, Tstg −55 to +175 °C IS 24 A EAS 10 mJ TL 260 °C 13WF Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Junction−to−Case − Steady State (Drain) (Notes 1 and 4) RqJC 5.8 Junction−to−Ambient – Steady State (Notes 1 and 2) RqJA 50 4C13 Unit A Y WW G = Specific Device Code for NVMTS4C13N = Specific Device Code of NVTFS4C13NWF = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. °C/W 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2 2 oz. Cu pad. 3. Assumes heat−sink sufficiently large to maintain constant case temperature independent of device power. 4. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2014 July, 2014 − Rev. 1 1 Publication Order Number: NVTFS4C13N/D NVTFS4C13N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 14.9 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA ±100 mA nA ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance VGS(TH)/TJ RDS(on) 1.3 2.1 4.8 V mV/°C VGS = 10 V ID = 30 A 7.5 9.4 VGS = 4.5 V ID = 12 A 11.2 14 mW Forward Transconductance gFS VDS = 1.5 V, ID = 15 A 40 S Gate Resistance RG TA = 25°C 1.0 W CHARGES AND CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance 770 VGS = 0 V, f = 1 MHz, VDS = 15 V 443 VGS = 0 V, VDS = 15 V, f = 1 MHz 0.165 CRSS pF 127 Capacitance Ratio CRSS/CISS Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 3.7 Gate Plateau Voltage VGP 3.6 V 15.2 nC Total Gate Charge 7.8 1.4 VGS = 4.5 V, VDS = 15 V; ID = 30 A QG(TOT) VGS = 10 V, VDS = 15 V; ID = 30 A nC 2.9 SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) 9 tr td(OFF) VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 35 tf 5 td(ON) 6.0 tr td(OFF) VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf ns 13 26 ns 16 3.0 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD VGS = 0 V, IS = 30 A TJ = 25°C 0.82 TJ = 125°C 0.69 tRR ta tb 1.1 V 23.4 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A QRR 12.1 11.3 9.7 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns nC NVTFS4C13N TYPICAL CHARACTERISTICS 10 V 70 6.5 V ID, DRAIN CURRENT (A) VDS = 5 V 4.5 V 60 4V 50 3.8 V 40 3.6 V 30 3.4 V 20 3.2 V 3.0 V 10 0 0 1 2 3 40 30 20 10 TJ = 25°C 4 5 0 0 1 1.5 2 2.5 3 3.5 4 4.5 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = 30 A 0.013 0.012 0.011 0.010 0.009 0.008 0.007 0.006 4.0 5.0 6.0 7.0 8.0 9.0 VGS, GATE−TO−SOURCE VOLTAGE (V) 10 5 0.022 TJ = 25°C 0.020 0.018 0.016 VGS = 4.5 V 0.014 0.012 0.010 0.008 0.006 VGS = 10 V 10 20 30 40 50 60 70 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10000 1.8 ID = 30 A VGS = 10 V VGS = 0 V TJ = 150°C IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 0.5 TJ = −55°C VGS, GATE−TO−SOURCE VOLTAGE (V) 0.014 1.6 TJ = 125°C TJ = 25°C VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.015 3.0 50 2.8 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 60 4.2 V ID, DRAIN CURRENT (A) 70 1.4 1.2 1.0 1000 TJ = 125°C 100 TJ = 85°C 0.8 10 0.6 −50 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 30 NVTFS4C13N TYPICAL CHARACTERISTICS VGS = 0 V TJ = 25°C C, CAPACITANCE (pF) 900 Ciss 800 VGS, GATE−TO−SOURCE VOLTAGE (V) 1000 700 600 Coss 500 400 300 200 Crss 100 0 0 5 10 15 20 25 30 10 QT 9 8 7 6 5 Qgd 4 3 TJ = 25°C VDD = 15 V VGS = 10 V ID = 30 A Qgs 2 1 0 0 2 4 6 8 10 12 14 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 1000 16 30 VGS = 0 V IS, SOURCE CURRENT (A) VDD = 15 V ID = 15 A VGS = 10 V 100 tr td(off) 10 td(on) tf 1 25 20 TJ = 25°C 15 TJ = 125°C 10 5 0 1 10 0.4 100 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 10 ms 10 100 ms IDS, (A) t, TIME (ns) 11 1 0.1 0.01 1 ms VGS = 10 V TC = 25°C 650 mm2 2 oz Cu Pad dc 10 ms RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 100 NVTFS4C13N TYPICAL CHARACTERISTICS 100 Duty Cycle = 50% RqJA(t) (°C/W) 10 20% 10% 5% 2% 1 1% 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 12. Thermal Response 100 50 IPEAK, DRAIN CURRENT (A) 45 40 GFS (S) 35 30 25 20 15 10 TJ(initial) = 25°C 10 TJ(initial) = 125°C 5 1 1.0E−06 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 1.0E−05 1.0E−04 ID (A) TAV, TIME IN AVALANCHE (s) Figure 13. GFS vs. ID Figure 14. Avalanche Characteristics 1.E−03 ORDERING INFORMATION Package Shipping† NVTFS4C13NTAG WDFN8 (Pb−Free) 1500 / Tape & Reel NVTFS4C13NWFTAG WDFN8 (Pb−Free) 1500 / Tape & Reel NVTFS4C13NTWG WDFN8 (Pb−Free) 5000 / Tape & Reel NVTFS4C13NWFTWG WDFN8 (Pb−Free) 5000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NVTFS4C13N PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511AB ISSUE D 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A B D1 2X 0.20 C 8 7 6 5 4X q E1 E c 1 2 3 4 A1 TOP VIEW 0.10 C A 0.10 C SIDE VIEW 0.10 8X b C A B 0.05 C 4X DETAIL A 6X C e SEATING PLANE DETAIL A 8X e/2 L 0.42 4 INCHES NOM 0.030 −−− 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.009 0.012 0.026 BSC 0.012 0.016 0.026 0.032 0.012 0.017 0.002 0.005 0.055 0.059 0_ −−− MIN 0.028 0.000 0.009 0.006 0.65 PITCH PACKAGE OUTLINE K MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.016 0.020 0.037 0.022 0.008 0.063 12 _ 4X 0.66 M E3 8 G MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 −−− 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.23 0.30 0.40 0.65 BSC 0.30 0.41 0.51 0.65 0.80 0.95 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ −−− 12 _ SOLDERING FOOTPRINT* 1 E2 DIM A A1 b c D D1 D2 E E1 E2 E3 e G K L L1 M q 5 D2 BOTTOM VIEW 3.60 L1 0.75 2.30 0.57 0.47 2.37 3.46 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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