Renesas HD74LV4051ARPEL 8-channel analog multiplexer / demultiplexer Datasheet

HD74LV4051A
8-channel Analog Multiplexer / Demultiplexer
REJ03D0338–0300Z
(Previous ADE-205-283A (Z))
Rev.3.00
Jul. 20, 2004
Description
The HD74LV4051A handles both analog and digital signals, and enables signals of either type with amplitudes of up to
5.5 V (peak) to be transmitted in either direction (at VCC = 0 V to 5.5 V).
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
Features
• VCC = 2.0 V to 5.5 V operation
• All control inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV4051AFPEL
HD74LV4051ARPEL
HD74LV4051ATELL
SOP–16 pin (JEITA)
SOP–16 pin (JEDEC)
TSSOP–16 pin
FP–16DAV
FP–16DNV
TTP–16DAV
FP
RP
T
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
INH
C
B
A
On Channel
L
L
L
L
L
L
L
L
H
L
H
L
Y0
Y1
Y2
L
L
L
L
L
H
L
H
H
H
H
X
H
L
L
H
H
X
H
L
H
L
H
X
Y3
Y4
Y5
Y6
Y7
NONE
Note: H: High level
L: Low level
X: Immaterial
Rev.3.00 Jul. 20, 2004 page 1 of 11
HD74LV4051A
Pin Arrangement
16 VCC
Y4 1
Y6
2
15 Y2
COM
3
14 Y1
Y7 4
13 Y0
Y5
5
12 Y3
INH
6
11 A
GND
7
10 B
GND
8
9 C
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Maximum power dissipation at
Ta = 25°C (in still air)*3
VCC
VI
VO
IIK
IOK
IO
ICC or IGND
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–20
±50
±25
±50
V
V
V
mA
mA
mA
mA
PT
mW
Storage temperature
Tstg
785
500
–65 to 150
Conditions
Output: H or L
VI < 0
VO < 0 or VO > VCC
VO = 0 to VCC
SOP
TSSOP
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.3.00 Jul. 20, 2004 page 2 of 11
HD74LV4051A
Recommended Operating Conditions
Item
Symbol
Supply voltage range
VCC
Input voltage range
Output voltage range
Input transition rise or fall rate
VI
VI/O
∆t /∆v
Operating free-air temperature
Ta
Min
1
2.0*
0
0
0
0
0
–40
Max
Unit
5.5
5.5
VCC
200
100
20
85
V
V
V
ns/V
Conditions
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
°C
Notes: Unused or floating control inputs must be held high or low.
1. With the supply voltage at or around 2 V, the analog switch on-state loses linearity significantly. It is
recommended that only digital signals be transmitted at these low supply voltages.
Logic Diagram
COM
Y0
A
Y1
Y2
B
Y3
Y4
C
Y5
Y6
INH
Rev.3.00 Jul. 20, 2004 page 3 of 11
Y7
HD74LV4051A
DC Electrical Characteristics
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
VCC (V)
Min
Typ
Max
Min
Max
Unit
Test Conditions
Input voltage
VIH
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
60
50
40
200
90
50
20
10
7
—
—
—
—
—
—
—
—
—
180
150
75
500
180
100
30
20
15
±0.1
1.5
VCC × 0.7
VCC × 0.7
VCC × 0.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.5
VCC × 0.3
VCC × 0.3
VCC × 0.3
225
190
100
600
225
125
40
30
20
±1.0
V
Control input only
Ω
VIN = VCC or GND
VINH = VIL
IT = 2 mA
Ω
VIN = VCC to GND
VINH = VIL
IT = 2 mA
Ω
VIN = VCC to GND
VINH = VIL
IT = 2 mA
µA
VIN = VCC,
VOUT = GND or
VIN = GND,
VO = VCC,VINH = VIH
VIN = VCC or GND
VINH = VIL
VIN = 5.5 V or GND
VIN = VCC or GND
On-state switch
resistance
RON
Peak on resistance
RON (P)
Difference of on-state
resistance between
switches
∆RON
Off-state switch
leakage current
Is (OFF)
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.3
3.0
4.5
2.3
3.0
4.5
2.3
3.0
4.5
5.5
On-state switch
leakage current
Is (ON)
5.5
—
—
±0.1
—
±1.0
µA
Input current
Quiescent supply
current
IIN
ICC
0 to 5.5
5.5
—
—
—
—
±0.1
—
—
—
±1.0
20
µA
µA
VIL
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.3.00 Jul. 20, 2004 page 4 of 11
HD74LV4051A
Switching Characteristics
VCC = 2.5 ± 0.2 V
Item
Symbol
Ta = 25°C
Min
Typ
Max
Min
Ta = –40 to 85°C
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propagation
delay time
tPLH
tPHL
16.0
18.0
23.0
35.0
23.0
35.0
Yn or
COM
ns
RL = 1 kΩ
INH
COM or
Yn
tHZ
tLZ
—
—
—
—
—
—
COM
or Yn
Disable time
10.0
12.0
18.0
28.0
18.0
28.0
CL = 15 pF
CL = 50 pF
tZH
tZL
3.5
6.0
8.0
9.0
12.0
14.0
ns
Enable time
—
—
—
—
—
—
ns
RL = 1 kΩ
INH
COM or
Yn
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL 50 pF
VCC = 3.3 ± 0.3 V
Item
Symbol
Ta = 25°C
Min
Typ
Max
Min
Ta = –40 to 85°C
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propagation
delay time
tPLH
tPHL
10.0
12.0
15.0
25.0
15.0
25.0
Yn or
COM
ns
RL = 1 kΩ
INH
COM or
Yn
tHZ
tLZ
—
—
—
—
—
—
COM
or Yn
Disable time
6.0
9.0
12.0
20.0
12.0
20.0
CL = 15 pF
CL = 50 pF
tZH
tZL
2.5
4.5
6.0
7.0
8.0
11.0
ns
Enable time
—
—
—
—
—
—
ns
RL = 1 kΩ
INH
COM or
Yn
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
VCC = 5.0 ± 0.5 V
Item
Symbol
Ta = 25°C
Min
Typ
Max
Min
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Propagation
delay time
tPLH
tPHL
4.0
6.0
8.0
14.0
8.0
14.0
—
—
—
—
—
—
7.0
8.0
10.0
18.0
10.0
18.0
CL = 15 pF
CL = 50 pF
COM
or Yn
Yn or
COM
tZH
tZL
2.0
3.0
4.0
5.5
5.0
8.5
ns
Enable time
—
—
—
—
—
—
ns
RL = 1 kΩ
INH
COM
or Yn
INH
COM
or Yn
Disable time
tHZ
tLZ
Rev.3.00 Jul. 20, 2004 page 5 of 11
Ta = –40 to 85°C
CL = 15 pF
CL = 50 pF
ns
RL = 1 kΩ
CL = 15 pF
CL = 50 pF
HD74LV4051A
Switching Characteristics (Cont.)
Item
Symbol
Ta = 25°C
VCC (V) Min Typ
Max
Unit
Control input
capacitance
Common
terminal
capacitance
CIC
—
—
4.0
—
pF
CIS
—
—
35.5
—
pF
Switch terminal CI/O
capacitance
—
—
7.0
—
pF
Feedthrough
capacitance
CT
—
—
0.5
—
pF
Power
dissipation
capacitance
CPD
—
—
11.0
—
pF
Frequency
response
(Switch ON)
2.3
3.0
4.5
—
—
—
20.0
25.0
35.0
—
—
—
MHz
Crosstalk
(Control input
to signal
output)
2.3
3.0
4.5
—
—
—
20.0
35.0
60.0
—
—
—
mV
Feedthrough
attenuation
(Switch OFF)
2.3
3.0
4.5
—
—
—
–45
–45
–45
—
—
—
dB
Sine-wave
distortion
2.3
3.0
4.5
—
—
—
0.1
0.1
0.1
—
—
—
%
Rev.3.00 Jul. 20, 2004 page 6 of 11
Test Conditions
FROM TO
(Input) (Output)
CL = 50 pF, RL = 600Ω
Adjust fin voltage to obtain 0 dBm at
output when fin is 1 MHz (sine
wave). Increase fin frequency until
the dB-meter reads –3 dBm.
20 log (VO/VI) = –3 dBm
CL = 50 pF, RL = 600Ω
Adjust the RL value to obtain 0 A at
IIN/OUT when fin is 1 MHz
(square wave).
CL = 50 pF, RL = 600Ω
Adjust fin voltage to obtain 0 dBm at
input when fin is 1 MHz (sine wave).
COM
or Yn
Yn or
COM
INH
COM or
Yn
COM
or Yn
Yn or
COM
CL = 50 pF, RL = 10 kΩ
fIN = 1 kHz (sine wave)
VI = 2 VP-P, VCC = 2.3 V
VI = 2.5 VP-P, VCC = 3.0 V
VI = 4 VP-P, VCC = 4.5 V
COM
or YN
Yn or
COM
HD74LV4051A
Test Circuits
RON: On-state switch resistance
VCC
VINH = VIL
VCC
VIN = VCC or GND
VOUT
(ON)
GND
RON =
2 x 10
2.0 mA
V
VIN − OUT
Is (OFF): Off-state switch leakage current, Is (ON): On-state switch leakage current.
VCC
VINH = VIH
VCC
A
A
(OFF)
GND
B
VCC
VINH = V IL
VCC
A
Rev.3.00 Jul. 20, 2004 page 7 of 11
A
(ON)
GND
VIN − OUT
B
Open
−3
(Ω)
HD74LV4051A
t PLH, t PHL: Propagation delay time (from switch input to switch output)
VCC
VINH = VIL
VCC
A
B
(ON)
GND
RL =
50 Ω
CL = 15 or
50 pF
Switching time
VCC
RL =
50 Ω
VINH
S1
VCC
VIN
RL =
1 kΩ
VOUT
S2
CL = 15 or
50 pF
GND
S1
S2
t LZ /tZL
TEST
GND
VCC
t HZ/tZH
VCC
GND
VCC
VINH
VCC
VINH
50% VCC
0V
t ZL
50% VCC
0V
t ZH
≈VCC
VOUT
VOH
VOUT
50% VCC
50% VCC
≈0 V
VOL
VCC
VINH
VCC
VINH
50% VCC
0V
t LZ
Rev.3.00 Jul. 20, 2004 page 8 of 11
VOL +0.3 V
VOUT
VOL
0V
t HZ
≈VCC
VOUT
50% VCC
VOH −0.3 V
VOH
≈0 V
HD74LV4051A
Frequency response (switch ON)
VCC
f in = sine wave
V INH = V IL
f in
VCC
0.1 µF VIN
(ON)
GND
RL =
50 Ω
VOUT
RL =
600 Ω
CL = 50 pF
VCC /2
Crosstalk (control input to switch output)
VCC
RL =
50 Ω
V INH
VCC
VOUT
RL =
600 Ω
GND
VCC /2
RL =
600 Ω
CL = 50 pF
VCC /2
Feedthrough attenuation (switch OFF)
VCC
VINH = VIH
f in
RL =
0.1 µF 600 Ω
RL =
50 Ω
VIN
RL =
600 Ω
VCC
(OFF)
GND
VCC /2
VOUT
RL =
600 Ω
CL = 50 pF
VCC /2
Sine-wave distortion
VCC
VINH = VIL
f in
10 µF
VIN
VCC
(ON)
GND
VOUT
RL =
10 k Ω
VCC /2
Rev.3.00 Jul. 20, 2004 page 9 of 11
CL = 50 pF
HD74LV4051A
Package Dimensions
As of January, 2003
Unit: mm
10.06
10.5 Max
9
1
8
1.27
*0.40 ± 0.06
0.20
7.80 +– 0.30
1.15
0 ˚ – 8˚
0.10 ± 0.10
0.80 Max
*0.20 ± 0.05
2.20 Max
5.5
16
0.70 ± 0.20
0.15
0.12 M
Package Code
JEDEC
JEITA
Mass (reference value)
*Ni/Pd/Au plating
FP-16DAV
—
Conforms
0.24 g
As of January, 2003
Unit: mm
9.9
10.3 Max
9
1
8
0.635 Max
*0.40 ± 0.06
0.15
*0.20 ± 0.05
1.27
0.11
0.14 +– 0.04
1.75 Max
3.95
16
0.10
6.10 +– 0.30
1.08
0˚ – 8˚
0.67
0.60 +– 0.20
0.25 M
*Ni/Pd/Au plating
Rev.3.00 Jul. 20, 2004 page 10 of 11
Package Code
JEDEC
JEITA
Mass (reference value)
FP-16DNV
Conforms
Conforms
0.15 g
HD74LV4051A
As of January, 2003
Unit: mm
4.40
5.00
5.30 Max
16
9
1
8
0.65
*0.20 ± 0.05
1.0
0.13 M
Rev.3.00 Jul. 20, 2004 page 11 of 11
*0.15 ± 0.05
1.10 Max
*Ni/Pd/Au plating
0.10
0.07 +0.03
–0.04
6.40 ± 0.20
0.65 Max
0˚ – 8˚
0.50 ± 0.10
Package Code
JEDEC
JEITA
Mass (reference value)
TTP-16DAV
—
—
0.05 g
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
http://www.renesas.com
RENESAS SALES OFFICES
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501
Renesas Technology Europe Limited.
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom
Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900
Renesas Technology Europe GmbH
Dornacher Str. 3, D-85622 Feldkirchen, Germany
Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11
Renesas Technology Hong Kong Ltd.
7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2375-6836
Renesas Technology Taiwan Co., Ltd.
FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
© 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .1.0
Similar pages