NC7SP04 — TinyLogic® ULP Inverter Features Description The NC7SP04 is a single inverter from Fairchild’s Ultra Low Power (ULP) series of TinyLogic®. Ideal for applications where battery life is critical, this product is designed for ultra low power consumption within the VCC operating range of 0.9V to 3.6V. 0.9V to 3.6V VCC Supply Operation 3.6V Over-Voltage Tolerant I/Os at VCC from 0.9V to 3.6V Propagation Delay (tPD): 4.0ns Typical for 3.0V to 3.6V VCC 5.0ns Typical for 2.3V to 2.7V VCC 6.0ns Typical for 1.65V to 1.95V VCC 7.0ns Typical for 1.40V to 1.60V VCC 11.0ns Typical for 1.10V to 1.30V VCC 27.0ns Typical for 0.90V VCC Power-Off High-Impedance Inputs and Outputs Static Drive (IOH/IOL): ± 2.6mA at 3.00V VCC ± 2.1mA at 2.30V VCC ± 1.5mA at 1.65V VCC ± 1.0mA at 1.40V VCC ± 0.5mA at 1.10V VCC ± 20µA at 0.9V VCC Quiet Series™ Noise / EMI Reduction Circuitry The internal circuit is composed of a minimum of inverter stages, including the output buffer, to enable ultra low static and dynamic power. The NC7SP04, for lower drive requirements, is uniquely designed for optimized power and speed and is fabricated with an advanced CMOS technology to achieve best-in-class speed of operation, while maintaining extremely low CMOS power dissipation. Related Resources AN-5055 — Portability and Ultra Low Power TinyLogic® Ultra Small MicroPak™ Packages Ultra Low Dynamic Power Ordering Information Part Number Top Mark NC7SP04P5X P04 NC7SP04L6X NC7SP04FHX Package Packing Method 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on Tape & Reel J6 6-Lead MicroPak™, 1.00mm Wide 5000 Units on Tape & Reel J6 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch 5000 Units on Tape & Reel Notes: 1. TinyLogic ULP and ULP-A with up to 50% less power consumption can extend battery life significantly. 2. Battery Life=(Vbattery x Ibattery x 0.9) / (Pdevice) / 24hrs/day; where, Pdevice=(ICC x VCC) + (CPD + CL) 2 x VCC x f. 3. Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and derated 90% and device frequency at 10MHz, with CL=15pF load. Figure 1. Battery Life vs. VCC Supply Voltage © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 www.fairchildsemi.com NC7SP04 — TinyLogic® ULP Inverter December 2010 NC7SP04 — TinyLogic® ULP Inverter Connection Diagrams IEEE/IEC A 1 Y Figure 2. Logic Symbol Pin Configurations NC 1 A 2 GND 3 5 4 VCC Y Figure 3. SC70 (Top View) NC 1 6 VCC A 2 5 NC GND 3 4 Y Figure 4. MicroPak™ (Top Through View) Function Table Inputs Output A Y L H H L L = Low Logic Level H = High Logic Level Pin Definitions Pin # SC70 Pin # MicroPak™ Name 1 1, 5 NC 2 2 A 3 3 GND Ground 4 4 Y Output 5 6 VCC © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 Description No Connect Input Supply Voltage www.fairchildsemi.com Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 4.6 V VIN DC Input Voltage -0.5 4.6 V -0.5 VCC to +0.5 V -0.5 4.6 V -50 mA VOUT IIK IOK IOH / IOL DC Output Voltage HIGH or LOW State (4) VCC=0V DC Input Diode Current at VIN < 0V DC Output Diode Current VOUT < 0V -50 VOUT > VCC +50 DC Output Source/Sink Current ICC or Ground DC VCC or Ground Current per Supply Pin TSTG Storage Temperature Range -65 TJ Junction Temperature Under Bias TL Junction Lead Temperature (Soldering, 10 Seconds) SC70-5 PD ESD Power Dissipation at +85°C mA ±50 mA ±50 mA +150 °C +150 °C +260 °C NC7SP04 — TinyLogic® ULP Inverter Absolute Maximum Ratings 150 MicroPak™-6 130 MicroPak2™-6 120 mW Human Body Model JEDEC: JESD22-A114 4000 Charged Device Model JEDEC: JESD22-C101 2000 V Note: 4. The IO maximum rating must be observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter VCC Supply Voltage VIN (5) VOUT IOH / IOL TA Δt / ΔV θJA Input Voltage Output Voltage Output Current in IOH / IOL Conditions Thermal Resistance Max. Unit 0.9 3.6 V V 0 3.6 HIGH or LOW State 0 VCC VCC=0V 0 3.6 V VCC=3.0V to 3.6V ±2.6 VCC=2.3V to 2.7V ±2.1 VCC=1.65V to 1.95V ±1.5 VCC=1.40V to 1.60V ±1.0 VCC=1.10V to 1.30V ±0.5 VCC=0.9V 20.0 Free Air Operating Temperature Minimum Input Edge Rate Min. -40 mA µA +85 °C VIN=0.8V to 2.0V, VCC=3.0V 10 ns/V SC70-5 425 MicroPak™-6 500 MicroPak2™-6 560 °C/W Note: 5. Unused inputs must be held HIGH or LOW. They may not float. © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 www.fairchildsemi.com Symbol VIH VIL Parameter HIGH Level Input Voltage LOW Level Input Voltage VCC Min. Min. 0.65 x VCC 1.10 ≤ VCC ≤ 1.30 0.65 x VCC 0.65 x VCC 1.40 ≤ VCC ≤ 1.60 0.65 x VCC 0.65 x VCC 1.65 ≤ VCC ≤ 1.95 0.65 x VCC 0.65 x VCC 2.30 ≤ VCC ≤ 2.70 1.6 1.6 3.00 ≤ VCC ≤ 3.60 2.1 2.1 V 0.35 x VCC 0.35 x VCC 1.10 ≤ VCC ≤ 1.30 0.35 x VCC 0.35 x VCC 1.40 ≤ VCC ≤ 1.60 0.35 x VCC 0.35 x VCC 1.65 ≤ VCC ≤ 1.95 0.35 x VCC 0.35 x VCC 2.30 ≤ VCC ≤ 2.70 0.7 0.7 3.00 ≤ VCC ≤ 3.60 0.9 0.9 0.90 VCC - 0.1 VCC - 0.1 1.10 ≤ VCC ≤ 1.30 VCC - 0.1 VCC - 0.1 VCC - 0.1 VCC - 0.1 VCC - 0.1 VCC - 0.1 VCC - 0.1 VCC - 0.1 IOH=-20µA 2.30 ≤ VCC ≤ 2.70 3.00 ≤ VCC ≤ 3.60 VCC - 0.1 VCC - 0.1 0.75 x VCC 0.75 x VCC IOH=-1mA 1.07 0.99 IOH=-1.5mA 1.24 1.22 2.30 ≤ VCC ≤ 2.70 IOH=-2.1mA 1.95 1.87 3.00 ≤ VCC ≤ 3.60 IOH=-2.6mA 2.61 2.55 1.10 ≤ VCC ≤ 1.30 IOH=-0.5mA 1.40 ≤ VCC ≤ 1.60 1.65 ≤ VCC ≤ 1.95 0.1 0.1 1.10 ≤ VCC ≤ 1.30 0.1 0.1 1.40 ≤ VCC ≤ 1.60 0.1 0.1 0.1 0.1 0.1 0.1 2.30 ≤ VCC ≤ 2.70 LOW Level Output 3.00 ≤ VCC ≤ 3.60 Voltage 1.10 ≤ VCC ≤ 1.30 IOL=0.5mA V V 0.90 IOL=20µA Units Max. 0.90 1.65 ≤ VCC ≤ 1.95 VOL Max. TA=-40 to 85°C 0.65 x VCC 1.65 ≤ VCC ≤ 1.95 VOH TA=25°C 0.90 1.40 ≤ VCC ≤ 1.60 HIGH Level Output Voltage Conditions 0.1 0.1 0.30 x VCC 0.30 x VCC V 1.40 ≤ VCC ≤ 1.60 IOL=1mA 0.31 0.37 1.65 ≤ VCC ≤ 1.95 IOL=1.5mA 0.31 0.35 2.30 ≤ VCC ≤ 2.70 IOL=2.1mA 0.31 0.33 3.00 ≤ VCC ≤ 3.60 IOL=2.6mA 0.31 0.33 Input Leakage Current 0.90 to 3.60 0 ≤ VI ≤ 3.6V ±0.1 ±0.5 µA IOFF Power Off 0 0 ≤ (VO, VI) ≤ 3.6V 0.5 0.5 µA ICC Quiescent Supply Current 0.90 to 3.60 VIN=VCC or GND 0.9 0.9 µA IIN © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 NC7SP04 — TinyLogic® ULP Inverter DC Electrical Characteristics www.fairchildsemi.com Symbol Parameter VCC TA=25°C Conditions Min. 0.90 Typ. Max. Min. Max. Units Figure 27.0 1.10 ≤ VCC ≤ 1.30 3.5 11.0 21.8 3.0 34.3 1.40 ≤ VCC ≤ 1.60 2.5 7.0 14.8 2.0 15.0 1.65 ≤ VCC ≤ 1.95 CL=10pF, RL=1MΩ 2.0 6.0 12.0 1.5 12.2 2.30 ≤ VCC ≤ 2.70 1.5 5.0 9.4 1.0 9.9 3.00 ≤ VCC ≤ 3.60 1.0 4.0 8.3 1.0 9.0 0.90 30.0 1.10 ≤ VCC ≤ 1.30 tPHL, tPLH Propagation Delay TA=-40 to 85°C 4.0 11.0 22.8 3.5 37.3 3.0 8.0 15.5 2.5 16.5 2.5 6.0 12.6 2.0 13.6 2.30 ≤ VCC ≤ 2.70 2.0 5.0 9.9 1.5 10.8 3.00 ≤ VCC ≤ 3.60 1.5 4.0 8.7 1.0 9.5 1.40 ≤ VCC ≤ 1.60 1.65 ≤ VCC ≤ 1.95 CL=15pF, RL=1MΩ 0.90 ns Figure 1, Figure 2 NC7SP04 — TinyLogic® ULP Inverter AC Electrical Characteristics 32.0 1.10 ≤ VCC ≤ 1.30 5.0 13.0 25.9 4.0 46.3 1.40 ≤ VCC ≤ 1.60 4.0 9.0 17.8 3.5 18.2 1.65 ≤ VCC ≤ 1.95 CL=30pF, RL=1MΩ 3.0 7.0 14.4 2.0 15.9 2.30 ≤ VCC ≤ 2.70 2.0 6.0 11.3 1.5 12.8 3.00 ≤ VCC ≤ 3.60 1.5 5.0 9.2 1.0 10.7 CIN Input Capacitance 0 CPD Power Dissipation Capacitance 0.90 to 3.60 VIN=0V or VCC, f=10MHz Figure 5. AC Test Circuit 2 pF 8 pF Figure 6. AC Waveforms Symbol VCC 3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V 1.5V ± 0.1V 1.2V ± 0.1V 0.9V Vmi 1.5V VCC / 2 VCC / 2 VCC / 2 VCC / 2 VCC / 2 Vmo 1.5V VCC / 2 VCC / 2 VCC / 2 VCC / 2 VCC / 2 © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 www.fairchildsemi.com NC7SP04 — TinyLogic® ULP Inverter Physical Dimensions Figure 7. 5-Lead, SC70, EIAJ SC-88a, 1.25mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf. Package Designator P5X © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com NC7SP04 — TinyLogic® ULP Inverter Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.254) (0.49) 5X 1.00 (0.75) PIN 1 IDENTIFIER 5 (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 0.25 0.15 6X 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X Notes: BOTTOM VIEW (0.13) 4X DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 4. FILENAME AND REVISION: MAC06AREV4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. Figure 8. 6-Lead, MicroPak™, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator L6X © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com NC7SP04 — TinyLogic® ULP Inverter Physical Dimensions 0.89 0.35 0.05 C 1.00 2X B A 5X 0.40 PIN 1 MIN 250uM 0.66 1.00 1X 0.45 6X 0.19 0.05 C TOP VIEW RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 2X 0.90 0.05 C 0.35 0.55MAX C 5X 0.52 SIDE VIEW 0.73 (0.08) 4X 1 DETAIL A 2 1X 0.57 0.09 0.19 6X 3 0.20 6X ALTERNATIVE LAND PATTERN FOR UNIVERSAL APPLICATION (0.05) 6X 5X 0.35 0.25 0.35 6 5 4 BOTTOM VIEW 0.60 (0.08) 4X 0.10 .05 C C B A 0.40 0.30 NOTES: A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REVISION: MGF06AREV3 0.075X45° CHAMFER DETAIL A PIN 1 LEAD SCALE: 2X Figure 9. 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf. Package Designator FHX © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com NC7SP04 — TinyLogic® ULP Inverter © 2001 Fairchild Semiconductor Corporation NC7SP04 • Rev. 1.0.5 www.fairchildsemi.com