EEPROM
AS58C1001
Austin Semiconductor, Inc.
128K x 8 EEPROM
PIN ASSIGNMENT
(Top View)
EEPROM Memory
AVAILABLE AS MILITARY
SPECIFICATIONS
l
l
32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ)
SMD 5962-38267
MIL-STD-883
RDY/BUSY\
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
I/O 1
I/O 2
Vss
FEATURES
High speed: 150, 200, and 250ns
Data Retention: 10 Years
l Low power dissipation, active current (20mW/MHz (TYP)),
standby current (100µW(MAX))
l Single +5V (+10%) power supply
l Data Polling and Ready/Busy Signals
l Erase/Write Endurance (10,000 cycles in a page mode)
l Software Data protection Algorithm
l Data Protection Circuitry during power on/off
l Hardware Data Protection with RES pin
l Automatic Programming:
Automatic Page Write: 10ms (MAX)
128 Byte page size
l
l
OPTIONS
l
l
l
AS58C1001
Rev. 4.0 3/01
Vcc
A15
RES\
WE\
A13
A8
A9
A11
OE\
A10
CE\
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS
Electrically Erasable Programmable Read Only Memory (EEPROM)
organized as 131, 072 x 8 bits. The AS58C1001 is capable or in
system electrical Byte and Page reprogrammability.
The AS58C1001 achieves high speed access, low power consumption, and a high level of reliability by employing advanced MNOS
memory technology and CMOS process and circuitry technology and
CMOS process and circuitry technology.
This device has a 128-Byte Page Programming function to make its
erase and write operations faster. The AS58C1001 features Data
Polling and a Ready/Busy signal to indicate completion of erase and
programming operations.
This EEPROM provides several levels of data protection. Hardware data protection is provided with the RES pin, in addition to noise
protection on the WE signal and write inhibit during power on and off.
Software data protection is implemented using JEDEC Optional Standard algorithm.
The AS58C1001 is designed for high reliability in the most demanding applications. Data retention is specified for 10 years and
erase/write endurance is guaranteed to a minimum of 10,000 cycles in
the Page Mode.
No. 306
No. 305
No. 508
XT
IT
*NOTE: Package lid is connected to ground (Vss).
PIN NAME
A0 to A16
I/O0 to I/O7
OE\
CE\
WE\
Vcc
Vss
RDY/Busy\
RES\
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
GENERAL DESCRIPTION
MARKINGS
Timing
150ns access
-15
200ns access
-20
250ns access
-25
Packages
Ceramic Flat Pack
F
Radiation Shielded Ceramic FP* SF
Ceramic SOJ
DCJ
Operating Temperature Ranges
-Military (-55oC to +125oC)
-Industrial (-40oC to +85oC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
FUNCTION
Address input
Data input/output
Output enable
Chip enable
Write enable
Power supply
Ground
Ready busy
Reset
For more products and information
please visit our web site at
www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
EEPROM
AS58C1001
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
I/O0
High Voltage Generator
I/O7
Ready/Busy
I/O Buffer
and
Input Latch
OE\
Control Logic and Timing
CE\
WE\
RES\
A0
Y Gating
Y Decoder
A6
Address
Buffer and
Latch
X Decoder
Memory Array
A7
A16
Data Latch
MODE SELECTION
1
MODE
CE\
OE\
WE\
RES\
RDY/BUSY\
I/O
READ
VIL
VIL
VIH
VH
High-Z
DOUT
STANDBY
VIH
X
X
X
High-Z
High-Z
WRITE
VIL
VIH
VIL
VH
High-Z to VOL
DIN
DESELECT
VIL
VIH
VIH
VH
High-Z
High-Z
X
X
VIH
X
---
---
X
VIL
X
X
---
---
VIL
VIL
VIH
VH
VOL
Data Out
(I/O7)
X
X
X
VIL
High-Z
High-Z
WRITE
INHIBIT
DATA
POLLING
PROGRAM
Notes:
1. RDY/Busy\ output has only active LOW VOL and HIGH impedance state. It can not go to HIGH (VOH) state.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
EEPROM
Austin Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
AS58C1001
PROGRAMMING/ERASE
The 58C1001 does NOT employ a BULK-erase function.
The memory cells can be programmed ‘0’ or ‘1’. A write cycle
performs the function of erase & write on every cycle with
the erase being transparent to the user. The internal erase data
state is considered to be ‘1’. To program the memory array
with background of ALL 0’s or All 1’s, the user would
program this data using the page mode write operation to
program all 1024 128-byte pages.
AUTOMATIC PAGE WRITE
The Page Write feature allows 1 to 128 Bytes of data to
be written into the EEPROM in a single cycle and allows the
undefined data within 128 Bytes to be written corresponding
to the undefined address (A0 to A6). Loading the first Byte of
data, the data load window of 30µs opens for the second. In
the same manner each additional Byte of data can be loaded
within 30µs. In case CE\ and WE\ are kept high for 100µs
after data input, the EEPROM enters erase and write
automatically and only the input data can be written into the
EEPROM. In Page mode the data can be written and accessed
104 times per page, and in Byte mode 103 times per Byte.
DATA PROTECTION
To protect the data during operation and power on/off,
the AS58C1001 has:
1. Data protection against Noise on Control Pins (CE\,
OE\, WE\) during Operation. During readout or standby, noise
on the control pins may act as a trigger and turn the EEPROM
to programming mode by mistake. To prevent this phenomenon, the AS58C1001 has a noise cancellation function that
cuts noise if its width is 20ns or less in programming mode.
Be careful not to allow noise of a width of more than 20ns on
the control pins.
DATA\ POLLING
Data\ Polling allows the status of the EEPROM to be
determined. If the EEPROM is set to Read mode during a
Write cycle, and inversion of the last Byte of data to be loaded
outputs from I/O, to indicate that the EEPROM is performing
a Write operation.
WRITE PROTECTION
(1) Noise protection: Noise on a write cycle will not act
as a trigger with a WE\ pulse of less than 20ns.
(2) Write inhibit: Holding OE\ low, WE\ high or CE\
high, inhibits a write cycle during power on/off.
WE\ AND CE\ PIN OPERATION
During a write cycle, addresses are latched by the falling
edge of WE\ or CE\, and data is latched by the rising edge of
WE\ or CE\.
WRITE/ERASE ENDURANCE AND
DATA RETENTION
The endurance with page programming is 104 cycles (1%
cumulative failure rate) and the data retention time is more
than 10 years when a device is programmed less than 104
cycles.
RDY/Busy\ SIGNAL
RDY/Busy\ signal also allows status of the EEPROM to
be determined. The RDY/Busy\ signal has high impedance
except in write cycle and is lowered to VOL after the first write
signal. At the end of the write cycle, the RDY/Busy\ signal
changes state to high impedance. This allows many 58C1001
devices RDY/Busy\ signal lines to be wired-OR together.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
EEPROM
AS58C1001
Austin Semiconductor, Inc.
(EXAMPLE)
Vcc
RES\
*unprogrammable
*unprogrammable
FUNCTIONAL DESCRIPTION (continued)
Write Address
DATA PROTECTION (continued)
2. Data protection at Vcc on/off.
When RES\ is low, the EEPROM cannot be erased and
programmed. Therefore, data can be protected by keeping
RES\ low when Vcc is switched. RES\ should be high during
programming because it does not provide a latch function.
When Vcc is turned on or off, noise on the control pins
generated by external circuits (CPU, etc.) may turn the
EEPROM to programming mode by mistake. To prevent this
unintentional programming, the EEPROM must be kept in an
unprogrammable, standby or readout state by using a CPU
reset signal to RES\ pin.
In addition, when RES\ is kept high at Vcc on/off timing,
the input level of control pins (CE\, OE\, WE\) must be held
as CE\=Vcc or OE\=LOW or WE\=Vcc level.
5555
AA
2AAA
55
5555
A0
The Software data protection mode can be cancelled by
inputting the following 6 Bytes. This changes the AS58C1001
to the Non-Protection mode, for normal operation.
3. Software Data Protection
To protect against unintentional programming caused by
noise generated by external circuits, AS58C1001 has a
Software data protection function. To initate Software data
protection mode, 3 bytes of data must be input, followed by a
dummy write cycle of any address and any data byte. This
exact sequence switches the device into protection mode. This
4th cycle during write is required to initiate the SDP and
physically writes the address and data. While in SDP the
entire array is protected in which writes can only occur if the
exact SDP sequence is re-executed or the unprotect sequence
is executed.
AS58C1001
Rev. 4.0 3/01
Write Data
(Normal Data Input)
Address
5555
Data
AA
2AAA
55
5555
80
5555
AA
2AAA
55
5555
20
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
EEPROM
AS58C1001
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Supply Relative to Vss................-0.5V to +7.0V1
Voltage on any pin Relative to Vss.......................-0.6V to +7.0V1
Storage Temperature ............................................-65°C to +150°C
Operating Temperature Range.............................-55oC to +125oC
Soldering Temperature Range...............................................260oC
Maximum Junction Temperature**....................................+150°C
Power Dissipation...................................................................1.0W
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
** Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
PARAMETER
Input High (Logic 1) Voltage
3
Input Low (Logic 0) Voltage
Input Voltage (RES\ Pin)
4
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
PARAMETER
Power Supply Current:
Operating
CONDITION
OV < VIN < Vcc
Output(s) disabled, OV < VOUT < Vcc
IOH = -400 µA
IOL = 2.1 mA
CONDITIONS
SYMBOL
VIH
VIL
VH
ILI
ILO
VOH
VOL
SYM
IOUT=OmA, Vcc = 5.5V
Cycle=1µS, Duty=100%
MIN
2.2
-0.3
Vcc-0.5
-2
-2
2.4
MAX
VCC + 0.3V
0.8
VCC +1.0
2
2
0.4
-15
MAX
-20
-25
20
20
20
ICC3
IOUT=OmA, Vcc = 5.5V
Cycle=MIN, Duty=100%
UNITS
V
V
V
µΑ
µΑ
V
V
NOTES
9
2
4
UNITS NOTES
mA
65
55
50
CE\=Vcc, Vcc = 5.5V
ICC1
350
350
350
µA
CE\=VIH, Vcc = 5.5V
ICC2
3
3
3
mA
Power Supply Current:
Standby
CAPACITANCE
PARAMETER
Input Capacitance
Output Capactiance
AS58C1001
Rev. 4.0 3/01
CONDITIONS
o
TA = 25 C, f = 1MHz
VIN = 0
SYMBOL
MAX
UNITS
CIN
6
pF
Co
12
pF
NOTES
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION
(-55oC < TC < 125oC; Vcc = 5V +10%)
Test Conditions
l
l
l
l
Input Pulse Levels:
Input rise and fall times:
Output Load:
Reference levels for measuring timing:
! ! "
& !
0.0V to 3.0V
< 20ns
1 TTL Gate +100pF (including scope and jig)
1.5V, 1.5V
")
$ % ! &'
#
#
#
(
(
(
AC ELECTRICAL CHARACTERISTICS FOR SOFTWARE DATA
PROTECTION CYCLE OPERATION
SYMBOL
PARAMETER
Byte Load Cycle Time
Write Cycle Time
tBLC
MIN
0.55
MAX
30
UNITS
µS
tWC
10
---
mS
AC ELECTRICAL CHARACTERISTICS FOR DATA\ POLLING OPERATION
SYMBOL
MAX
---
UNITS
tOEH
MIN
0
Output Enable to Write Setup Time
tOES
0
---
ns
Write Start Time
tDW
150
---
ns
Write Cycle Time
tWC
---
10
ms
PARAMETER
Output Enable Hold Time
AS58C1001
Rev. 4.0 3/01
ns
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AC ELECTRICAL CHARACTERISTICS FOR PAGE ERASE AND PAGE
WRITE OPERATIONS
*# "# ' "# % ' "# "# $ "%
*# ( ( µ
µ
µ
µ
")
! "# AS58C1001
Rev. 4.0 3/01
& ' ( & ' "# % ' ( "# "# ' ( % Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
EEPROM
AS58C1001
Austin Semiconductor, Inc.
AC ELECTRICAL CHARACTERISTICS FOR BYTE ERASE AND BYTE
WRITE OPERATIONS
PARAMETER
Address Setup Time
Chip Enable to Write Setup Time
SYMBOL
MIN
MAX
UNITS
tAS
0
---
ns
0
---
ns
250
---
ns
250
---
ns
tCS
7
tCW
Write Pulse Width
tWP
8
7
Address Hold Time
tAH
150
---
ns
Data Setup Time
tDS
100
---
ns
Data Hold Time
tDH
10
---
ns
Chip Enable Hold Time
tCH
0
---
ns
Out Enable to Write Setup Time
tOES
0
---
ns
Output Enable Hold Time
tOEH
0
---
ns
Write Cycle Time
tWC
10
---
ms
Byte Load Window
tBL
100
---
µs
Time to Device Busy
tDB
120
---
ns
RES\ to Write Setup Time
tRP
100
---
µs
1
---
µs
7
Vcc to RES\ Setup Time
tRES
AC TEST CONDITIONS
NOTES:
Input Pulse Levels............................................0V to 3V
Input Rise and Fall Times....................................<20ns
Input Timing Reference Level................................1.5V
Output Reference Level..........................................1.5V
Output Load................................................See Figure 1
1.
2.
3.
4.
5.
Relative to Vss
VIN min = -3.0V for pulse widths <50ns
VIL min = -1.0V for pulse widths <50ns
IIL on RES\ = 100ua MAX
tOF is defined as the time at which E the output becomes and
open circuit and data is no longer driven.
6. Use this device in longer cycle than this value
7. WE\ controlled operation
8. CE\ controlled operation
9. RES\ pin VIH is VH
10. Reference only, not tested
Q
100pF
10
1 TTL GATE EQ.
Figure 1
OUTPUT LOAD EQUIVALENT
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
EEPROM
AS58C1001
Austin Semiconductor, Inc.
READ TIMING WAVEFORM
Address
tACC
CE\
OE\
WE\
Data Out
t OH
tCE
tDF
t OE
VIH
tRR
High-Z
Data Out Valid
tDFR
RES\
SOFTWARE DATA PROTECTION TIMING WAVEFORM (protection mode)
Vcc
CE\
Address
Data
tBLC
5555
AA
tBLC
tBLC
AAAA
or
2AAA
55
tWC
{
WE\
Write Address*
Write Data
5555
A0
* During this write cycle, data is physically written to address provided.
SOFTWARE DATA PROTECTION TIMING WAVEFORM (non-protection mode)
Vcc
tWC
Normal active
mode
CE\
WE\
Address
Data
AS58C1001
Rev. 4.0 3/01
AAAA
or
2AAA
5555
AA 55
5555 5555
80
AA
AAAA
or
2AAA
55
5555
20
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
EEPROM
AS58C1001
Austin Semiconductor, Inc.
DATA\ POLLING TIMING WAVEFORM
Address
1234
1234
1234
An
An
CE\
WE\
tOEH
tCE
tOES
OE\
t DW
t OE
DIN X
I/O7
DOUT X\
DOUT X
tWC
TOGGLE BIT WAVEFORM
Next Mode
Address
tCE
CE\
WE\
t OE
OE\
I/O7
tOEH
DIN
tOES
DOUT
DOUT
tWC
D OUT
D OUT
t DW
In transition from HI to LOW or LOW to HI.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
EEPROM
AS58C1001
Austin Semiconductor, Inc.
PAGE WRITE TIMING WAVEFORM
(WE\ CONTROLLED)
A7 - A16
A0 - A6
WE\
t AS
tAH
t WP
t BL
t DL
t CH12
12
123
1234
123
1234
12
1234
12
123
123
1234
12
tCS
CE\
tBLC
12
12
123
1234
123
1234
123412
12
123
123
123412
12
12
123
1231234
1234
123412
12
123
123123412
t WC
tOEH
tOES
OE\
tDH
t DS
DIN
RDY/Busy\
High-Z
t RP
RES\
t DW
t DB
High-Z
VOL
tRES
VCC
In transition from HI to LOW or LOW to HI.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
EEPROM
AS58C1001
Austin Semiconductor, Inc.
PAGE WRITE TIMING WAVEFORM
(CE\ CONTROLLED)
Address
A0 to A16
CE\
t AS
t WS
WE\
tAH
t CW
t BL
t DL
t
12
12
12
WH
tBLC
t WC
tOEH
tOES
OE\
tDH
t DS
DIN
RDY/Busy\
High-Z
t RP
RES\
t DW
t DB
High-Z
VOL
t RES
VCC
In transition from HI to LOW or LOW to HI.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
EEPROM
AS58C1001
Austin Semiconductor, Inc.
BYTE WRITE TIMING WAVEFORM
(WE\ CONTROLLED)
t WC
Address
t CS
tAH
t CH
CE\
t AS
t BL
t WP
WE\
t OES
t OEH
OE\
t DS
tDH
DIN
RDY/Busy\
t DW
t DB
High-Z
VOL
tRP
High-Z
t RES
RES\
VCC
In transition from HI to LOW or LOW to HI.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
13
EEPROM
AS58C1001
Austin Semiconductor, Inc.
BYTE WRITE TIMING WAVEFORM
(CE\ CONTROLLED)
Address
t WS
tAH
t WC
t BL
t CW
CE\
t AS
t WH
WE\
t OES
t OEH
OE\
t DS
tDH
DIN
RDY/Busy\
t DW
t DB
High-Z
VOL
tRP
High-Z
t RES
RES\
VCC
In transition from HI to LOW or LOW to HI.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
14
EEPROM
AS58C1001
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #305 (Package Designator SF)
SMD 5962-38267, Case Outline N
E
L
e
b
D
H
Top View
A1
A
c
D2
D1
Q
E1
SYMBOL
A
A1
b
c
D
D1
D2
E
E1
e
H
L
Q
SMD SPECIFICATIONS
MIN
MAX
0.125
0.150
0.090
0.110
0.015
0.019
0.003
0.007
0.810
0.830
0.775
0.785
0.745
0.755
0.425
0.445
0.290
0.310
0.045
0.055
1.000
1.100
0.290
0.310
0.026
0.037
*All measurements are in inches.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
15
EEPROM
AS58C1001
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #306 (Package Designator F)
SMD 5962-38267, Case Outline M
L
E
e
b
D
H
Top View
A1
A
c
D2
Q
E1
SYMBOL
A
A1
b
c
D
D2
E
E1
e
H
L
Q
SMD SPECIFICATIONS
MIN
MAX
0.097
0.123
0.090
0.110
0.015
0.019
0.003
0.007
0.810
0.830
0.745
0.755
0.425
0.445
0.330
0.356
0.045
0.055
1.000
1.100
0.290
0.310
0.026
0.037
NOTE: All drawings are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
*All measurements are in inches.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
16
EEPROM
AS58C1001
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #508 (Package Designator DCJ)
A
A1
D
e
D1
B
E2
b
E1
E
A2
SYMBOL
A
A1
A2
B
b
D
D1
E
E1
E2
e
ASI PACKAGE SPECIFICATIONS
MIN
MAX
0.132
0.142
0.076
0.086
0.018
0.028
0.018
0.032
0.015
0.019
0.816
0.834
0.745
0.755
0.430
0.440
0.465
0.485
0.415
0.425
0.045
0.055
*All measurements are in inches.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
17
EEPROM
AS58C1001
Austin Semiconductor, Inc.
ORDERING INFORMATION
EXAMPLE: AS58C1001F-25/XT
EXAMPLE: AS58C1001SF-15/IT
Package Speed
Process
Type
ns
Device Number
Package
Type
Speed
ns
Process
Device Number
AS58C1001
F
-15
/*
AS58C1001
SF
-15
/*
AS58C1001
AS58C1001
F
F
-20
-25
/*
/*
AS58C1001
AS58C1001
SF
SF
-20
-25
/*
/*
EXAMPLE: AS58C1001DCJ-20/IT
Device Number
AS58C1001
AS58C1001
AS58C1001
Package
Type
DCJ
DCJ
DCJ
Speed
ns
-15
-20
-25
Process
/*
/*
/*
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
XT = Extended Temperature Range
883C = Full Military Processing
AS58C1001
Rev. 4.0 3/01
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
18
EEPROM
Austin Semiconductor, Inc.
AS58C1001
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
Package Designator F
ASI Part #
SMD Part#
AS58C1001F-25/883C
AS58C1001F-20/883C
AS58C1001F-15/883C
5962-3826716QMA
5962-3826717QMA
5962-3826718QMA
Package Designator SF
ASI Part #
SMD Part#
AS58C1001SF-25/883C
AS58C1001SF-20/883C
AS58C1001SF-15/883C
5962-3826716QNA
5962-3826717QNA
5962-3826718QNA
Package Designator DCJ not currenly available
on the SMD.
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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