Datasheet Multifunction LCD Segment Driver BU97501KV MAX 204 segments (51SEG×4COM) Features Key input function for up to 30 keys (A key scan is performed only when a key is pressed.) Either 1/4 or 1/3 duty can be selected 1/4 duty drive：Up to 204 segments 1/3 duty drive：Up to 156 segments Integrated RAM for display data (DDRAM) Segment/GPO (Max 4port) output mode selectable Support standby mode Integrated Power-on Reset circuit Integrated Oscillator circuit No external component Low power consumption design Key Specifications ■ Supply Voltage Range: 2.7V to 6.0V ■ LCD drive power supply Range: 4.5V to 6.0V ■ Operating Temperature Range: -40°C to +85°C ■ Max Segments: 204 Segments ■ Display Duty: 1/3, 1/4 selectable ■ Bias: 1/2, 1/3 selectable ■ Interface: 3wire serial interface Package VQFP64 Applications Telephone FAX Portable equipment (POS, ECR, PDA etc.) DSC DVC Car audio Home electrical appliance Meter equipment W(Typ.)×D(Typ.)×H(Max.) VQFP64 12.00mm x 12.00mm x 1.60mm Typical Application Circuit Key Matrix Matrix (P1) (P2) KS1/S42 | KS6/S47 VDD +5V KI1/S48 | KI5/S52 (P4) COM1 COM2 COM3 P1/S1 P2/S2 (Note1) +5.5V (General purpose ports) (For use control of backlight) VLCD P4/S4 S5 (Note1) OSC LCD Panel (Up to 204 Segments) RESB From Controller CSB SCL S40 COM4/S41 SD To Controller DO (Note1) Insert capacitors between VDD/VLCD and VSS C≥0.1uF. Figure 1. Typical Application Circuit ○Product structure：Silicon monolithic integrated circuit ○This product is not designed for protection against radioactive rays. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･14･001 1/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet LCD VOLTAGE GENERATOR VLCD SEGMENT DRIVER & LATCH KS5/S46 S46 COMMON DRIVER + + - SHIFT REGISTER CLOCK GENERATOR OSC CONTROL REGISTER S33 33 S34 S35 S36 S37 S38 S39 S40 COM1 COM2 COM3 COM4/S41 KS1/S42 S42 KS2/S43 S43 KS3/S44 S44 48 KS4/S45 S45 S1/P1 S2/P2 S5 S4/P4 S40 COM3 COM4/S41 COM2 COM1 Block Diagram / Pin Configuration / Pin Description 49 32 S32 KS6/S47 S47 S31 KI1/S48 S48 S30 KI2/S49 S49 S29 KI3/S50 S50 S28 KI4/S51 S51 S27 KI5/S52 S52 S26 OSC S25 RESB S24 DO TEST S23 CSB S22 SCL S21 SD S20 VLCD S19 DO 3-SPI INTERFACE SD SCL KEY BUFFER VDD CSB S18 VSS VDD S17 16 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 P4/S4 P3/S3 KS6/S47 KS5/S46 KS4/S45 KS3/S44 KS2/S43 KS1/S42 KI5/S52 KI4/S51 KI3/S50 KI2/S49 KI1/S48 RESB P1/S1 KEY SCAN P2/S2 P.O.R 17 1 64 Figure 2. Block Diagram Figure 3. Pin Configuration (TOP VIEW) Terminal Terminal No. I/O Handling When Unused CSB SCL SD VDD 59 60 61 63 I I I - VDD VSS VSS - OSC 56 I/O OPEN/VSS DO 58 O OPEN RESB 57 I VDD VSS 64 - - VLCD COM1~COM3 62 41 to 43 O OPEN COM4/S41 44 O OPEN S1/P1~S4/P4 1 to 4 O OPEN S5~S40 5 to 40 O OPEN KS1/S42~KS6/S47 45 to 50 O OPEN KI1/S48~KI5/S52 51 to 55 I/O OPEN Functions Chip select : “L” active Serial data transfer clock Input serial data Power Supply for the logic External Clock Input: Fix to low or open when the internal clock mode setting. Output data Reset Input: RESB=“L” : Display is disabled. RESB=“H” : Display is controllable. However, serial data can not be transferred when RESB is “L”. Power supply pin. Must be connected to ground. Power Supply for the LCD driver COMMON output for LCD driver COMMON / SEGMENT output for LCD driver. Assigned as SEGMENT output in 1/3Duty mode. SEGMENT output for LCD driving / General Purpose Output S1/P1～S4/P4 pins can also be used as General Purpose Outputs when set up by the control data. SEGMENT output for LCD driver Key scan outputs Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these outputs will not be damaged by shorting when these outputs are used to form a key matrix. The KS1/S42 to KS6/S47 pins can be used as segment outputs when specified by the control data. Key scan inputs These pins have built-in pull-down resistors. The KI1/S48 to KI5/S52 pins can be used as segment outputs when specified by the control data. Table 1. Pin Description www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 2/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Absolute Maximum Ratings (Ta=25°C, VSS=0.0V) Parameters Symbol Ratings Unit Power Supply voltage 1 VDD -0.5 to +7.0 V Power supply Power Supply voltage 2 VLCD -0.5 to +7.0 V LCD drive voltage 1.00 (Note2) Power Dissipation Pd Input voltage range Operating temperature range Storage temperature range VIN -0.5 to VDD+0.5 V Topr -40 to +85 °C Tstg -55 to +125 °C Remarks W (Note2) When operated higher than Ta=25°C, subtract 10mW per degree. (Using ROHM standard board) (Board size: 70mm×70mm×1.6mm material: FR4 board copper foil: land pattern only) Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Recommended Operating Conditions Parameters Symbol Ratings MIN TYP MAX Unit Remarks Power Supply voltage 1 VDD 2.7 - 6.0 V Power supply Power Supply voltage 2 VLCD 4.5 - 6.0 V LCD driver voltage (Note3) The power supply condition shall be met VLCD ≥ VDD. Electrical Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, VDD=2.7 to 6.0V, VLCD=4.5 to 6.0V, VSS=0.0V) Limits Parameters Symbol Unit Conditions MIN TYP MAX “H” Input Voltage VIH 0.7VDD VDD V SD, SCL, CSB, RESB, OSC “L” Input Voltage VIL VSS 0.3VDD V SD, SCL, CSB, RESB, OSC “H” Input Current IIH 5.0 µA SD, SCL, CSB, RESB, OSC, VI=5.5V “L” Input Current IIL -5.0 µA SD, SCL, CSB, RESB, OSC, VI=0.0V Input Floating Voltage VIF 0.05VDD V KI1 to KI5 Pull-down Resistance RPD 50 100 250 kΩ KI1 to KI5, VLCD=5.0V Output Off Leakage Current IOFFH 6.0 µA DO, Vo=5.5V VOH1 VLCD-1.0 P1 to P4, Io=-1mA VOH2 VLCD-1.0 S1 to S52, Io=-20µA “H” Level Output Voltage V VOH3 VLCD-1.0 COM1 to COM4, Io=-100µA VOH4 VLCD-1.0 KS1 to KS6, Io=-500µA VOL1 1.0 P1 to P4, Io=1mA VOL2 1.0 S1 to S52, Io=20µA “L” Level Output Voltage V VOL3 1.0 COM1 to COM4, Io=100µA VOL4 1.0 KS1 to KS6, Io=25µA VOL5 0.5 DO, Io=1mA 1/2VLCD 1/2VLCD S1 to S52 VMID1 -1.0 +1.0 1/2 Bias, Io=±20µA 1/2VLCD 1/2VLCD COM1 to COM4 VMID2 -1.0 +1.0 1/2 Bias, Io=±100µA 2/3VLCD 2/3VLCD S1 to S52 VMID3 -1.0 +1.0 1/3 Bias, Io=±20µA LCD Bias Voltage V 1/3VLCD 1/3VLCD S1 to S52 VMID4 -1.0 +1.0 1/3 Bias, Io=±20µA 2/3VLCD 2/3VLCD COM1 to COM4 VMID5 -1.0 +1.0 1/3Bias, Io=±100µA 1/3VLCD 1/3VLCD COM1 to COM4 VMID6 -1.0 +1.0 1/3 Bias, Io=±100µA Input Pin ALL ”L” IstVDD 1 5 Display off, Disable oscillator Input Pin ALL ”L” IstVLCD 1 5 Display off, Disable oscillator VDD=VLCD=5.0V, Output unloaded µA Current Consumption IVDD1 2 10 fFR=80Hz VDD=VLCD=5.0V,Output unloaded IVLCD1 40 95 1/2 Bias, fFR=80Hz VDD=VLCD=5.0V, Output unloaded 65 140 IVLCD2 1/3 Bias, fFR=80Hz www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 3/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Electrical Characteristics – continued Oscillation Characteristics (Ta=-40°C to +85°C, VDD=2.7 to 6.0V, VLCD=4.5V to 6.0V, VSS=0.0V) Limits Parameters Symbol Unit Conditions MIN TYP MAX Frame Frequency1 fFR1 56 80 104 Hz Frame Frequency2 fFR2 68 80 92 Hz VLCD=4.5V to 6.0V, fFR = 80Hz setting VLCD=5.0V, fFR = 80Hz setting External clock mode External Clock Frequency fFR3 kHz 30 600 (DRV CTRL1 setting : P2P1=11) Frame frequency is decided external frequency and dividing ratio of DRV CTRL1 setting. 【Reference Data】 100 VDD = 4.0V Setting 90 VLCD = 6.0V fFR [Hz] VLCD = 5.0V 80 VLCD = 4.5V 70 60 -40 -20 0 20 40 60 80 Temperature[℃] Figure 4. Typical temperature characteristics MPU interface Characteristics (Ta=-40 to +85°C, VDD=2.7V to 6.0V, VLCD=4.5 to 6.0V, VSS=0.0V) Limits Parameters Symbol Unit Conditions MIN TYP MAX Input Rise Time tr - - 80 ns Input Fall Time tf - - 80 ns SCL Cycle Time tSCYC 400 - - ns “H” SCL Pulse Width tSHW 100 - - ns “L” SCL Pulse Width tSLW 100 - - ns SD Setup Time tSDS 20 - - ns SD Hold Time tSDH 20 - - ns CSB Setup Time tCSS 50 - - ns CSB Hold Time tCSH 50 - - ns “H” CSB Pulse Width tCHW 50 - - ns DO Output Delay Time tDC - - 1.5 µs DO RPU=4.7kΩ, CL=10pF (Note4) DO Rise Time tDR - - 1.5 µs DO RPU=4.7kΩ, CL=10pF (Note4) (Note4) Since DO can be an open-drain output; these values depend on the resistance of the pull-up resistor RPU and the load capacitance CL. tCHW CSB tCSS tCSH tr tSCYC tf tSLW SCL tSHW tSDS tSDH SD DO tDC tDR Figure 5. 3-wire Serial Interface Timing www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 4/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet I/O equivalent circuit ３ Figure 6. I/O equivalent circuit Function descriptions Command and Data Transfer Method 3-SPI (3-wire Serial Interface) This device is controlled by a 3-wire signal (CSB, SCL, and SD). First, Interface counter is initialized with CSB=“H" Setting CSB=”L” enables SD and SCL inputs. First, Interface counter is initialized with CSB=“H", and then CSB=”L” makes SD and SCL input enable. The protocol of 3-SPI transfer is shown as follows. Each command starts with D7 bit as MSB data, followed by D6 to D0 (this is while CSB =”L”). (Internal data is latched at the rising edge of SCL, then the data is converted to an 8-bit parallel data at the falling edge of the 8th CLK.) When you rise CSB = “H”, in case command less than 8bit, command and data are canceled. (1) Write Mode Figure 7. 3-SPI Data Transfer Format www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 5/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet (2) Read Mode (KEY RD command only) The following occurs when Key Read by KEY RD command. If KEY RD command is recognized at the rising edge of 8th CLK, it enters Read mode after the falling edge of 8th CLK and then key data is output through DO. Setting CSB=”H” can exit Read mode after or during Serial Data Transfer. Figure 8. Serial Data Output Format Command Transfer Method After CSB=”H”→”L”, the 1st byte shall be a command. Please refer to “Command Table”. When set command except Data write(DATAWR), the next byte will be (continuously) a command. When set DATAWR command, the following bytes will be display data bytes. Command Command Command Command Display Data … (DATAWR) Once it becomes display data transfer mode, it will not be able to send command. If you send command again, please rise CSB=”H”. Display Data Transfer Method This LSI has Display Data RAM (DDRAM) of 51×4=204bit. The relationship between data input and display data, DDRAM data and address are as follows. Command 00001010 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 … → Display Data Display data will be stored in DDRAM. The address to be written is specified by Address set (ADSET) command and the address is automatically incremented in every 4bit data if 1/4 Duty mode or in every 3 bit if 1/3 Duty mode respectively. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 6/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet 1/3 Duty Mode BIT DDRAM Address/Segment Outputs ... ... 27h 28h 29h 00h 01h 02h 31h 32h 33h 0 D1 D4 D7 D118 D121 D124 D148 D151 D154 COM1 1 D2 D5 D8 D119 D122 D125 D149 D152 D155 COM2 2 D3 D6 D9 D120 D123 D126 D150 D153 D156 COM3 S1 S2 S3 S40 S41 S42 S50 S51 S52 Transferred data is written to the DDRAM by every 3bits. The write operation is cancelled if it changes CSB=”L”→”H” before 3bits data transfer. 1/4 Duty Mode BIT DDRAM Address/ Segment Outputs ... ... 27h 28h 29h 00h 01h 02h 30h 31h 32h 0 D1 D5 D9 D157 D161 D165 D193 D197 D201 COM1 1 D2 D6 D10 D158 D162 D166 D194 D198 D202 COM2 2 D3 D7 D11 D159 D163 D167 D195 D199 D203 COM3 3 D4 D8 D12 D160 D164 D168 D196 D200 D204 COM4 S1 S2 S3 S40 S42 S43 S50 S51 S52 Transferred Data is written to the DDRAM by every 4bits. The write operation is cancelled if it changes CSB=”L”→”H” before 4bits data transfer. Relationship between Display Data and Segment Output Pins 1/3 Duty Mode output COM1 COM2 COM3 Address terminal output terminal COM1 COM2 COM3 address 1A S1/P1 D1 D2 D3 00 S27 D79 D80 D81 S2/P2 D4 D5 D6 01 S28 D82 D83 D84 1B S3/P3 D7 D8 D9 02 S29 D85 D86 D87 1C S4/P4 D10 D11 D12 03 S30 D88 D89 D90 1D S5 D13 D14 D15 04 S31 D91 D92 D93 1E S6 D16 D17 D18 05 S32 D94 D95 D96 1F S7 D19 D20 D21 06 S33 D97 D98 D99 20 S8 D22 D23 D24 07 S34 D100 D101 D102 21 S9 D25 D26 D27 08 S35 D103 D104 D105 22 S10 D28 D29 D30 09 S36 D106 D107 D108 23 S11 D31 D32 D33 0A S37 D109 D110 D111 24 S12 D34 D35 D36 0B S38 D112 D113 D114 25 S13 D37 D38 D39 0C S39 D115 D116 D117 26 S14 D40 D41 D42 0D S40 D118 D119 D120 27 S15 D43 D44 D45 0E COM4/S41 D121 D122 D123 28 S16 D46 D47 D48 0F KS1/S42 D124 D125 D126 29 S17 D49 D50 D51 10 KS2/S43 D127 D128 D129 2A S18 D52 D53 D54 11 KS3/S44 D130 D131 D132 2B S19 D55 D56 D57 12 KS4/S45 D133 D134 D135 2C S20 D58 D59 D60 13 KS5/S46 D136 D137 D138 2D S21 D61 D62 D63 14 KS6/S47 D139 D140 D141 2E S22 D64 D65 D66 15 KI1/S48 D142 D143 D144 2F S23 D67 D68 D69 16 KI2/S49 D145 D146 D147 30 S24 D70 D71 D72 17 KI3/S50 D148 D149 D150 31 S25 D73 D74 D75 18 KI4/S51 D151 D152 D153 32 S26 D76 D77 D78 19 KI5/S52 D154 D155 D156 33 (Note5) In case of S1/P1~S4/P4, COM4/S41, KS1/S42~KS6/S47 and KI1/S48~KI5/S52 are selected for segment output. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 7/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet For example, S11 output case Bits in a DDRAM Segment Output Pin (S11) D31 D32 D33 0 0 0 Off-state of the LCD elements corresponding to COM1, 2 and 3 0 0 1 On-state of the LCD element corresponding to COM3 0 1 0 On-state of the LCD element corresponding to COM2 0 1 1 On-state of the LCD elements corresponding to COM2 and 3 1 0 0 On-state of the LCD element corresponding to COM1 1 0 1 On-state of the LCD elements corresponding to COM1 and 3 1 1 0 On-state of the LCD elements corresponding to COM1 and 2 1 1 1 On-state of the LCD elements corresponding to COM1, 2 and 3 www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 8/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV 1/4 duty output terminal S1/P1 Datasheet D4 00 output terminal S27 COM1 COM2 COM3 COM4 D1 D2 D3 Address COM1 COM2 COM3 COM4 D105 D106 D107 D108 address 1A S2/P2 D5 D6 D7 D8 01 S28 D109 D110 D111 D112 1B S3/P3 D9 D10 D11 D12 02 S29 D113 D114 D115 D116 1C S4/P4 D13 D14 D15 D16 03 S30 D117 D118 D119 D120 1D S5 D17 D18 D19 D20 04 S31 D121 D122 D123 D124 1E S6 D21 D22 D23 D24 05 S32 D125 D126 D127 D128 1F S7 D25 D26 D27 D28 06 S33 D129 D130 D131 D132 20 S8 D29 D30 D31 D32 07 S34 D133 D134 D135 D136 21 S9 D33 D34 D35 D36 08 S35 D137 D138 D139 D140 22 S10 D37 D38 D39 D40 09 S36 D141 D142 D143 D144 23 S11 D41 D42 D43 D44 0A S37 D145 D146 D147 D148 24 S12 D45 D46 D47 D48 0B S38 D149 D150 D151 D152 25 S13 D49 D50 D51 D52 0C S39 D153 D154 D155 D156 26 S14 D53 D54 D55 D56 0D S40 D157 D158 D159 D160 27 S15 D57 D58 D59 D60 0E KS1/S42 D161 D162 D163 D164 28 S16 D61 D62 D63 D64 0F KS2/S43 D165 D166 D167 D168 29 S17 D65 D66 D67 D68 10 KS3/S44 D169 D170 D171 D172 2A S18 D69 D70 D71 D72 11 KS4/S45 D173 D174 D175 D176 2B S19 D73 D74 D75 D76 12 KS5/S46 D177 D178 D179 D180 2C S20 D77 D78 D79 D80 13 KS6/S47 D181 D182 D183 D184 2D S21 D81 D82 D83 D84 14 KI1/S48 D185 D186 D187 D188 2E S22 D85 D86 D87 D88 15 KI2/S49 D189 D190 D191 D192 2F S23 D89 D90 D91 D92 16 KI3/S50 D193 D194 D195 D196 30 S24 D93 D94 D95 D96 17 KI4/S51 D197 D198 D199 D200 31 KI5/S52 D201 D202 D203 D204 32 S25 D97 D98 D99 D100 18 S26 D101 D102 D103 D104 19 (Note6) In case of S1/P1~S4/P4, KS1/S42~KS6/S47 and KI1/S48~KI5/S52 are selected for segment output. For example, S11 output case Bits in the DDRAM Segment Output Pin (S11) D41 D42 D43 D44 0 0 0 0 Off-state of the LCD elements corresponding to COM1,2 ,3 and4 0 0 0 1 On-state of the LCD element corresponding to COM4 0 0 1 0 On-state of the LCD element corresponding to COM3 0 0 1 1 On-state of the LCD elements corresponding to COM3 and 4 0 1 0 0 On-state of the LCD element corresponding to COM2 0 1 0 1 On-state of the LCD elements corresponding to COM2 and 4 0 1 1 0 On-state of the LCD elements corresponding to COM2 and 3 0 1 1 1 On-state of the LCD elements corresponding to COM2,3 and 4 1 0 0 0 On-state of the LCD element corresponding to COM1 1 0 0 1 On-state of the LCD elements corresponding to COM1 and 4 1 0 1 0 On-state of the LCD elements corresponding to COM1 and 3 1 0 1 1 On-state of the LCD elements corresponding to COM1, 3 and 4 1 1 0 0 On-state of the LCD elements corresponding to COM1 and 2 1 1 0 1 On-state of the LCD elements corresponding to COM1,2 and 4 1 1 1 0 On-state of the LCD elements corresponding to COM1,2 and 3 1 1 1 1 On-state of the LCD elements corresponding to COM1,2 3 and 4 www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 9/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Serial Data Output Figure 9. Serial Data Output KD1 to KD30: Key Data SA: Sleep Acknowledge Data Key Data Read Command (KEY RD): 1000_0101 (Note7) If a key data operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data(SA) will be invalid. Output Data KD1 to KD30: Key Data When a key matrix of up to 30 keys is formed from the KS1 to KS6 output pins and the KI1 to KI5 input pins and one of those keys is pressed, the key output data corresponding to that key will be set to 1. The table shows the relationship between those pins and the key data bits. KS1 KI1 KI2 KI3 KI4 KI5 KD1 KD2 KD3 KD4 KD5 KS2 KD6 KD7 KD8 KD9 KD10 KS3 KD11 KD12 KD13 KD14 KD15 KS4 KD16 KD17 KD18 KD19 KD20 KS5 KD21 KD22 KD23 KD24 KD25 KS6 KD26 KD27 KD28 KD29 KD30 SA: Sleep Acknowledge Data This output data is used to set the state when the key is pressed. In this case, DO will go to the low level. If serial data is input during this period and the mode is set (normal mode or sleep mode), the IC will be set to that mode. SA is set to 0 in the sleep mode and to 1 in the normal mode. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 10/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Key Scan Operation Key Scan Timing The key scan period is 288T(s). To reliably determine the on/off state of the keys, the BU97501KV scans the keys twice and determines that a key has been pressed when the key data agrees. It outputs a key data read request (a low level on DO) 615T(s) after starting a key scan. If the key data does not agree and a key is pressed at that point, it scans the keys again. Thus, BU97501KV cannot detect a key press shorter than 615T(s). KS1 * KS2 * KS3 * KS4 * KS5 * 1 1 * 2 KS6 2 * 3 3 4 * 4 5 * 5 * 6 6 9216T[S] 576 T[S] T= 1 fosc Figure 10. Key Scan Timing Normal Mode KS1/S42 - KS6/S47 pins are set high. When a key is pressed, a key scan is started and the keys are scanned until all keys are released. Multiple key presses are recognized by determining whether multiple key data bits are set. If a key is pressed for longer than 615 T(s) (Where T=1/fosc (When External clock input, fosc is a quarter of external clock)), the BU97501KV outputs a key data read request (a low level on DO) to the controller. The controller acknowledges this request and reads the key data. However, if CSB is ”L” during a serial data transfer, DO will be set high. After the controller reads the key data, the key data read request is cleared (DO is set high) and BU97501KV performs another key scan. Also note that DO can be controlled to be an open-drain output or a CMOS output. If set to be an open-drain output, a pull-up resistor (between 1 and 10KΩ) is required. Figure 11. Key scan operation in normal mode www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 11/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Sleep Mode KS1/S42 - KS6/S47 pins are set high or low by SLP CTRL P3,P2 data. (Refer to the SLP CTRL description). If a key on one of the lines corresponding to a KS1 to KS6 pin which is set high is pressed, the oscillator on the OSC pin is started and a key scan is performed. Keys are scanned until all keys are released. Multiple key presses are recognized by determining whether multiple key data bits are set. If a key is pressed for longer than 615T(s)(Where T=1/fosc (When External clock input, fosc is a quarter of external clock)) the BU97501KV outputs a key data read request (a low level on DO) to the controller. The controller acknowledges this request and reads the key data. However, if CSB is ”L” during a serial data transfer, DO will be set high. After the controller reads the key data, the key data read request is cleared (DO is set high) and the BU97501KV performs another key scan. However, this does not clear sleep mode. Also note that DO can be controlled to be an open-drain output or a CMOS output. During open-drain output selection, DO is an open-drain output so a pull-up resistor (between 1 KΩ and 10KΩ) is required. Sleep mode key scan example Example: when SLP CTRL P3= [0], P2= [1] (sleep with only KS6 high) (Note8) These diodes are required to reliably recognize multiple key presses on the KS6 line when sleep mode state with only KS6 high, as in the above example. That is, these diodes prevent incorrect operations due to sneak currents in the KS6 key scan output signal when keys on the KS1 to KS5 lines are pressed at the same time. Figure 12. Key scan operation in sleep mode www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 12/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Multiple Key Presses Although the BU97501KV is capable of key scanning without inserting diodes for dual key presses, triple key presses on the KI1 to KI5 input pin lines, or multiple key presses on the KS1 to KS6 output pin lines, multiple presses other than these cases may result in keys that were not pressed recognized as having been pressed. Therefore, a diode must be inserted in series with each key. Applications that do not recognize multiple key presses of three or more keys should check the key data for three or more 1 bit and ignore such data. OSCILLATOR Several kinds of clock for logic and analog circuits are generated from internal oscillation circuit or external clock. The OSC pins are open if the internal oscillator is used. (Note9) To use external clock mode, please set in DRV CTRL1 command. OSC OSC OPEN BU97501KV Clock Input BU97501KV VSS Figure 13. Internal clock mode www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 Figure 14. External clock mode 13/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet LCD Driver Bias/Duty Circuit This LSI generates LCD driving voltage with on-chip Buffer AMP. And it can drive LCD at low power consumption. * 1/3 or 1/2Bias and line or frame inversion mode can be selected by DRV CTRL2. * 1/4 or 1/3Duty can be selected by DRV CTRL1 command. Refer to “LCD waveform” about each LCD waveform. LCD waveform 1/4duty, 1/3bias Line inversion Frame inversion Frame inversion Figure 15. LCD waveform in line inversion www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 14/30 Figure 16. LCD waveform in frame inversion TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet 1/4duty, 1/2bias Line inversion Frame inversion Figure 17. LCD waveform in line inversion www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 15/30 Figure 18. LCD waveform in frame inversion TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet 1/3duty, 1/3bias Line inversion Frame inversion Figure 19. LCD waveform in line inversion www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 16/30 Figure 20. LCD waveform in frame inversion TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet 1/3duty, 1/2bias Line inversion Frame inversion Figure 21. LCD waveform in line inversion www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 17/30 Figure 22. LCD waveform in frame inversion TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Command Table Command. BIN D4 D3 D7 D6 D5 D2 SLP CTRL 1 0 0 1 P3 P2 SEG CTRL 1 0 1 1 P3 DRV CTRL1 1 1 0 0 DRV CTRL2 1 1 0 DRV CTRL3 1 0 KEY RD 1 SWRST Descriptions D1 D0 * * Sleep Control P2 P1 * Segment Control P3 P2 P1 0 Drive Control1 （Duty Set, OSC Control） 1 0 P2 P1 0 Drive Control2 （Bias Set, Inversion Mode） 1 0 P3 P2 * 0 0 0 0 1 0 1 Key Data Read 1 1 1 1 0 0 0 1 Software Reset DISCTRL 1 1 1 1 1 0 P1 * Display Control （Display On/Off） ADSET 0 1 P5 P4 P3 P2 P1 DATA WR 0 0 0 0 1 0 1 P0 Drive Control3 （Keyscan Output Set, DO Set） P0 Address Set 0 Data Write (* : Don’t care) www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 18/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Detailed command description Sleep Control (SLP CTRL) MSB D7 1 D6 D5 D4 D3 D2 D1 0 0 1 P3 P2 * LSB D0 * (* : Don’t care) P3, P2: Normal mode/Sleep mode switching control data These control data bits select Key Scan Output Pins KS1 to KS6 States of during Key Scan Standby. Segment Control Output Pin States During Key Scan Reset Internal Conditions Mode outputs/Common bits Standby OSC Outputs P3 P2 KS1 KS2 KS3 KS4 KS5 KS6 0 0 Normal enabled Operating H H H H H H 0 1 Sleep L L L L L H ○ disabled 1 0 Sleep Low(VSS) L L L L H H 1 1 Sleep H H H H H H （Note10）When DRV CTRL3（P3, P2）=（1, 1）, KS1 to KS6 outputs are selected as Segment outputs. Segment Control (SEG CTRL) MSB D7 1 D6 D5 D4 D3 D2 D1 0 1 1 P3 P2 P1 LSB D0 * (* : Don’t care) P3 to P1 : Segment Output / General purpose output switching control data These control bits select the function of the S1/P1 to S4/P4 output pins. (Segment Output Pins or General Purpose Output Pins). Reset Control bits Status of the pins conditions P3 P2 P1 S1/P1 S2/P2 S3/P3 S4/P4 0 0 0 S1 S2 S3 S4 0 0 1 P1 S2 S3 S4 0 1 0 P1 P2 S3 S4 0 1 1 P1 P2 P3 S4 1 0 0 P1 P2 P3 P4 (Note11) Sn(n=1 to 4) Pn(n=1 to 4) ○ : assigned as a Segment Output pin : assigned as a General Purpose Output pin Relationship of bit assignment between general purpose output pin and bit in DDRAM Corresponding bit in DDRAM Output Pin 1/3 Duty 1/4 Duty S1/P1 D1 D1 S2/P2 D4 D5 S3/P3 D7 D9 S4/P4 D10 D13 In case of 1/4 Duty mode and S4/P4 is configured as a general purpose output pins. S4/P4 is set to HIGH (VLCD level) if D13 is set to “1” in DDRAM. S4/P4 is cleared to LOW (VSS level) if D13 is set to “0” in DDRAM. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 19/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Drive Control1 (DRV CTRL1) MSB D7 1 D6 D5 D4 D3 D2 D1 1 0 0 P3 P2 P1 LSB D0 0 P3: 1/3 duty drive or 1/4 duty drive switching control data This control data bit selects either 1/3 duty drive or 1/4 duty drive. Reset Status of (COM4/ P3 Duty mode S41) conditions 0 1/4 COM4 ○ 1 1/3 S41 (Note12) COM4: COMMON output S41: SEGMENT output P2,P1 : Frame frequency switching control data These control data bits select Frame frequency setting. Reset Setting P2 P1 conditions 80Hz 0 0 ○ 100Hz 0 1 120Hz External Clock input 1 0 1 1 Relationships between Frame frequency (fFR) and Divide number Divide number fFR [Hz] P2 P1 1/3 Duty 1/4 Duty 1/3 Duty 1/4 Duty 0 0 510 512 80 80 0 1 408 408 100 100 1 0 342 344 120 120 1 1 2040 2048 - - Formula to calculate Frame frequency from frequency and Divide number: “Frame frequency = frequency / Divide number” Ex) In case, 1/4 Duty mode,(P2,P1) = (0,0) fFR = 40.96[KHz] / 512 = 80[Hz] (Note13) Built-in Oscillator circuit frequency = 40.96 KHz (typ). Drive Control2 (DRV CTRL2) MSB D7 1 D6 D5 D4 D3 D2 D1 1 0 1 0 P2 P1 LSB D0 0 P2: 1/3 bias drive or 1/2 bias drive switching control data This control data bit selects either 1/3 bias drive or 1/2 bias drive. Reset P2 Bias mode conditions 0 1/2 1 1/3 ○ P1: Line Inversion or Frame Inversion switching control data This control data bit selects either line inversion drive or frame inversion drive. Inversion Reset P1 mode conditions 0 Line ○ 1 Frame www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 20/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Drive Control3 (DRV CTRL3) MSB D7 1 D6 D5 D4 D3 D2 D1 0 1 0 P3 P2 * LSB D0 P0 (* : Don’t care) P3 to P2: Key Scan output port/Segment output port switching control data These control data bits select Key Scan outputs or Segment outputs. Control Output Pin State Maximum Bits Number of KS1/ KS2/ KS3/ KS4/ KS5/ KS6/ Input keys P3 P2 S42 S43 S44 S45 S46 S47 0 0 KS1 KS2 KS3 KS4 KS5 KS6 30 0 1 S42 KS2 KS3 KS4 KS5 KS6 25 1 0 S42 S43 KS3 KS4 KS5 KS6 20 1 1 S42 S43 S44 S45 S46 S47 0 Reset Conditions ○ When (P3,P2)=(1,1), Keyscan doesn't function. Key scan pins are all segment outputs. Thus, maximum segment display number and RAM last address change based on this value. Control Bits P3 P2 0 0 1 1 0 1 0 1 Maximum Segment Display Number Status of Pins KS1/ S42 KS1 S42 S42 S42 KS2/ S43 KS2 KS2 S43 S43 KS3/ S44 KS3 KS3 KS3 S44 KS4/ S45 KS4 KS4 KS4 S45 KS5/ S46 KS5 KS5 KS5 S46 KS6/ S47 KS6 KS6 KS6 S47 Last Address 1/3 Duty 1/4 Duty 1/3 Duty 1/4 Duty 123 126 129 156 160 164 168 204 28h 29h 2Ah 33h 27h 28h 29h 32h P0: Output setting for DO This control data bit selects either open drain output or CMOS output. Reset P0 Setting Conditions 0 open drain output ○ 1 CMOS output Pull up resistor (1kΩ - 10kΩ) is required when selecting Open Drain Output setting for DO. Be careful the Pull up voltage not to be higher than VDD voltage. Key Data Read (KEY RD) MSB D7 1 D6 D5 D4 D3 D2 D1 0 0 0 0 1 0 LSB D0 1 Display Control (DISCTRL) MSB D7 1 D6 D5 D4 D3 D2 D1 1 1 1 1 0 P1 LSB D0 * (* : Don’t care) P1: Segment on/off control data This control data bit controls the on/off state of the segments. Reset Display status conditions P1 1 ON 0 OFF www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 ○ 21/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Software Reset (SWRST) MSB D7 1 D6 D5 D4 D3 D2 D1 1 1 1 0 0 0 LSB D0 1 This is the Software Reset command. After sending this command, each register, DDRAM data and DDRAM address are initialized. Address Set (ADSET) MSB D7 0 D6 D5 D4 D3 D2 D1 LSB D0 1 P5 P4 P3 P2 P1 P0 Address which could be set starts from 00(Hex) until RAM last address. Setting of values other than the above is not allowed. (Otherwise, address is set to 0.) Refer to “Display Data Transfer Method” for RAM last address. Data Write (DATAWR) MSB D7 0 D6 D5 D4 D3 D2 D1 0 0 0 1 0 1 LSB D0 0 Data transfer can be started by this command. Set the CSB pin to High to terminate the data transfer. Refer to “Command and Data Transfer Method”. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 22/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Initialize sequence Recommended sequence after Power-On to set this device to initial condition. Software reset sequence Power on ↓ CSB ‘H’ …Initialized I/F ↓ CSB ‘L’ …Start transferring I/F Data ↓ SWRST (execute Software Reset) ↓ DISCTRL (Display off) ↓ Set each Command ↓ DATA WR ↓ CSB ‘H’ ↓ CSB ‘L’ ↓ SLP CTRL ↓ DISCTRL (Display on) ↓ Start display Hardware reset sequence Power on ↓ RESB ‘L’ ↓ RESB ‘H’ ↓ CSB ‘H’ …Initialized I/F ↓ CSB ‘L’ …Start transferring I/F Data ↓ SWRST (execute Software Reset) ↓ DISCTRL (Display off) ↓ Set each Command ↓ DATA WR ↓ CSB ‘H’ ↓ CSB ‘L’ ↓ SLP CTRL ↓ DISCTRL (Display on) ↓ Start display (Note14) Each register value, DDRAM address and DDRAM data are random condition after power on till initialize sequence is executed. (Note15) Each register value, DDRAM address are reset by a hardware reset operation. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 23/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Cautions in Power-On Sequence Power-On Reset (POR) Circuit This LSI has “P.O.R” (Power-On Reset) circuit and Software Reset function. When the power is ON, IC internal circuit and reset pass through unstable low-voltage region. Internal IC is not totally reset because VDD rises and this may result to malfunction. Thus, POR circuit and function of software reset are installed in order to prevent this. Please follow the following recommended Power-On sequences to allow the reset action to complete. Set the power up conditions to meet the recommended tR, tF, tOFF, and Vbot spec below in order to ensure P.O.R operation. VDD tR tF tOFF tR, tF, tOFF, Vbot recommended conditions Vbot tR Less than 5ms tF Less than 5ms tOFF More than 150ms Vbot Less than 0.1V Figure 23. Power ON/OFF waveform If it is difficult to meet above conditions, execute the following sequence after Power-On. (1) Set CSB to High (2) Clear CSB to Low and then issue a SWRST command. VDD CSB Min 1ms Min 50ns SWRST Command Figure 24. SWRST Command Sequence Power Up Sequence and Power Down Sequence To prevent the malfunction, in power up sequence, VDD shall be turned on before VLCD. In power down sequence, VDD shall be turned off after VLCD. Please satisfies VLCD≥VDD、t1≧0ns t1 t1 VLCD VDD Figure 25. Power On/Off Sequence www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 24/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet DISPLAY DDRAM DATA EXAMPLE If LCD layout pattern is shown as in Figure 26 and 27 and DDRAM data is shown as in Table2, display pattern will be shown as in Figure 28. com1 com2 com3 com4 Figure 26. Example COM Line pattern S1 S5 S6 S3 S4 S2 S10 S8 S9 S7 Figure 27. Example of SEG Line pattern Figure 28. Example of display pattern S S S S S S S S S S S S S S S S S S S 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 S COM1 D0 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 COM2 D1 0 1 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 COM3 D2 0 0 1 0 1 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 COM4 D3 0 1 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h Table 2. DDRAM Data map www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 25/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply terminals. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the Pd rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Rush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 11. Unused Input Terminals Input terminals of an IC are often connected to the gate of a MOS transistor (CMOS?). The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to the power supply or ground line. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 26/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet 12. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input terminals have voltages within the values specified in the electrical characteristics of this IC. 13. Ceramic Capacitor When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others. 14. Area of Safe Operation (ASO) Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe Operation (ASO). 15. Thermal Shutdown Circuit(TSD) This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the TSD threshold, the circuits are automatically restored to normal operation. Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat damage. 16. Over Current Protection Circuit (OCP) This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in applications characterized by continuous operation or transitioning of the protection circuit. www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 27/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Ordering Information B U 9 7 5 0 1 K V Package Part Number KV : VQFP64 - E2 Packaging and forming specification E2: Embossed tape and reel (VQFP64) Marking Diagram(s)(TOP VIEW) VQFP64 (TOP VIEW) Part Number Marking BU97501KV LOT Number 1PIN MARK www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 28/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Physical Dimension, Tape and Reel Information Package Name VQFP64 1 PIN MARK （UNIT：mm） PKG：VQFP64 Drawing: EX252-5001-1 <Tape and Reel information> Tape Embossed carrier tape (with dry pack) Quantity 1000pcs Direction of feed E2 direction is the 1pin of product is at the upper left when you hold ( The ) reel on the left hand and you pull out the tape on the right hand Direction of feed 1pin Reel www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 ∗ Order quantity needs to be multiple of the minimum quantity. 29/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 BU97501KV Datasheet Version / Revision History Version date description st 001 07. Aug. 2013 1 ver 002 07. Nov. 2013 Page.4 Add Electrical Characteristics of External Clock Frequency Page.2 Modify Pin Description OSC, DO, RESB, VSS and S1/P1～S4/P4 Functions Page.3 Modify Absolute Maximum Ratings Power Dissipation Page.3 Modify Electrical Characteristics precondition Page.3 Modify Electrical Characteristics LCD Bias Voltage VMID1 Conditions Page.4 Modify Electrical Characteristics External Clock Frequency Symbol Page.4 Add Typical temperature characteristics VDD condition Page.4 Modify MPU Interface Characteristics tCHW Parameter name Page.4 Modify Figure 5 Title Page.5 Modify I/O equivalent circuit Page.5-6 Modify Command and Data Transfer Method description Page.6 Modify Command Transfer Method description Page.6 Modify Display Data Transfer Method description Page.10 Modify Serial Data Output description Page.10 Modify Output Data description Page.11-12 Modify Key Scan Operation description Page.14-17 Modify LCD Driver Bias/Duty Circuit figure Page.18 Modify Table name 003 31. Jan. 2014 Page.19 Minor translation change Sleep Control command description to have more conformity between Japanese and English version Page.19 Minor translation change Segment Control command description to have more conformity between Japanese and English version Page.20 Minor translation change Drive Control1 command description to have more conformity between Japanese and English version Page.20 Minor translation change Drive Control2 command description to have more conformity between Japanese and English version Page.21 Add Drive Control3 command description Page.21 Minor translation change Drive Control3 command description to have more conformity between Japanese and English version Page.22 Minor translation change Software command description to have more conformity between Japanese and English version Page.22 Delete Address Set command description Page.22 Minor translation change Address command description to have more conformity between Japanese and English version Page.22 Modify Data Write command description Page.23 Add Initialize sequence Note14, Note15 Page.29 Add Physical Dimension, Tape and Reel Information description Page.11 Add fosc explanation when External clock input 004 11.Apr.2014 Page.12 Add fosc explanation when External clock input Page.24 Add the condition when power up and power down www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 30/30 TSZ02201-0P4P0D300390-1-2 11.Apr.2014 Rev.004 Datasheet Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) , transport intend to use our Products in devices requiring extremely high reliability (such as medical equipment equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice – GE © 2013 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label QR code printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with ROHM representative in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable for infringement of any intellectual property rights or other damages arising from use of such information or data.: 2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the information contained in this document. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice – GE © 2013 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2014 ROHM Co., Ltd. All rights reserved. Rev.001