ON NCP1595AMNTWG 1 mhz, 1.5 a synchronous buck regulator Datasheet

NCP1595, NCP1595A,
NCP1595C
1 MHz, 1.5 A Synchronous
Buck Regulator
The NCP1595/A/C family are fixed 1 MHz, high−output−current,
synchronous PWM converters that integrate a low−resistance,
high−side P−channel MOSFET and a low−side N−channel MOSFET.
The NCP1595/A/C utilizes current mode control to provide fast
transient response and excellent loop stability. It regulates input
voltages from 4.0 V to 5.5 V down to an output voltage as low as 0.8 V
and is able to supply up to 1.5 A.
The NCP1595/A/C includes an internally fixed switching frequency
(FSW), and an internal soft−start to limit inrush currents. Using the EN
pin, shutdown supply current is reduced to 3 mA maximum.
Other features include cycle−by−cycle current limiting,
short−circuit protection and thermal shutdown.
Features
• Input Voltage Range: from 4.0 V to 5.5 V
• Internal 140 mW High−Side Switching P−Channel MOSFET and
•
•
•
•
•
•
•
•
•
90 mW Low−Side N−Channel MOSFET
Fixed 1 MHz Switching Frequency
Cycle−by−Cycle Current Limiting
Overtemperature Protection
Internal Soft−Start
Diode Emulation During Light Load (Disabled for NCP1595C)
Hiccup Mode Short−Circuit Protection
Start−up with Pre−Biased Output Load
Adjustable Output Voltage Down to 0.8 V
These are Pb−Free Devices
MARKING
DIAGRAM
1
XXXXX
ALYWG
G
DFN6
CASE 506AH
XXXXX = N1595, 1595A, 1595C
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
FB 1
6 NC
GND 2
5 VCC
LX 3
4 VCCP
NCP1595/NCP1595C
FB 1
6 EN
GND 2
Applications
•
•
•
•
•
•
•
•
•
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DSP Power
Hard Disk Drivers
Computer Peripherals
Home Audio
Set−Top Boxes
Networking Equipment
LCD TV
Wireless and DSL/Cable Modem
USB Power Devices
5 VCC
LX 3
4 VCCP
NCP1595A
ORDERING INFORMATION
Device
Package
Shipping†
NCP1595MNR2G
NCP1595MNT2G
NCP1595AMNR2G
NCP1595AMNTWG
DFN6
3000 / Tape & Reel
(Pb−Free)
NCP1595CMNTWG
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
April, 2013 − Rev. 10
1
Publication Order Number:
NCP1595/D
NCP1595, NCP1595A, NCP1595C
BLOCK DIAGRAM
NCP1595/A/C
VCCP
VCC
Power Reset
UVLO
THD
Hiccup
NC/EN
+
CA
−
OSC
+
PMOS
Soft−Start
M1
Vref
FB
−
PWM
+
+
+ gm
−
Control
Logic
LX
GND
Figure 1. Block Diagram
PIN DESCRIPTIONS
Pin No
Symbol
1
FB
2
GND
3
LX
4
VCCP
Power input for the power stage
5
VCC
Input supply pin for internal bias circuitry. A 0.1 mF ceramic bypass capacitor is preferred to connect
to this pin.
6
NC
No connection for NCP1595 or NCP1595C
EN
Logic input to enable the part. Logic high to turn on the part and logic low to shut off the part.
An internal pullup forces the part into an enable state when no external bias is present on the pin.
For NCP1595A only
PAD
Exposed pad of the package provides both electrical contact to the ground and good thermal contact
to the PCB. This pad must be soldered to the PCB for proper operation.
EP
Description
Feedback input pin of the Error Amplifier. Connect a resistor divider from the converter’s output
voltage to this pin to set the converter’s output voltage.
Ground pin. Connect to thermal pad.
The drains of the internal MOSFETs. The output inductor should be connected to this pin.
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NCP1595, NCP1595A, NCP1595C
APPLICATION CIRCUIT
Vin
4.0 V − 5.5 V
VCCP
VCC
NC/EN
LX
Vout
GND
FB
Figure 2. NCP1595/A/C
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Pin (Pin 4, 5) to GND
Vin
6.5
−0.3 (DC)
−1.0 (t < 100 ns)
V
LX to GND
LX
Vin + 0.7
Vin + 1.0 (t < 20 ns)
−0.7 (DC)
−5.0 (t < 100 ns)
V
6.0
−0.3 (DC)
−1.0 (t < 100 ns)
V
All other pins
Operating Temperature Range
TA
−40 to +85
°C
Junction Temperature
TJ
−40 to +150
°C
Storage Temperature Range
TS
−55 to +150
°C
RqJA
68.5
°C/W
Thermal Resistance Junction−to−Air (Note 1)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. RqJA measured on approximately 1x1 inch sq. of 1 oz. Copper.
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NCP1595, NCP1595A, NCP1595C
ELECTRICAL CHARACTERISTICS
(Vin = 4.0 V − 5.5 V, Vout = 1.2 V, TJ = +25°C for typical value; −40°C < TA < 85°C for min/max values unless noted otherwise)
Parameter
Vin Input Voltage Range (Note 2)
Symbol
Test Conditions
Vin
Min
Typ
4.0
VCC UVLO Threshold
3.2
UVLO Hysteresis
3.5
Max
Unit
5.5
V
3.8
V
335
mV
VCC Quiescent Current
IinVCC
Vin = 5 V,VFB = 1.5 V,
(No Switching)
1.7
2.0
VCCP Quiescent Current
IinVCCP
Vin = 5 V,VFB = 1.5 V,
(No Switching)
25
Vin Shutdown Supply Current (Note 3)
IQSHDN
(NCP1595A), EN = 0 V
1.8
3.0
mA
mA
mA
FEEDBACK VOLTAGE
Reference Voltage
VFB
Feedback Input Bias Current (Note 2)
IFB
0.788
Feedback Voltage Line Regulation (Note 3)
0.800
0.812
V
VFB = 0.8 V
10
100
nA
Vin = 4.0 V to 5.5 V
0.06
%/V
85
%
50
ns
PWM
Maximum Controllable Duty Cycle (regulating)
82
Minimum Controllable ON Time (Note 3)
PULSE−BY−PULSE CURRENT LIMIT
Pulse−by−Pulse Current Limit (Regulation)
ILIM
2.7
3.9
4.3
A
Pulse−by−Pulse Current Limit (Soft−Start)
ILIMSS
4.0
5.3
6.1
A
FSW
0.87
1.0
1.13
MHz
140
200
mW
10
mA
90
125
mW
10
mA
OSCILLATOR
Oscillator Frequency
MOSFET
High Side MOSFET ON Resistance (Note 2)
High Side MOSFET Leakage (Note 3)
Low Side MOSFET ON Resistance (Note 2)
Low Side MOSFET Leakage (Note 3)
RDS(on)
HS
IDS = 100 mA, VGS = 5 V
RDS(on)
LS
IDS = 100 mA, VGS = 5 V
VEN = 0 V, VSW = 0 V
VEN = 0 V, VSW = 5 V
ENABLE (NCP1595A)
EN HI Threshold
ENHI
(NCP1595A)
EN LO Threshold
ENLO
(NCP1595A)
1.4
V
0.4
V
EN Hysteresis
(NCP1595A)
200
EN Pullup Current
(NCP1595A)
1.4
mV
FSW = 1 MHz
1.0
ms
2.0
ms
Thermal Shutdown Threshold (Note 3)
185
°C
Thermal Shutdown Hysteresis (Note 3)
40
°C
3.0
mA
SOFT−START
Soft−Start Ramp Time (Note 3)
tSS
Hiccup Timer (Note 3)
THERMAL SHUTDOWN
2. Guaranteed by characterization. Not production tested.
3. Guaranteed by design. Not production tested.
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NCP1595, NCP1595A, NCP1595C
TYPICAL OPERATING CHARACTERISTICS
3.7
VFB, FB INPUT THRESHOLD (V)
815
3.6
UVLO (V)
3.5
UVLO Rising Threshold
3.4
3.3
UVLO Falling Threshold
3.2
3.1
−40
−15
10
35
60
800
795
790
35
60
Figure 3. Undervoltage Lockout vs.
Temperature
Figure 4. Feedback Input Threshold vs.
Temperature
85
6.0
1.1
1.0
0.9
0.8
−15
10
35
5.0
4.5
ILIM (Regulation)
4.0
3.5
−40
85
60
ILIM (Soft−Start)
5.5
−15
10
35
60
85
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 5. Switching Frequency vs.
Temperature
Figure 6. Current Limit vs. Temperature
2.0
2.0
1.8
1.8
ICC, DISABLED (mA)
ICC, SWITCHING (mA)
10
TA, AMBIENT TEMPERATURE (°C)
1.2
1.6
1.4
1.2
1.0
−40
−15
TA, AMBIENT TEMPERATURE (°C)
ILIM, CURRENT LIMIT (A)
fSW, SWITCH FREQUENCY (MHz)
805
785
−40
85
1.3
0.7
−40
810
1.6
1.4
1.2
−15
10
35
1.0
−40
85
60
−15
10
35
60
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 7. Quiescent Current Into VCC vs.
Temperature
Figure 8. Quiescent Current Into VCC vs.
Temperature
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85
NCP1595, NCP1595A, NCP1595C
TYPICAL OPERATING CHARACTERISTICS
3.38
3.36
3.34
100
VOUT = 3.3 V
L = 3.3 mH
COUT = 2 x 22 mF
3.30
VIN = 5.0 V
3.26
VIN = 4.0 V
3.24
70
60
50
40
VOUT = 3.3 V
L = 3.3 mH
COUT = 2 x 22 mF
30
3.22
3.20
VIN = 5.0 V
80
3.32
3.28
VIN = 4.0 V
90
EFFICIENCY (%)
VOUT, OUTPUT VOLTAGE (V)
3.40
20
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
0.1
Figure 9. Load Regulation for VOUT = 3.3 V
1.84
100
VOUT = 1.8 V
L = 3.3 mH
COUT = 2 x 22 mF
1.82
80
VIN = 5.0 V
1.80
1.78
VIN = 4.0 V
1.76
1.74
VIN = 5.0 V
70
60
50
40
VOUT = 1.8 V
L = 3.3 mH
COUT = 2 x 22 mF
30
1.72
1.70
VIN = 4.0 V
90
EFFICIENCY (%)
VOUT, OUTPUT VOLTAGE (V)
1.86
20
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
IOUT, OUTPUT CURRENT (A)
1.22
90
VIN = 5.0 V
VIN = 4.0 V
1.16
1.14
VIN = 5.0 V
70
60
50
40
VOUT = 1.2 V
L = 3.3 mH
COUT = 2 x 22 mF
30
1.12
1.10
VIN = 4.0 V
80
1.20
1.18
10
100
VOUT = 1.2 V
L = 3.3 mH
COUT = 2 x 22 mF
EFFICIENCY (%)
VOUT, OUTPUT VOLTAGE (V)
1.24
1
Figure 12. Efficiency vs. Output Current for
VOUT = 1.8 V
1.30
1.26
0.1
IOUT, OUTPUT CURRENT (A)
Figure 11. Load Regulation for VOUT = 1.8 V
1.28
10
Figure 10. Efficiency vs. Output Current for
VOUT = 3.3 V
1.90
1.88
1
IOUT, OUTPUT CURRENT (A)
IOUT, OUTPUT CURRENT (A)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
20
0.01
IOUT, OUTPUT CURRENT (A)
0.1
1
IOUT, OUTPUT CURRENT (A)
Figure 13. Load Regulation for VOUT = 1.2 V
Figure 14. Efficiency vs. Output Current for
VOUT = 1.2 V
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10
NCP1595, NCP1595A, NCP1595C
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: LX Pin Switching Waveform, 2 V/div
Middle Trace: Output Ripple Voltage, 20 mV/div
Lower Trace: Inductor Current, 1 A/div
Time Scale: 1.0 ms/div
(VIN = 5 V, ILOAD = 700 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: LX Pin Switching Waveform, 2 V/div
Middle Trace: Output Ripple Voltage, 20 mV/div
Lower Trace: Inductor Current, 1 A/div
Time Scale: 1.0 ms/div
Figure 15. DCM Switching Waveform for
VOUT = 3.3 V
Figure 16. CCM Switching Waveform for
VOUT = 3.3 V
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: LX Pin Switching Waveform, 2 V/div
Middle Trace: Output Ripple Voltage, 20 mV/div
Lower Trace: Inductor Current, 200 mA/div
Time Scale: 1.0 ms/div
(VIN = 5 V, ILOAD = 400 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: LX Pin Switching Waveform, 2 V/div
Middle Trace: Output Ripple Voltage, 20 mV/div
Lower Trace: Inductor Current, 1 A/div
Time Scale: 1.0 ms/div
Figure 17. DCM Switching Waveform for
VOUT = 1.2 V
Figure 18. CCM Switching Waveform for
VOUT = 1.2 V
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: EN Pin Voltage, 2 V/div
Middle Trace: Output Voltage, 1 V/div
Lower Trace: Inductor Current, 100 mA/div
Time Scale: 500 ms/div
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: EN Pin Voltage, 2 V/div
Middle Trace: Output Voltage, 1 V/div
Lower Trace: Inductor Current, 100 mA/div
Time Scale: 500 ms/div
Figure 19. Soft−Start Waveforms for VOUT = 3.3 V
Figure 20. Soft−Start Waveforms for VOUT = 1.2 V
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NCP1595, NCP1595A, NCP1595C
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: Output Dynamic Voltage, 100 mV/div
Lower Trace: Output Current, 500 mA/div
Time Scale: 200 ms/div
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)
Upper Trace: Output Dynamic Voltage, 100 mV/div
Lower Trace: Output Current, 500 mA/div
Time Scale: 200 ms/div
Figure 21. Transient Response for VOUT =
3.3 V
Figure 22. Transient Response for VOUT =
3.3 V
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 H, COUT = 2 x 22 mF)
Upper Trace: Output Dynamic Voltage, 100 mV/div
Lower Trace: Output Current, 500 mA/div
Time Scale: 200 ms/div
(VIN = 5 V, ILOAD = 100 mA, L = 3.3 H, COUT = 2 x 22 mF)
Upper Trace: Output Dynamic Voltage, 100 mV/div
Lower Trace: Output Current, 500 mA/div
Time Scale: 200 ms/div
Figure 23. Transient Response for VOUT =
1.2 V
Figure 24. Transient Response for VOUT =
1.2 V
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NCP1595, NCP1595A, NCP1595C
DETAILED DESCRIPTION
Overview
Output MOSFETs
The NCP1595/A/C is a synchronous PWM controller that
incorporates all the control and protection circuitry
necessary to satisfy a wide range of applications. The
NCP1595/A/C employs current mode control to provide fast
transient response, simple compensation, and excellent
stability. The features of the NCP1595/A/C include a
precision reference, fixed 1 MHz switching frequency, a
transconductance error amplifier, an integrated high−side
P−channel MOSFET and low−side N−Channel MOSFET,
internal soft−start, and very low shutdown current. The
protection features of the NCP1595/A/C include internal
soft−start, pulse−by−pulse current limit, and thermal
shutdown.
The NCP1595/A/C includes low RDS(on), both high−side
P−channel and low−side N−channel MOSFETs capable of
delivering up to 1.5 A of current. When the controller is
disabled or during a Fault condition, the controller’s output
stage is tri−stated by turning OFF both the upper and lower
MOSFETs.
Adaptive Dead Time Gate Driver
In a synchronous buck converter, a certain dead time is
required between the low side drive signal and high side
drive signal to avoid shoot through. During the dead time,
the body diode of the low side FET freewheels the current.
The body diode has much higher voltage drop than that of
the MOSFET, which reduces the efficiency significantly.
The longer the body diode conducts, the lower the
efficiency. In NCP1595/A/C, the drivers and MOSFETs are
integrated in a single chip. The parasitic inductance is
minimized. Adaptive dead time control method is used to
prevent the shoot through from happening and minimizing
the diode conduction loss at the same time.
Reference Voltage
The NCP1595/A/C incorporates an internal reference that
allows output voltages as low as 0.8 V. The tolerance of the
internal reference is guaranteed over the entire operating
temperature range of the controller. The reference voltage is
trimmed using a test configuration that accounts for error
amplifier offset and bias currents.
Pulse Width Modulation
A high−speed PWM comparator, capable of pulse widths
as low as 50 ns, is included in the NCP1595/A/C. The
inverting input of the comparator is connected to the output
of the error amplifier. The non−inverting input is connected
to the the current sense signal. At the beginning of each
PWM cycle, the CLK signal sets the PWM flip−flop and the
upper MOSFET is turned ON. When the current sense signal
rises above the error amplifier’s voltage then the comparator
will reset the PWM flip−flop and the upper MOSFET will
be turned OFF.
Oscillator Frequency
A fixed precision oscillator is provided. The oscillator
frequency range is 1 MHz with $13% variation.
Transconductance Error Amplifier
The transconductance error amplifier’s primary function
is to regulate the converter’s output voltage using a resistor
divider connected from the converter’s output to the FB pin
of the controller, as shown in the applications Schematic. If
a Fault occurs, the amplifier’s output is immediately pulled
to GND and PWM switching is inhibited.
Current Sense
Internal Soft−Start
The NCP1595/A/C monitors the current in the upper
MOSFET. The current signal is required by the PWM
comparator and the pulse−by−pulse current limiter.
To limit the startup inrush current, an internal soft start
circuit is used to ramp up the reference voltage from 0 V to
its final value linearly. The internal soft start time is 1 ms
typically.
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NCP1595, NCP1595A, NCP1595C
PROTECTIONS
Undervoltage Lockout (UVLO)
dissipation during a short circuit. It also allows for much
improved system up−time, allowing auto−restart upon
removal of a temporary short−circuit.
The under voltage lockout feature prevents the controller
from switching when the input voltage is too low to power
the internal power supplies and reference. Hysteresis must
be incorporated in the UVLO comparator to prevent IxR
drops in the wiring or PCB traces from causing ON/OFF
cycling of the controller during heavy loading at power up
or power down.
Power Save Mode
If the load current decreases, the converter can skip
switching and operate with reduced frequency. This
minimizes the quiescent current and maintains high
efficiency. NCP1595C disables this feature.
Overcurrent Protection (OCP)
Pre−Bias Startup
NCP1595/A/C detects high side switch current and then
compares to a voltage level representing the overcurrent
threshold limit. If the current through the high side FET
exceeds the overcurrent threshold limit for seven
consecutive switching cycles, overcurrent protection is
triggered.
Once the overcurrent protection occurs, hiccup mode
engages. First, hiccup mode, turns off both FETs and
discharges the internal compensation network at the output
of the OTA. Next, the IC waits typically 2 ms and then resets
the overcurrent counter. After this reset, the circuit attempts
another normal soft−start. During soft−start, the overcurrent
protection threshold is increased to prevent false
overcurrent detection while charging the output capacitors.
Hiccup mode reduces input supply current and power
In some applications the controller will be required to start
switching when it’s output capacitors are charged anywhere
from slightly above 0 V to just below the regulation voltage.
This situation occurs for a number of reasons: the
converter’s output capacitors may have residual charge on
them or the converter’s output may be held up by a low
current standby power supply. NCP1595/A/C supports
pre−bias start up by holding switching off until the soft−start
ramp reaches the FB Pin voltage.
Thermal Shutdown
The NCP1595/A/C protects itself from over heating with
an internal thermal monitoring circuit. If the junction
temperature exceeds the thermal shutdown threshold both
the upper and lower MOSFETs will be shut OFF.
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NCP1595, NCP1595A, NCP1595C
APPLICATION INFORMATION
Programming the Output Voltage
The output voltage is set using a resistive voltage divider
from the output voltage to FB pin (see Figure 25). So the
output voltage is calculated according to Eq.1.
V out + V FB @
R 1 ) R2
C OUT(min) +
(eq. 3)
8 @ f @ V ripple
Where Vripple is the allowed output voltage ripple.
The required ESR for this amount of ripple can be
calculated by equation 5.
(eq. 1)
R2
I ripple
ESR +
Vout
V ripple
(eq. 4)
Iripple
Based on Equation 2 to choose capacitor and check its
ESR according to Equation 3. If ESR exceeds the value from
Eq.4, multiple capacitors should be used in parallel.
Ceramic capacitor can be used in most of the applications.
In addition, both surface mount tantalum and through−hole
aluminum electrolytic capacitors can be used as well.
R1
FB
R2
Maximum Output Capacitor
NCP1595/A/C family has internal 1 ms fixed soft−start
and overcurrent limit. It limits the maximum allowed output
capacitor to startup successfully. The maximum allowed
output capacitor can be determined by the equation:
Figure 25. Output divider
Inductor Selection
The inductor is the key component in the switching
regulator. The selection of inductor involves trade−offs
among size, cost and efficiency. The inductor value is
selected according to the equation 2.
L+
V out
f @ Iripple
ǒ
@ 1*
V out
V in(max)
Ǔ
C out(max) +
I lim(min) * I load(max) *
Di p−p
2
V outńT SS(min)
(eq. 5)
Where TSS(min) is the minimum soft−start period (1ms);
DiPP is the current ripple.
This is assuming that a constant load is connected. For
example, with 3.3 V/2.0 A output and 20% ripple, the max
allowed output capacitors is 546 mF.
(eq. 2)
Where Vout − the output voltage;
f − switching frequency, 1.0 MHz;
Iripple − Ripple current, usually it’s 20% − 30% of output
current;
Vin(max) − maximum input voltage.
Choose a standard value close to the calculated value to
maintain a maximum ripple current within 30% of the
maximum load current. If the ripple current exceeds this
30% limit, the next larger value should be selected.
The inductor’s RMS current rating must be greater than
the maximum load current and its saturation current should
be about 30% higher. For robust operation in fault conditions
(start−up or short circuit), the saturation current should be
high enough. To keep the efficiency high, the series
resistance (DCR) should be less than 0.1 W, and the core
material should be intended for high frequency applications.
Input Capacitor Selection
The input capacitor can be calculated by Equation 6.
C in(min) + Iout(max) @ D max @
1
f @ V in(ripple)
(eq. 6)
Where Vin(ripple) is the required input ripple voltage.
D max +
V out
V in(min)
is the maximum duty cycle.
(eq. 7)
Power Dissipation
The NCP1595/A/C is available in a thermally enhanced
6−pin, DFN. When the die temperature reaches +185°C, the
NCP1595/A/C shuts down (see the Thermal−Overload
Protection section). The power dissipated in the device is the
sum of the power dissipated from supply current (PQ),
power dissipated due to switching the internal power
MOSFET (PSW), and the power dissipated due to the RMS
current through the internal power MOSFET (PON). The
total power dissipated in the package must be limited so the
junction temperature does not exceed its absolute maximum
rating of +150°C at maximum ambient temperature.
Output Capacitor Selection
The output capacitor acts to smooth the dc output voltage
and also provides energy storage. So the major parameter
necessary to define the output capacitor is the maximum
allowed output voltage ripple of the converter. This ripple is
related to capacitance and the ESR. The minimum
capacitance required for a certain output ripple can be
calculated by Equation 4.
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11
NCP1595, NCP1595A, NCP1595C
qJC is the junction−to−case thermal resistance equal to
1.7°C/W. TC is the temperature of the case and TJ is the
junction temperature, or die temperature. The
case−to−ambient thermal resistance is dependent on how
well heat can be transferred from the PC board to the air.
Solder the underside−exposed pad to a large copper GND
plane. If the die temperature reaches +185°C the
NCP1595/A/C shut down and does not restart again until the
die temperature cools by 40°C.
Calculate the power lost in the NCP1595/A/C using the
following equations:
1. High side MOSFET
The conduction loss in the top switch is:
P HSON + I
Where:
I RMS_FET +
2
R DS(on)HS
RMS_HSFET
Ǹǒ
Iout 2 )
DI PP
12
Ǔ
(eq. 8)
2
D
(eq. 9)
Layout Consideration
As with all high frequency switchers, when considering
layout, care must be taken in order to achieve optimal
electrical, thermal and noise performance. For 1.0MHz
switching frequency, switch rise and fall times are typically
in few nanosecond range. To prevent noise both radiated and
conducted the high speed switching current path must be
kept as short as possible. Shortening the current path will
also reduce the parasitic trace inductance of approximately
25 nH/inch. At switch off, this parasitic inductance
produces a flyback spike across the NCP1595/A/C switch.
When operating at higher currents and input voltages, with
poor layout, this spike can generate voltages across the
NCP1595/A/C that may exceed its absolute maximum
rating. A ground plane should always be used under the
switcher circuitry to prevent interplane coupling and overall
noise.
The FB component should be kept as far away as possible
from the switch node. The ground for these components
should be separated from the switch current path. Failure to
do so will result in poor stability or subharmonic like
oscillation.
Board layout also has a significant effect on thermal
resistance. Reducing the thermal resistance from ground pin
and exposed pad onto the board will reduce die temperature
and increase the power capability of the NCP1595/A/C. This
is achieved by providing as much copper area as possible
around the exposed pad. Adding multiple thermal vias under
and around this pad to an internal ground plane will also
help. Similar treatment to the inductor pads will reduce any
additional heating effects.
DIPP is the peak−to−peak inductor current ripple.
The power lost due to switching the internal power high side
MOSFET is:
P HSSW +
V in @ I out @ ǒt r ) t fǓ @ f SW
(eq. 10)
2
tr and tf are the rise and fall times of the internal power
MOSFET measured at SW node.
2. Low side MOSFET
The power dissipated in the top switch is:
P LSON + I RMS_LSFET 2 @ R DS(on)LS
Where:
I RMS_LSFET +
Ǹǒ
I out 2 )
DI PP
12
Ǔ
(eq. 11)
2
@ (1 * D)
(eq. 12)
DIPP is the peak−to−peak inductor current ripple.
The switching loss for the low side MOSFET can be
ignored.
The power lost due to the quiescent current (IQ) of the device
is:
P Q + V in @ I Q
(eq. 13)
IQ is the switching quiescent current of the NCP1595/A/C.
P TOTAL + P HSON ) P HSSW ) P LSON ) P Q
(eq. 14)
Calculate the temperature rise of the die using the following
equation:
T J + TC ) ǒP TOTAL @ q JCǓ
(eq. 15)
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12
NCP1595, NCP1595A, NCP1595C
PACKAGE DIMENSIONS
DFN6 3x3, 0.95P
CASE 506AH
ISSUE O
A
D
PIN 1
REFERENCE
2X
0.15 C
2X
0.15 C
NOTES:
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMESNION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30
MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
B
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
E
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
TOP VIEW
0.10 C
A
6X
0.08 C
(A3)
SIDE VIEW
6X
A1
SOLDERING FOOTPRINT*
D2
L
e
1
6X
SEATING
PLANE
C
MILLIMETERS
MIN
NOM MAX
0.80
0.90
1.00
0.00
0.03
0.05
0.20 REF
0.35
0.40
0.45
3.00 BSC
2.40
2.50
2.60
3.00 BSC
1.50
1.60
1.70
0.95 BSC
0.21
−−−
−−−
0.30
0.40
0.50
0.450
0.0177
4X
3
0.950
0.0374
E2
K
6
1.700
0.685
3.31
0.130
4
6X
b
(NOTE 3)
0.10 C A B
BOTTOM VIEW
0.05 C
0.63
0.025
2.60
0.1023
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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13
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NCP1595/D