FSL176MRT Green-Mode Fairchild Power Switch (FPS™) Features Description Advanced Soft Burst-Mode Operation for The FSL176MRT is an integrated Pulse Width Modulation (PWM) controller and SenseFET specifically designed for offline Switched-Mode Power Supplies (SMPS) with minimal external components. The PWM controller includes an integrated fixed-frequency oscillator, Under-Voltage Lockout (UVLO), LeadingEdge Blanking (LEB), optimized gate driver, internal soft-start, temperature-compensated precise current sources for loop compensation, and self-protection circuitry. Compared with a discrete MOSFET and PWM controller solution, the FSL176MRT can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. This device provides a basic platform for cost-effective design of a flyback converter. Low Standby Power and Low Audible Noise Random Frequency Fluctuation for Low EMI Pulse-by-Pulse Current Limit Various Protection Functions: Overload Protection (OLP), Over-Voltage Protection (OVP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD) with Hysteresis, Output-Short Protection (OSP), and Under-Voltage Lockout (UVLO) with Hysteresis Low Operating Current (0.4mA) in Burst Mode Internal Startup Circuit Internal High-Voltage SenseFET: 650V Built-in Soft-Start: 15ms Auto-Restart Mode Applications Power Supply for LCD Monitor, STB, and DVD Combination Ordering Information (2) Output Power Table Part Number Package Operating Current RDS(ON) Junction Limit (Max.) Temperature TO-220 6-Lead(1) FSL176MRTUDTU UForming -40°C ~ +125°C 3.50A 1.6Ω 230VAC ±15%(3) Adapter(4) 80W 85~265VAC Open Open (4) (5) Adapter (5) Frame Frame 90W 48W 70W Replaces Device FSGM0765R Notes: 1. Pb-free package per JEDEC J-STD-020B. 2. The junction temperature can limit the maximum output power. 3. 230VAC or 100/115VAC with voltage doubler. 4. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient temperature. 5. Maximum practical continuous power in an open-frame design at 50C ambient temperature. © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) August 2012 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Application Circuit VO AC IN VSTR Drain GND FB VCC Figure 1. Typical Application Circuit Internal Block Diagram VSTR VCC Drain 6 3 1 ICH VBURST 0.30V / 0.45V Vref Soft Burst VCC Good 7.5V / 12V Random VCC Vref 2.0µA IDELAY FB OSC 90µA IFB Soft-Start PWM 4 S Q R Q Gate Driver 3R R N.C. LEB (300ns) 5 tON<tOSP(1.0μs) LPF VAOCP 2 GND VOSP VSD TSD 7.0V VCC Good S Q R Q VCC VOVP 24.5V Figure 2. © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 Internal Block Diagram www.fairchildsemi.com 2 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name 1 Drain SenseFET Drain. High-voltage power SenseFET drain connection. 2 GND Ground. This pin is the control ground and the SenseFET source. 3 VCC Power Supply. This pin is the positive supply input, which provides the internal operating current for both startup and steady-state operation. 4 FB Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 7V, the overload protection triggers, which shuts down the FPS. 5 NC No Connection VSTR Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source (ICH) is disabled. 6 Description © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Pin Configuration www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VSTR VSTR Pin Voltage 650 V VDS Drain Pin Voltage 650 V VCC VCC Pin Voltage VFB Feedback Pin Voltage IDM Drain Current Pulsed IDS Continuous Switching Drain Current(6) EAS PD TJ TSTG ESD 26 V 12.0 V 12.8 A TC=25C 6.4 A TC=100C 4.0 A 390 mJ -0.3 (7) Single Pulsed Avalanche Energy Total Power Dissipation (TC=25C) (8) Maximum Junction Temperature 50 W 150 C Operating Junction Temperature(9) -40 +125 C Storage Temperature -55 +150 C Electrostatic Discharge Capability Human Body Model, JESD22-A114 4.5 Charged Device Model, JESD22-C101 2.0 kV Notes: 6. Repetitive peak switching current when the inductive load is assumed: Limited by maximum duty (DMAX=0.74) and junction temperature (see Figure 4. ). 7. L=45mH, starting TJ=25C. 8. Infinite cooling condition (refer to the SEMI G30-88). 9. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics. Figure 4. FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Absolute Maximum Ratings Repetitive Peak Switching Current Thermal Impedance TA=25°C unless otherwise specified. Symbol Parameter (10) Value Unit θJA Junction-to-Ambient Thermal Impedance 63.5 °C/W θJC Junction-to-Case Thermal Impedance(11) 2.5 °C/W Notes: 10. Free standing without heat sink under natural convection condition, per JEDEC 51-2 and 1-10. 11. Infinite cooling condition per Mil Std. 883C method 1012.1. © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 4 TJ = 25C unless otherwise specified. Symbol Parameter Conditions Min. 650 Typ. Max. Unit SenseFET Section BVDSS Drain-Source Breakdown Voltage VCC = 0V, ID = 250A IDSS Zero-Gate-Voltage Drain Current VDS = 520V, TA = 125C RDS(ON) V 250 1.6 A Drain-Source On-State Resistance VGS=10V, ID =1A 1.3 CISS Input Capacitance(12) VDS = 25V, VGS = 0V, f=1MHz 674 pF Ω COSS Output Capacitance(12) VDS = 25V, VGS = 0V, f=1MHz 93 pF tr Rise Time VDS = 325V, ID = 4A, RG=25Ω 30 ns tf Fall Time VDS = 325V, ID = 4A, RG=25Ω 26 ns td(on) Turn-On Delay VDS = 325V, ID = 4A, RG=25Ω 16 ns td(off) Turn-Off Delay VDS = 325V, ID= 4A, RG=25Ω 39 ns Control Section fS fS Switching Frequency(12) VCC = 14V, VFB = 4V (12) 61 67 73 kHz ±5 ±10 % 67 73 % Switching Frequency Variation -25C < TJ < 125C DMAX Maximum Duty Ratio VCC = 14V, VFB = 4V DMIN Minimum Duty Ratio VCC = 14V, VFB = 0V Feedback Source Current VFB=0V 65 90 115 A VFB = 0V, VCC Sweep 11 12 13 V After Turn-On, VFB = 0V 7.0 7.5 8.0 IFB VSTART VSTOP tS/S UVLO Threshold Voltage Internal Soft-Start Time 61 % VSTR = 40V, VCC Sweep 15 V FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Electrical Characteristics ms Burst-Mode Section VBURH VBURL Burst-Mode Voltage VCC = 14V, VFB Sweep 0.39 0.45 0.51 V 0.26 0.30 0.34 V VHys 150 mV Protection Section ILIM Peak Drain Current Limit VSD IDELAY di/dt = 300mA/s 3.15 3.50 3.85 Shutdown Feedback Voltage VCC = 14V, VFB Sweep 6.45 7.00 7.55 V Shutdown Delay Current VCC = 14V, VFB = 4V 1.2 2.0 2.8 A (12)(14) tLEB Leading-Edge Blanking Time VOVP Over-Voltage Protection tOSP VOSP tOSP_FB TSD THys Output-Short Protection(12) Threshold Time Threshold VFB VFB Blanking Time Thermal Shutdown Temperature(12) 300 VCC Sweep OSP Triggered when tON<tOSP & VFB>VOSP (Lasts Longer than tOSP_FB) Shutdown Temperature Hysteresis A ns 23.0 24.5 26.0 V 0.7 1.0 1.3 s 1.8 2.0 2.2 V 2.0 2.5 3.0 s 130 140 150 C 60 C Continued on the following page… © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 5 TJ = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit Total Device Section IOP Operating Supply Current, (Control Part in Burst Mode) VCC = 14V, VFB = 0V 0.3 0.4 0.5 mA IOPS Operating Switching Current, (Control Part and SenseFET Part) VCC = 14V, VFB = 2V 1.1 1.5 1.9 mA Start Current VCC=11V (Before VCC Reaches VSTART) 85 120 155 A Startup Charging Current VCC = VFB = 0V, VSTR = 40V 0.7 1.0 1.3 mA Minimum VSTR Supply Voltage VCC = VFB = 0V, VSTR Sweep ISTART ICH VSTR 26 V Notes: 12. Although these parameters are guaranteed, they are not 100% tested in production. 13. Average value. 14. tLEB includes gate turn-on time. Comparison of FSGM0765R and FSL176MRT Function FSGM0765R FSL176MRT Random Frequency Fluctuation Operating Current © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 1.6mA Advantages of FSL176MRT Built-in Low EMI 0.4mA Very low standby power FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Electrical Characteristics (Continued) www.fairchildsemi.com 6 1.20 1.20 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Characteristic graphs are normalized at TA=25°C. 1.00 0.95 0.90 0.85 1.00 0.95 0.90 0.85 0.80 ‐40'C ‐20'C 0'C 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C 0'C Temperature [ °C] Temperature [ °C] Operating Supply Current (IOP) vs. TA Figure 6. 1.20 1.20 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Figure 5. 1.00 0.95 0.90 0.85 Operating Switching Current (IOPS) vs. TA 1.00 0.95 0.90 0.85 0.80 ‐40'C ‐20'C 0'C 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C 0'C Temperature [ °C] Startup Charging Current (ICH) vs. TA Figure 8. 1.40 1.20 1.30 1.15 1.20 1.10 1.10 1.05 1.00 0.90 0.80 0.70 Peak Drain Current Limit (ILIM) vs. TA 1.00 0.95 0.90 0.85 0.60 ‐40'C ‐20'C 0'C 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] Figure 9. 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] Normalized Normalized Figure 7. 25'C 50'C 75'C 90'C 110'C 120'C 125'C FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Typical Performance Characteristics 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] Feedback Source Current (IFB) vs. TA © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 0'C Figure 10. Shutdown Delay Current (IDELAY) vs. TA www.fairchildsemi.com 7 1.20 1.20 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Characteristic graphs are normalized at TA=25°C. 1.00 0.95 0.90 0.85 0.80 ‐40'C ‐20'C 1.00 0.95 0.90 0.85 0'C 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C 0'C Temperature [ °C] Temperature [ °C] Figure 12. UVLO Threshold Voltage (VSTOP) vs. TA 1.20 1.20 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Figure 11. UVLO Threshold Voltage (VSTART) vs. TA 1.00 0.95 0.90 1.00 0.95 0.90 0.85 0.85 0.80 ‐40'C ‐20'C 0'C 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C 0'C Figure 13. Shutdown Feedback Voltage (VSD) vs. TA Figure 14. Over-Voltage Protection (VOVP) vs. TA 1.20 1.20 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] Temperature [ °C] 1.00 0.95 0.90 0.85 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Typical Performance Characteristics 1.00 0.95 0.90 0.85 0'C 0.80 ‐40'C ‐20'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] Figure 15. Switching Frequency (fS) vs. TA © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 0'C Figure 16. Maximum Duty Ratio (DMAX) vs. TA www.fairchildsemi.com 8 3. Feedback Control: This device employs currentmode control, as shown in Figure 18. An opto-coupler (such as the FOD817) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the RSENSE resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, pulling down the feedback voltage and reducing drain current. This typically occurs when the input voltage is increased or the output load is decreased. 1. Startup: At startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (CVcc) connected to the VCC pin, as illustrated in Figure 17. When VCC reaches 12V, the FSL176MRT begins switching and the internal highvoltage current source is disabled. The FSL176MRT continues normal switching operation and the power is supplied from the auxiliary transformer winding unless VCC goes below the stop voltage of 7.5V. 3.1 Pulse-by-Pulse Current Limit: Because currentmode control is employed, the peak current through the SenseFET is limited by the inverting input of the PWM comparator (VFB*), as shown in Figure 18. Assuming that the 90μA current source flows only through the internal resistor (3R + R = 27kΩ), the cathode voltage of diode D2 is about 2.5V. Since D1 is blocked when the feedback voltage (VFB) exceeds 2.5V, the maximum voltage of the cathode of D2 is clamped at this voltage. Therefore, the peak value of the current through the SenseFET is limited. Figure 17. Startup Block 3.2 Leading-Edge Blanking (LEB): At the instant the internal SenseFET is turned on, a high-current spike usually occurs through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the RSENSE resistor leads to incorrect feedback operation in the current-mode PWM control. To counter this effect, the FSL176MRT employs a leading-edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for tLEB (300ns) after the SenseFET is turned on. 2. Soft-Start: The internal soft-start circuit increases the PWM comparator inverting input voltage, together with the SenseFET current, slowly after startup. The typical soft-start time is 15ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. This helps prevent transformer saturation and reduces stress on the secondary diode during startup. FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Functional Description Figure 18. Pulse Width Modulation Circuit © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 9 B B Figure 20. Overload Protection 4.2 Abnormal Over-Current Protection (AOCP): When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the minimum turn-on time. Overload protection is not enough to protect the FSL176MRT in that abnormal case; since severe current stress is imposed on the SenseFET until OLP is triggered. The FSL176MRT internal AOCP circuit is shown in Figure 21. When the gate turn-on signal is applied to the power SenseFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level, the set signal is applied to the S-R latch, resulting in the shutdown of the SMPS. FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) 7.0V, when the switching operation is terminated, as shown in Figure 20. The delay for shutdown is the time required to charge CFB from 2.5V to 7.0V with 2.0µA. A 25 ~ 50ms delay is typical. This protection is implemented in auto-restart mode. 4. Protection Circuits: The FSL176MRT has several self-protective functions, such as Overload Protection (OLP), Abnormal Over-Current Protection (AOCP), Output-Short Protection (OSP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD). All the protections are implemented as auto-restart. Once a fault condition is detected, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC falls to the Under-Voltage Lockout (UVLO) stop voltage of 7.5V, the protection is reset and the startup circuit charges the VCC capacitor. When VCC reaches the start voltage of 12.0V, the FSL176MRT resumes normal operation. If the fault condition is not removed, the SenseFET remains off and VCC drops to stop voltage again. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated. Because these protection circuits are fully integrated into the IC without external components, the reliability is improved without increasing cost. Figure 19. Auto-Restart Protection Waveforms 4.1 Overload Protection (OLP): Overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the SMPS. However, when the SMPS is in normal operation, the overload protection circuit can be triggered during load transition. To avoid this undesired operation, the overload protection circuit is designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Because of the pulse-by-pulse current-limit capability, the maximum peak current through the SenseFET is limited and, therefore, the maximum input power is restricted with a given input voltage. If the output consumes more than this maximum power, the output voltage (VOUT) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (VFB). If VFB exceeds 2.5V, D1 is blocked and the 2.0µA current source starts to charge CFB slowly up. In this condition, VFB continues increasing until it reaches © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 Figure 21. Abnormal Over-Current Protection www.fairchildsemi.com 10 Figure 22. Output-Short Protection 4.4 Over-Voltage Protection (OVP): If the secondary-side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then VFB climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is triggered. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the overload protection is triggered, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an OVP circuit is employed. In general, the VCC is proportional to the output voltage and the FSL176MRT uses VCC instead of directly monitoring the output voltage. If VCC exceeds 24.5V, an OVP circuit is triggered, resulting in the termination of the switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed to be below 24.5V. FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) 5. Soft Burst-Mode Operation: To minimize power dissipation in Standby Mode, the FSL176MRT enters Burst-Mode operation. As the load decreases, the feedback voltage decreases. The device automatically enters Burst Mode when the feedback voltage drops below VBURL (300mV), as shown in Figure 23. At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH (450mV), switching resumes. The feedback voltage then falls and the process repeats. Burst Mode alternately enables and disables switching of the SenseFET, reducing switching loss in Standby Mode. 4.3. Output-Short Protection (OSP): If the output is shorted, steep current with extremely high di/dt can flow through the SenseFET during the minimum turnon time. Such a steep current brings high-voltage stress on the drain of the SenseFET when turned off. To protect the device from this abnormal condition, OSP is included. It is comprised of detecting VFB and SenseFET turn-on time. When the VFB is higher than 2.0V and the SenseFET turn-on time is lower than 1.0μs, the FSL176MRT recognizes this condition as an abnormal error and shuts down PWM switching until VCC reaches VSTART again. An abnormal condition output short is shown in Figure 22. Figure 23. Burst-Mode Operation 6. Random Frequency Fluctuation (RFF): Fluctuating switching frequency of an SMPS can reduce EMI by spreading the energy over a wide frequency range. The amount of EMI reduction is directly related to the switching frequency variation, which is limited internally. The switching frequency is determined randomly by the external feedback voltage and an internal free-running oscillator at every switching instant. This random frequency fluctuation scatters the EMI noise around typical switching frequency (67kHz) effectively and can reduce the cost of the input filter included to meet the EMI requirements (e.g. EN55022). 4.5 Thermal Shutdown (TSD): The SenseFET and the control IC on a die in one package makes it easier for the control IC to detect high temperature of the SenseFET. If the temperature exceeds ~140C, the thermal shutdown is triggered and stops operation. The FSL176MRT operates in auto-restart mode until the temperature decreases to around 75C, when normal operation resumes. Figure 24. Random Frequency Fluctuation © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 11 Application LCD Monitor Power Supply Input Voltage Rated Output 5.0V (3A) 85 ~ 265VAC 14.0V (3.5A) Rated Power 64W Key Design Notes: 1. The delay for overload protection (OLP) is designed to be about 30ms with C105 (8.2nF). OLP time between 39ms (12nF) and 46ms (15nF) is recommended. 2. The SMD-type capacitor (C106) must be placed as close as possible to the VCC pin to avoid malfunction by abrupt pulsating noises and to improve ESD and surge immunity. Capacitance between 100nF and 220nF is recommended. FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Typical Application Circuit Figure 25. Schematic © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 12 Core: EER3019 (Ae=134 mm2) Bobbin: EER3019 Figure 26. Transformer Specification Table 1. Winding Specification Np /2(BOT) Pin (S → F) Wire Turns Winding Method 3→2 0.4φ×1 18 Barrier Tape TOP BOT Ts Solenoid Winding 2.0mm 1 3 Solenoid Winding 3.0mm 1 8 Solenoid Winding 3.0mm 1 3 Solenoid Winding 3.0mm 1 5 Solenoid Winding 18 Solenoid Winding Insulation: Polyester Tape t = 0.025mm, 2 Layers N5V 7→6 0.4φ×3 (TIW) FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Transformer Specification Insulation: Polyester Tape t = 0.025mm, 2 Layers Na 4→5 0.20φ×1 4.0mm Insulation: Polyester Tape t = 0.025mm, 2 Layers N5V 8→6 0.4φ×3 (TIW) Insulation: Polyester Tape t = 0.025mm, 2 Layers N14V 10 → 8 0.4φ×3 (TIW) 1 Insulation: Polyester Tape t = 0.025mm, 2 Layers Np/2(TOP) 2→1 0.4φ×1 2.0mm 1 Insulation: Polyester Tape t = 0.025mm, 2 Layers Table 2. Electrical Characteristics Pin Specification Remark Inductance 1－3 465H ±6% 67kHz, 1V Leakage 1－3 10H Maximum Short all other pins © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 13 Bill of Materials Part # Value F101 250V 3.15A Note Part # Value C101 220nF / 275V Box (Pilkor) C102 150nF/275V Box (Pilkor) C103 120µF / 400V Electrolytic (SamYoung) C104 3.3nF/630V Film (Sehwa) Fuse Capacitor NTC NTC101 5D-11 Note DSC Resistor R101 1.5MΩ, J 1W C105 12nF / 100V Film (Sehwa) R103 43kΩ, J 1W C106 220nF SMD (2012) R201 1kΩ, F 1/4W, 1% C107 47µF / 50V Electrolytic (SamYoung) R202 1.2kΩ, F 1/4W, 1% C201 1000µF / 25V Electrolytic (SamYoung) R203 18kΩ, F 1/4W, 1% C202 1000µF / 25V Electrolytic (SamYoung) R204 8kΩ, F 1/4W, 1% C203 1000µF / 25V Electrolytic (SamYoung) R205 8kΩ, F 1/4W, 1% C204 2200µF / 10V Electrolytic (SamYoung) C205 1000µF / 16V Electrolytic (SamYoung) C206 1000µF / 16V Electrolytic (SamYoung) C207 100nF SMD (2012) C208 100nF SMD (2012) C301 4.7nF / Y2 Y-cap (Samhwa) LF101 20mH Line Filter 0.5Ø L201 5µH 5A Rating L202 5µH 5A Rating IC SMPS FSL176MRT Fairchild Semiconductor IC201 KA431LZ Fairchild Semiconductor IC301 FOD817B Fairchild Semiconductor Inductor Diode D101 1N4007 Vishay D102 UF4004 Vishay ZD101 1N4750 Vishay D201 MBR20150CT Fairchild Semiconductor D202 FYPF2006DN Fairchild Semiconductor BD101 G3SBA60 Vishay © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Table 3. Transformer T101 465µH www.fairchildsemi.com 14 10.36 9.96 B 2.74 2.34 (7.00) A (0.70) Ø3.28 3.08 5.18 4.98 3.40 3.20 (5.40) 6.88 6.48 16.07 15.67 19.97 18.94 18.97 17.94 13.05 R0.55 8.13 7.13 R0.55 R0.55 (0.88) 1.40 1.20 0.80 5PLCS 0.70 #1 3.06 2.46 #6 24.00 23.00 (0.48) #1,6 #2,4 7.15 #3,5 0.70 5PLCS 0.50 2.19 0.60 0.45 1.75 1.27 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) Physical Dimensions 0.20 3.48 2.88 A B (3.81) 3.81 7.29 6.69 5° 5° NOTES: A) NO PACKAGE STANDARD APPLIES. B) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. C) DIMENSIONS ARE IN MILLIMETERS. D) DRAWING FILENAME : MKT-TO220F06REV2 4.80 4.40 Figure 28. 6-Lead, TO220, Fullpack, U-Forming, 2 DAP Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 15 FSL176MRT — Green-Mode Fairchild Power Switch (FPS™) © 2012 Fairchild Semiconductor Corporation FSL176MRT • Rev. 1.0.0 www.fairchildsemi.com 16