Rev 0; 9/06 Two-Channel, Push-Pull CCFL Controller Features The DS3992 is a low-cost, two-channel controller for cold-cathode fluorescent lamps (CCFLs) that are used to backlight liquid crystal displays (LCDs). The DS3992 can drive multiple CCFLs per channel, making it ideal for 4- and 6-lamp LCD PC monitor and TV applications. The DS3992 uses a push-pull drive scheme to convert a DC voltage (5V to 24V) to the high voltage (300VRMS to 1400VRMS) AC waveform that is required to power the CCFLs. The push-pull drive scheme uses a minimal number of external components, which reduces component and assembly cost and makes the printed circuit board (PC board) design easy to implement. The pushpull drive scheme also provides an efficient DC-to-AC conversion and produces near-sinusoidal waveforms. Two-Channel CCFL Controller for Backlighting LCD Panels for PC Monitors and LCD-TVs Minimal BOM Provides Low-Cost Inverter Solution Per-Channel Lamp Fault Monitoring for LampOpen, Lamp Overcurrent, Failure to Strike, and Overvoltage Conditions Accurate (±10%) On-Board Oscillator for Lamp Frequency (40kHz to 80kHz) Accurate (±10%) On-Board Oscillator for DPWM Burst-Dimming Frequency (90Hz to 220Hz or 180Hz to 440Hz) Device Supply Undervoltage Lockout Inverter Supply Undervoltage Lockout Burst-Dimming Soft-Start Minimizes Audible Transformer Noise Strike Frequency Boost 100% to < 10% Dimming Range 4.5V to 5.5V Single-Supply Operation -40°C to +85°C Temperature Range 16-Pin SO Package (150 mils) Applications LCD PC Monitors LCD-TVs Ordering Information TEMP RANGE DIMMING FREQUENCY RANGE DS3992Z-09P+ -40°C to +85°C 90Hz to 220Hz Positive 16 SO-16 (150 mils) DS3992Z-09N+ -40°C to +85°C 90Hz to 220Hz Negative 16 SO-16 (150 mils) DS3992Z-18P+ -40°C to +85°C 180Hz to 440Hz Positive 16 SO-16 (150 mils) DS3992Z-18N+ -40°C to +85°C 180Hz to 440Hz Negative 16 SO-16 (150 mils) DS3992Z-09P+T&R -40°C to +85°C 90Hz to 220Hz Positive 16 SO-16 (150 mils) DS3992Z-09N+T&R -40°C to +85°C 90Hz to 220Hz Negative 16 SO-16 (150 mils) DS3992Z-18P+T&R -40°C to +85°C 180Hz to 440Hz Positive 16 SO-16 (150 mils) DS3992Z-18N+T&R -40°C to +85°C 180Hz to 440Hz Negative 16 SO-16 (150 mils) PART BRIGHT POLARITY +Denotes lead-free package. T&R denotes tape-and-reel package. PIN-PACKAGE Pin Configuration TOP VIEW LOSC 1 16 VCC POSC 2 15 VCC BRIGHT 3 Typical Operating Circuits appear at end of data sheet. 14 OVD2 13 LCM2 SVM 4 GA1 5 DS3992 12 GB2 GB1 6 11 GA2 LCM1 7 10 VCC OVD1 8 9 GND SO-150 ______________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 DS3992 General Description DS3992 Two-Channel, Push-Pull CCFL Controller ABSOLUTE MAXIMUM RATINGS Voltage on VCC Relative to Ground.......................-0.5V to +6.0V Voltage on Any Leads Other Than VCC ..............0.5V to (VCC + 0.5V), not to exceed +6.0V Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-55°C to +125°C Soldering Temperature...................See J-STD-020 Specification Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (TA = -40°C to +85°C.) PARAMETER Supply Voltage SVM Voltage Range BRIGHT Voltage Range SYMBOL MAX UNITS 4.5 5.5 V VSVM -0.3 VCC + 0.3 V VBRIGHT -0.3 VCC + 0.3 V VCC CONDITIONS (Note 1) MIN TYP LCM Voltage Range VLCM (Note 2) -0.3 VCC + 0.3 V OVD Voltage Range VOVD (Note 2) -0.3 VCC + 0.3 V 20 nC TYP MAX UNITS 8 16 mA 0.4 V Gate-Driver Output Charge Loading QG ELECTRICAL CHARACTERISTICS (VCC = +4.5V to +5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL CONDITIONS Supply Current ICC GA, GB loaded with 600pF, 2 channels active Low-Level Output Voltage (GA, GB) VOL IOL = 4mA High-Level Output Voltage (GA, GB) VOH1 UVLO Threshold: VCC Rising VCC 0.4 V VUVLOR UVLO Threshold: VCC Falling VUVLOF UVLO Hysteresis VUVLOH SVM Falling-Edge Threshold IOH1 = -1mA MIN 4.3 3.7 V 100 VSVM 1.9 V 2.0 mV 2.1 V SVM Hysteresis VSVMH 150 LCM and OVD DC Bias Voltage VDCB 1.35 mV V LCM and OVD Input Resistance RDCB 50 kΩ Lamp-Off Threshold VLOT (Note 3) 1.65 1.75 1.85 V Lamp Over Current VLOC (Note 3) 3.15 3.35 3.55 V Lamp Regulation Threshold VLRT (Note 3) 2.25 2.35 2.45 V VOVDT (Note 3) 2.25 2.35 2.45 V 80 kHz OVD Threshold Lamp Frequency Range 2 fLFS:OSC _____________________________________________________________________ 40 Two-Channel, Push-Pull CCFL Controller DS3992 ELECTRICAL CHARACTERISTICS (continued) (VCC = +4.5V to +5.5V, TA = -40°C to +85°C.) PARAMETER SYMBOL Lamp Frequency Tolerance fLFS:TOL DPWM Frequency Range fDSR:OSC DPWM Frequency Tolerance fDSR:TOL BRIGHT Voltage: Minimum Brightness VBMIN BRIGHT Voltage: Maximum Brightness VBMAX Gate-Driver Output Rise/Fall Time tR / tF MAX UNITS LOSC resistor ±2% over temperature CONDITIONS MIN -10 TYP +10 % DS3992Z-09P/N 90 220 DS3992Z-18P/N 180 440 POSC resistor ±2% over temperature -10 +10 DS3992Z-09P / DS3992Z-18P 0.5 DS3992Z-09N / DS3992Z-18N 2.0 DS3992Z-09P / DS3992Z-18P 2.0 DS3992Z-09N / DS3992Z-18N 0.5 CL = 600pF 50 100 GAn and GBn Duty Cycle 44 Strike Time tSTRIKE 500 Hz % V V ns % ms Note 1: All voltages are referenced to ground unless otherwise noted. Currents into the I.C. are positive, out of the I.C. negative. Note 2: During fault conditions, the AC-coupled feedback values are allowed to be below the Absolute Maximum Rating of the LCM or OVD pin for up to 1s. Note 3: Voltage with respect to VDCB. Typical Operating Characteristics (VCC = 5.0V, TA = +25°C, unless otherwise noted.) 7.5 7.0 DPWM = 100% DPWM = 50% 6.5 DPWM = 10% 5.5 SVM ≤ 2V 5.0 4.5 GATE QC = 3.5nC fLFOSC = 64kHz 4.0 9.5 VCC = 5.0V VCC = 4.5V 9.0 8.5 8.0 7.5 7.0 6.5 SUPPLY VOLTAGE (V) -40.0 0.8 0.6 0.4 0.2 DPWM FREQUENCY 0 -0.2 LAMP FREQUENCY -0.4 -0.6 GATE QC = 3.5nC fLFOSC = 64kHz DPWM = 100% -0.8 6.0 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 1.0 DS3992 toc02 VCC = 5.5V FREQUENCY CHANGE (%) SUPPLY CURRENT (mA) 8.0 SUPPLY CURRENT (mA) 8.5 6.0 10.0 DS3992 toc01 9.0 INTERNAL FREQUENCY CHANGE vs. TEMPERATURE ACTIVE SUPPLY CURRENT vs. TEMPERATURE DS3992 toc03 ACTIVE SUPPLY CURRENT vs. SUPPLY VOLTAGE 22.5 TEMPERATURE (°C) 85.0 -1.0 -40.0 22.5 85.0 TEMPERATURE (°C) _____________________________________________________________________ 3 Typical Operating Characteristics (continued) (VCC = 5.0V, TA = +25°C, unless otherwise noted.) 1ms 5.0V GA 2ms 2.0V SVM 10μs 5.0V GB 1ms 5.0V GB 2ms 5.0V GB 10μs 2.0V LCM 1ms 2.0V LCM 2ms 2.0V LCM 10μs 2.0V OVD 1ms 2.0V OVD 2ms 2.0V OVD 1ms 5.0V GA LAMP STRIKE—EXPANDED VIEW SOFT-START AT VINV = 16V DS3984 toc08 BURST DIMMING AT 150Hz AND 50% 50μs 5.0V GA 1ms 5.0V GA 1ms 5.0V GB 50μs 5.0V GB 1ms 5.0V GB 1ms 2.0V LCM 50μs 2.0V LCM 1ms 2.0V LCM 1ms 2.0V OVD 50μs 2.0V OVD 1ms 2.0V OVD DS3992 toc10 LAMP OUT (LAMP OPENED), AUTORETRY DISABLED 0.25 5.0V GA 0.25 5.0V GB LAMP OPENED 0.25 2.00V LCM 0.25 2.00V OVD 4 DS3992 toc06 DS3992 toc05 DS3992 toc04 10μs 5.0V GA TYPICAL STARTUP WITH SVM BURST DIMMING AT 150Hz AND 10% _____________________________________________________________________ DS3992 toc09 TYPICAL OPERATION AT 16V DS3992 toc07 DS3992 Two-Channel, Push-Pull CCFL Controller Two-Channel, Push-Pull CCFL Controller PIN NUMBER NAME I/O 1 LOSC ⎯ Lamp Oscillator Resistor Adjust. A resistor (RLOSC) to ground on this pin sets the frequency of the lamp oscillator (fLFS:OSC). [RLOSC x fLFS:OSC = 1.6E9]. Burst Dimming DPWM Oscillator Resistor Adjust. A resistor (RPOSC) to ground on this lead sets the frequency (fDSR:OSC) of the burst-dimming DPWM oscillator. [RPOSC x fDSR:OSC = 4.0E6 for DS3992Z-09P and DS3992Z-09N and RPOSC x fDSR:OSC = 8.0E6 for DS3992Z-18P and DS3992Z-18N]. FUNCTION 2 POSC ⎯ 3 BRIGHT I Lamp Brightness Control. An analog voltage at this input controls the lamp brightness. See Table 1 for details. 4 SVM I Supply Voltage Monitor. The DC inverter supply voltage is monitored by an external resistor divider. The resistor-divider should be set such that it provides 2V at this pin for the minimum allowable range of the DC inverter supply. Pulling this input below 2V will turn the lamps off and reset the controller. Connect to VCC if not used. 5 GA1 O MOSFET Gate Drive A for Channel 1. Connect directly to the gate of a logic-level mode n-channel MOSFET. 6 GB1 O MOSFET Gate Drive B for Channel 1. Connect directly to the gate of a logic-level mode n-channel MOSFET. 7 LCM1 I Lamp Current Monitor Input for Channel 1. Lamp current is monitored by a resistor placed in series with the low-voltage side of the lamp. 8 OVD1 I Over Voltage Detection for Channel 1. Lamp voltage is monitored by a capacitor divider placed on the high-voltage side of the lamp. 9 GND ⎯ Signal Ground 10 VCC ⎯ Supply. 4.5V to 5.5V. 11 GA2 O MOSFET Gate Drive A for Channel 2. Connect directly to the gate of a logic-level mode n-channel MOSFET. 12 GB2 O MOSFET Gate Drive B for Channel 2. Connect directly to the gate of a logic-level mode n-channel MOSFET. 13 LCM2 I Lamp Current Monitor Input for Channel 2. Lamp current is monitored by a resistor placed in series with the low-voltage side of the lamp. 14 OVD2 I Overvoltage Detection for Channel 2. Lamp voltage is monitored by a capacitor divider placed on the high-voltage side of the lamp. 15 VCC ⎯ Supply. 4.5V to 5.5V. 16 VCC ⎯ Supply. 4.5V to 5.5V. _____________________________________________________________________ 5 DS3992 Pin Description Two-Channel, Push-Pull CCFL Controller DS3992 Functional Diagrams UVLO SYSTEM ENABLE / POR VCC [4.5V TO 5.5V] VREF DS3992 2.0V SVM SUPPLY VOLTAGE MONITOR FAULT HANDLING [40kHz TO 80kHz] LOSC EXTERNAL RESISTOR LAMP FREQUENCY SET CHANNEL FAULT CHANNEL ENABLE LCMn LAMP CURRENT MONITOR [20.48MHz TO 40.96MHz] x512 PLL TWO INDEPENDENT CCFL CONTROLLERS (SEE FIGURE 2) 40kHz TO 80kHz OSCILLATOR (±10%) ANALOG BRIGHTNESS BRIGHT CONTROL POSC EXTERNAL RESISTOR DPWM FREQUENCY SET GAn MOSFET GBn GATE DRIVERS 90Hz TO 220Hz OR 180Hz TO 440Hz OSCILLATOR (±10%) RAMP GENERATOR DPWM SIGNAL 90Hz TO 220Hz OR 180Hz TO 440Hz Figure 1. DS3992 Functional Diagram 6 OVDn OVERVOLTAGE DETECTION _____________________________________________________________________ GND Two-Channel, Push-Pull CCFL Controller LAMP OUT CHANNEL ENABLE 400mV CHANNEL FAULT LCMn LAMP CURRENT MONITOR LAMP OVERCURRENT 2.0V DIGITAL CCFL CONTROLLER DIMMING PWM SIGNAL 512 x LAMP FREQUENCY [20.48MHz TO 40.96MHz] LAMP STRIKE AND REGULATION 64 LAMP CYCLE INTEGRATOR OVERVOLTAGE OVDn OVERVOLTAGE DETECTOR LAMP MAXIMUM VOLTAGE REGULATION LAMP FREQUENCY [40kHz TO 80kHz] 1.0V 1.0V GATE DRIVERS GAn MOSFET GATE GBn DRIVERS Figure 2. DS3992 Per Channel Logic Diagram Detailed Description Each DS3992 channel drives two logic-level n-channel MOSFETs that are connected between the ends of a step-up transformer and ground (See the Typical Operating Circuits). The transformer has a center tap on the primary side that is connected to the DC inverter voltage supply. The DS3992 alternately turns on the two MOSFETs to create the high-voltage AC waveform on the secondary side. By varying the duration of the MOSFET turn-on times, the DS3992 is able to accurately control the CCFL current. A resistor in series with the CCFL’s ground connection enables current monitoring. The voltage across this resistor is fed to the lamp current monitor (LCM) input and compared to an internal reference voltage to determine the duty cycle for the MOSFET gates. The DS3992 supports a 1 lamp per channel configuration with fully independent lamp control and minimal DPWM SIGNAL external components. The DS3992 is also capable of controlling more than 1 lamp per channel using a wired-OR feedback circuit. See the Typical Operating Circuits section for more information. Block diagrams of the DS3992 are shown in Figures 1 and 2. More operating details of the DS3992 are discussed on the following pages of this data sheet. Dimming Control The DS3992 uses “burst” dimming to control the lamp brightness. An analog voltage applied at the BRIGHT input pin determines the duty cycle of a digital pulsewidth-modulated (DPWM) signal (90Hz to 220Hz for DS3992Z-09P/DS3992Z-09N and 180Hz to 440Hz for DS3992Z-18P/DS3992Z-18N). During the high period of the DPWM cycle, the lamp is driven at the selected lamp frequency (40kHz to 80kHz) as shown in Figure 3. This part of the cycle is also called the “burst” period because of the lamp frequency burst that occurs 90Hz TO 220Hz OR 180Hz TO 440Hz LAMP CURRENT Figure 3. Digital-PWM Dimming and Soft-Start _____________________________________________________________________ 7 DS3992 Functional Diagrams (continued) DS3992 Two-Channel, Push-Pull CCFL Controller Table 1. BRIGHT Analog Dimming Input Configuration SLOPE MINIMUM BRIGHTNESS MAXIMUM BRIGHTNESS DS3992Z-09P and DS3992Z-18P DEVICE Positive BRIGHT < 0.5V BRIGHT > 2.0V DS3992Z-09N and DS3992Z-18N Negative BRIGHT > 2.0V BRIGHT < 0.5V during this time. During the low period of the DPWM cycle, the controller disables the MOSFET gate drivers so the lamp is not driven. This causes the current to stop flowing in the lamp, but the time is short enough to keep the lamp from de-ionizing. Dimming is increased/ decreased by adjusting (i.e., modulating) the burst period duty cycle. At the beginning of each burst dimming cycle, there is a soft-start whereby the lamp current is slowly ramped to reduce the potential to create audible transformer noise. The slope of the BRIGHT dimming input is either positive or negative as shown in Table 1. For voltages between 0.5V and 2.0V, the duty cycle will vary linearly between the minimum and 100%. Lamp Strike On lamp strike, the DS3992 boosts the normal operating lamp frequency by 33%. This is done to increase the voltage created and help insure that the lamp strikes. In addition, the maximum strike voltage will be applied to the lamp for over 500ms. Once the controller detects that the lamp has struck, the frequency is returned to the normal lamp frequency. Setting the Lamp and DPWM Frequencies Using External Resistors Both the lamp and DPWM frequencies are set using external resistors. The resistance required for either frequency can be determined using the following formula: ROSC = K fOSC where K = 1600kΩ x kHz for lamp frequency calculations. When calculating the resistor value for the DPWM frequency, K will be one of two values depending on the DS3992 version. If using the -09N/P version (90Hz to 220Hz) then K = 4kΩ x kHz. K = 8kΩ x kHz for the -18N/P version (180Hz to 440Hz). Example: Selecting the resistor values to configure the -09P version to have a 50kHz lamp frequency and a 160Hz DPWM frequency: For the DPWM resistor calculation, K = 4kΩ x kHz. For the lamp-frequency-resistor (RLOSC) calculation, K = 1600kΩ x kHz, which is always the lamp frequency K value regardless of the frequency. 8 The previous formula can now be used to calculate the resistor values for RLOSC and RPOSC as follows: 1600kΩ x kHz = 32kΩ 50kHz 4kΩ x kHz RPOSC = = 25kΩ 0.160kHz RLOSC = Supply Monitoring The DS3992 has supply voltage monitors for both the inverter’s DC supply (VINV) and its own VCC supply to ensure that both voltage levels are adequate for proper operation. The inverter supply is monitored for undervoltage conditions at the SVM pin. An external resistordivider at the SVM input feeds into a comparator (see Figure 1) having a 2V threshold. Using the equation below to determine the resistor values, the inverter supply trip point (VTRIP) can be customized to shut off the inverter when the inverter supply voltage drops below the specified value. Operating with the inverter voltage at too high of a level can be damaging to the inverter components. Proper use of the SVM can prevent this problem. If desired, SVM can be disabled by connecting the SVM pin to GND. ⎛ R + R2 ⎞ VTRIP = 2.0 ⎜ 1 ⎟ ⎝ R1 ⎠ The VCC monitor is a 5V supply undervoltage lockout (UVLO) that prevents operation when the DS3992 does not have adequate voltage for its analog circuitry to operate or to drive the external MOSFETs. The VCC monitor features hysteresis to prevent VCC noise from causing spurious operation when VCC is near the trip point. This monitor cannot be disabled by any means. Fault Monitoring The DS3992 provides extensive fault monitoring for each channel. It can detect open-lamp, lamp overcurrent, failure to strike, and overvoltage conditions. Figure 4 shows a flowchart of how the DS3992 controls and monitors each channel. The steps are as follows: The lamps will not turn on unless the DS3992 supply voltage is > 4.5V and the voltage at the supply voltage monitor (SVM) input is > 2V. _____________________________________________________________________ Two-Channel, Push-Pull CCFL Controller FAULT STATE [MUST POWER CYCLE THE DS3992 OR TAKE SVM BELOW 2V TO RESET THE CCFL CONTROLLER] YES LAMP OVERCURRENT [INSTANTANEOUS] DS3992 DEVICE AND INVERTER SUPPLIES AT PROPER LEVELS? STRIKE LAMP [RAMP AND REGULATE TO OVD THRESHOLD] LAMP STRIKE TIMEOUT [65536 LAMP CYCLES] IF LINE REGULATION THRESHOLD IS MET OVERVOLTAGE [64 LAMP CYCLES] RUN LAMP [REGULATE LAMP CURRENT BOUNDED BY LAMP VOLTAGE] LAMP-OUT TIMEOUT [65,536 LAMP CYCLES] MOSFET GATE DRIVERS ENABLED RUN LAMP STAGE Figure 4. Fault-Handling Flowchart When both the DS3992 and the DC inverter supplies are at acceptable levels, the DS3992 will attempt to strike the lamps. The DS3992 slowly ramps up the MOSFET gate duty cycle until the lamp strikes. The controller detects that the lamp has struck by detecting current flow in the lamp. If during the strike ramp, the maximum allowable voltage is reached, the controller will stop increasing the MOSFET gate duty cycle to keep from overstressing the system. The DS3992 will go into a fault-handling state if the lamp has not struck after 65,536 lamp cycles. If an overvoltage event is detected during the strike attempt, the DS3992 will disable the MOSFET gate drivers and go into the faulthandling state. Once the lamp is struck, the DS3992 moves to the run lamp stage. In the run lamp stage, the DS3992 adjusts the MOSFET gate duty cycle to optimize the lamp current. The gate duty cycle is always constrained to keep the system from exceeding the maximum allowable lamp voltage. If lamp current ever drops below the lamp out reference point for 65536 lamp cycles, then the lamp is considered extinguished. In this case the MOSFET gate drivers are disabled and the device moves to the fault handling stage. In the case of a lamp overcurrent condition, the DS3992 will instantaneously declare the controller to be in a fault state. If either channel on the DS3992 goes into the fault state, only the faulty channel will be shut down. Once a fault state is entered, the controller will remain in that state until one of the following occurs: • VCC drops below the UVLO threshold. • The SVM input drops below 2.0V. Applications Information Component Selection External component selection has a large impact on the overall system performance and cost. The two most important external components are the transformers and n-channel MOSFETs. The transformer should be able to operate in the 40kHz to 80kHz frequency range of the DS3992, and the turns ratio should be selected so the MOSFET drivers run at 28% to 35% duty cycle during steady-state operation. The transformer must be able to withstand the high open-circuit voltage that will be used to strike the lamp. Additionally, its primary/secondary resistance and inductance characteristics must be considered because they contribute significantly to determining the _____________________________________________________________________ 9 DS3992 Two-Channel, Push-Pull CCFL Controller efficiency and transient response of the system. Table 2 shows a transformer specification that has been utilized for a 12V inverter supply, 438mm x 2.2mm lamp design. The n-channel MOSFET must have a threshold voltage that is low enough to work with logic-level signals, a low on-resistance to maximize efficiency and limit the nchannel MOSFET’s power dissipation, and a break- down voltage high enough to handle the transient. The breakdown voltage should be a minimum of 3x the inverter voltage supply. Additionally, the total gate charge must be less than QG, which is specified in the Recommended Operating Conditions table. These specifications are easily met by many of the dual nchannel MOSFETs now available in SO-8 packages. Table 2. Transformer Specifications (as Used in the Typical Operating Circuit ) PARAMETER Turns Ratio (Secondary/Primary) CONDITIONS MIN (Notes 1, 2, 3) Frequency TYP UNITS 80 kHz 6 W 40 40 Output Power Output Current Primary DCR MAX 5 Center tap to one end Secondary DCR 8 mA 200 mΩ 500 Ω Primary Leakage 12 µH Secondary Leakage 185 mH Primary Inductance 70 µH 500 mH Secondary Inductance Secondary Output Voltage 1000ms minimum 2000 Continuous 1000 VRMS Note 1: Primary should be Bifilar wound with center tap connection. Note 2: Turns ratio is defined as secondary winding divided by the sum of both primary windings. Note 3: 40:1 is the nominal turns ratio for driving a 438mm x 2.2mm lamp with a 12V supply. Refer to AN3375 for more information. 10 ____________________________________________________________________ Two-Channel, Push-Pull CCFL Controller Single Per Channel Operating Circuit INVERTER SUPPLY VOLTAGE (5V ±10% TO 24V ±10%) SVM RLCM 1 ILAMP(RMS x 2 DUAL POWER MOSFET DEVICE SUPPLY VOLTAGE (5V ±10%) CCFL LAMP GA1 VCC VCC RLCM VCC TRANSFORMER GB1 OVERVOLTAGE DETECTION OVD1 LAMP CURRENT MONITOR LCM1 ANALOG LAMP BRIGHTNESS CONTROL BRIGHT DS3992 DUAL POWER MOSFET CCFL LAMP GA2 LOSC RLCM TRANSFORMER RESISTOR SET LAMP FREQUENCY GB2 OVD2 POSC RESISTOR SET BURST DIMMING FREQUENCY LCM2 OVERVOLTAGE DETECTION LAMP CURRENT MONITOR GND ____________________________________________________________________ 11 DS3992 Typical Operating Circuits Two-Channel, Push-Pull CCFL Controller DS3992 Typical Operating Circuits (continued) Multi-Lamp Per Channel Operating Circuit ON = OPEN OFF/RESET = CLOSED INVERTER SUPPLY VOLTAGE (12V ±10% TO 24V ±10%) SVM DS3992 1 OF 2 CHANNELS DUAL N-CHANNEL POWER MOSFET DEVICE SUPPLY VOLTAGE (5V ±10%) VCC VCC CCFL LAMP A GA VCC GB +5V ANALOG LAMP BRIGHTNESS CONTROL CCFL LAMP B BRIGHT LCM 2N3904 LOSC +5V RESISTOR SET LAMP FREQUENCY CCFL LAMP C 2N3904 POSC RESISTOR SET BURST DIMMING FREQUENCY +5V 2N3904 OVD GND 12 ____________________________________________________________________ Two-Channel, Push-Pull CCFL Controller TRANSISTOR COUNT: 53,000 SUBSTRATE CONNECTED TO GROUND Package Information For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. is a registered trademark of Dallas Semiconductor Corporation. Springer DS3992 Chip Topology Power-Supply Decoupling To achieve best results, it is highly recommended that a decoupling capacitor be used on pin 10, the IC powersupply pin. Pins 15 and 16, also VCC pins, do require connection to supply voltage, but do not require any additional decoupling. Typical values of decoupling capacitors are 0.01µF or 0.1µF. Use a high-quality, ceramic, surface-mount capacitor, and mount it as close as possible to the VCC and GND pins of the IC to minimize lead inductance.