NTF2955, NVF2955, NVF2955P Power MOSFET −60 V, −2.6 A, Single P−Channel SOT−223 Features • • • • Design for low RDS(on) Withstands High Energy in Avalanche and Commutation Modes AEC−Q101 Qualified − NVF2955, NVF2955P These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) TYP ID MAX −60 V 145 mW @ −10 V −2.6 A Applications • • • • P−Channel Power Supplies PWM Motor Control Converters Power Management D G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS −60 V Gate−to−Source Voltage VGS ±20 V ID −2.6 A Continuous Drain Current (Note 1) Steady State TA = 25°C Power Dissipation (Note 1) Steady State TA = 25°C PD 2.3 W Continuous Drain Current (Note 2) Steady State TA = 25°C ID −1.7 A Power Dissipation (Note 2) TA = 85°C −1.3 PD 1.0 W IDM −17 A TJ, TSTG −55 to 175 °C EAS 225 mJ TL 260 °C Parameter Symbol Max Unit Junction−to−Tab (Drain) − Steady State (Note 2) RqJC 14 Junction−to−Ambient − Steady State (Note 1) RqJA 65 Junction−to−Ambient − Steady State (Note 2) RqJA 150 Pulsed Drain Current tp = 10 ms Operating Junction and Storage Temperature Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VG = 10 V, IPK = 6.7 A, L = 10 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8” from case for 10 seconds) THERMAL RESISTANCE RATINGS May, 2013 − Rev. 6 4 Drain AYW 2955G G 4 12 3 1 Gate SOT−223 CASE 318E STYLE 3 2 Drain 4 Drain 3 Source AYW 2955PG G 1 Gate 2 Drain 3 Source A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION °C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. When surface mounted to an FR4 board using 1 in. pad size (Cu. area = 1.127 in2 [1 oz] including traces) 2. When surface mounted to an FR4 board using the minimum recommended pad size (Cu. area = 0.341 in2) © Semiconductor Components Industries, LLC, 2013 MARKING DIAGRAMS AND PIN ASSIGNMENT −2.0 TA = 85°C TA = 25°C S 1 Package Shipping† NTF2955T1G SOT−223 (Pb−Free) 1000 /Tape & Reel NVF2955T1G SOT−223 (Pb−Free) 1000/ Tape & Reel NVF2955PT1G SOT−223 (Pb−Free) 1000/ Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTF2955/D NTF2955, NVF2955, NVF2955P ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise stated) Symbol Parameter Test Condition Min VGS = 0 V, ID = −250 mA −60 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 66.4 VGS = 0 V, VDS = −60 V mV/°C TJ = 25°C −1.0 TJ = 125°C −50 IGSS VDS = 0 V, VGS = ±20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −1.0 mA Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −0.75 A VGS = −10 V, ID = −1.5 A mA ±100 nA −4.0 V 145 170 mW 150 180 185 ON CHARACTERISTICS (Note 3) −2.0 VGS = −10 V, ID = −2.4 A 154 gFS VGS = −15 V, ID = −0.75 A 1.77 S Input Capacitance CISS 492 pF Output Capacitance COSS VGS = 0 V, f = 1.0 MHz, VDS = 25 V Reverse Transfer Capacitance CRSS Forward Transconductance CHARGES AND CAPACITANCES 165 50 VGS = 10 V, VDS = 30 V, ID = 1.5 A Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS 2.3 Gate−to−Drain Charge QGD 5.2 nC 14.3 1.2 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr VGS = 10 V, VDD = 25 V, ID = 1.5 A, RG = 9.1 W RL = 25 W ns 11 7.6 td(OFF) 65 tf 38 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C −1.10 TJ = 125°C −0.9 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 1.5 A −1.30 V 36 VGS = 0 V, dIS/dt = 100 A/ms, IS = 1.5 A QRR 20 16 0.139 3. Pulse Test: pulse width ≤ 300ms, duty cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns nC NTF2955, NVF2955, NVF2955P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 10 VGS = −6 V VGS = −10 V to −7 V 8 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) 10 TJ = 25 °C VGS = −5.5 V 6 VGS = −5 V 4 VGS = −4.5 V 2 VGS = −3.8 V 0 0 1 2 3 4 5 6 7 8 9 TJ = −55°C TJ = 25°C 8 4 2 2 4 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) TJ = 25°C 0.2 0.175 TJ = 25°C VGS = −10 V 0.15 VGS = −15 V 0.125 TJ = −55°C 0.1 0.075 0 2 0 2 1.8 1.6 4 8 6 10 0.05 0 2 6 4 8 10 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Drain Current and Temperature Figure 4. On−Resistance versus Drain Current and Gate Voltage 1000 ID = −1.5 A VGS = −10 V VGS = 0 V TJ = 150°C −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = 125°C 0.1 10 0.25 0.225 0.2 8 Figure 2. Transfer Characteristics VGS = −10 V 0.3 6 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics 0.4 TJ = 125°C 6 0 10 VDS ≥ 10 V 1.4 1.2 1 0.8 0.6 0.4 100 TJ = 125°C 0.2 0 −50 −25 0 25 50 75 100 125 10 150 5 10 15 20 25 30 35 40 45 50 55 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 60 NTF2955, NVF2955, NVF2955P Ciss C, CAPACITANCE (pF) 1000 800 QT 10 Crss 600 Ciss 400 Coss 200 Crss 0 10 60 12 TJ = 25°C VGS = 0 V VDS = 0 V 5 −VGS 0 −VDS 5 10 15 20 25 8 QGS 30 20 4 VDS 2 0 0 2 −IS, SOURCE CURRENT (AMPS) t, TIME (ns) td(off) tf td(on) 10 tr 1 −ID, DRAIN CURRENT (AMPS) 100 10 10 2 1 0 0.25 0.75 0.5 1 1.25 1.5 1.75 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current VGS = −20 V SINGLE PULSE TC = 25°C 10 ms 10 ms 1 dc 0.01 0.1 3 RG, GATE RESISTANCE (W) 100 ms 1 ms 0.1 0 16 14 VGS = 0 V TJ = 25°C 4 0 100 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100 EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) 1 4 6 8 10 12 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge 5 100 10 ID = −1.5 A TJ = 25°C Figure 7. Capacitance Variation VDD = −25 V ID = −1.5 A VGS = −10 V 40 VGS QGD 6 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1000 50 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1200 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 250 IPK = −6.7 A 200 150 100 50 0 25 50 75 100 125 150 175 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 4 NTF2955, NVF2955, NVF2955P PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE N D b1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 4 HE 1 2 3 b e1 e A1 C q A 0.08 (0003) DIM A A1 b b1 c D E e e1 L L1 HE E MIN 1.50 0.02 0.60 2.90 0.24 6.30 3.30 2.20 0.85 0.20 1.50 6.70 0° q L STYLE 3: PIN 1. 2. 3. 4. L1 MILLIMETERS NOM MAX 1.63 1.75 0.06 0.10 0.75 0.89 3.06 3.20 0.29 0.35 6.50 6.70 3.50 3.70 2.30 2.40 0.94 1.05 −−− −−− 1.75 2.00 7.00 7.30 10° − MIN 0.060 0.001 0.024 0.115 0.009 0.249 0.130 0.087 0.033 0.008 0.060 0.264 0° INCHES NOM 0.064 0.002 0.030 0.121 0.012 0.256 0.138 0.091 0.037 −−− 0.069 0.276 − MAX 0.068 0.004 0.035 0.126 0.014 0.263 0.145 0.094 0.041 −−− 0.078 0.287 10° GATE DRAIN SOURCE DRAIN SOLDERING FOOTPRINT* 3.8 0.15 2.0 0.079 2.3 0.091 2.3 0.091 6.3 0.248 2.0 0.079 1.5 0.059 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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