Data Sheet NP30N06QDK R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 60 V – 30 A – Dual N-channel Power MOS FET Application: Automotive Description NP29N06QDK is a dual N-channel MOS Field Effect Transistor designed for high current switching applications. Features • Super low on-state resistance ⎯ RDS(on)1 = 14 mΩ MAX. (VGS = 10 V, ID = 15 A) ⎯ RDS(on)2 = 21 mΩ MAX. (VGS = 4.5 V, ID = 7.5 A) • Low Ciss: Ciss = 1500 pF TYP. (VDS = 25 V) • Designed for automotive application and AEC-Q101 qualified • Small size package 8-pin HSON dual Outline Drain 1 Drain 2 Body Diode Gate 1 Source 1 8-pin HSON dual Body Diode Gate 2 Source 2 Equivalent circuit Remark: Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Ordering Information Part No. NP30N06QDK-E1-AY *1 NP30N06QDK-E2-AY *1 Note: Lead Plating Pure Sn (Tin) Tape 2500 p/reel Packing Taping (E1 type) Taping (E2 type) Package 8-pin HSON dual *1. Pb-free (This product does not contain Pb in the external electrode) R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 Page 1 of 7 NP30N06QDK Absolute Maximum Ratings (TA = 25°C) Item Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) ∗4 Drain Current (pulse) ∗1, 4 Total Power Dissipation (TC = 25°C) ∗4 Total Power Dissipation (TA = 25°C) ∗2, 4 Channel Temperature Storage Temperature Repetitive Avalanche Current ∗3 Repetitive Avalanche Energy ∗3 Symbol VDSS VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg IAR EAR Ratings 60 ±20 ±30 ±120 59 1.0 175 −55 to +175 19 35 Unit V V A A W W °C °C A mJ Thermal Resistance Channel to Case Thermal Resistance Channel to Ambient Thermal Resistance ∗2 Rth(ch-C) Rth(ch-A) 2.54 150 °C/W °C/W Notes: *1. TC = 25°C, PW ≤ 10 μs, Duty Cycle ≤ 1% *2. Mounted on glass epoxy substrate of 40 mm × 40 mm × 1.6 mmt with 4% copper area (35 μm) *3. RG = 25 Ω, VGS = 20 V → 0 V *4. One channel operation R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 Page 2 of 7 NP30N06QDK Electrical Characteristics (TA = 25°C) Item Zero Gate Voltage Drain Current Gate Leakage Current Gate to Source Threshold Voltage Forward Transfer Admittance ∗1 Symbol IDSS IGSS VGS(th) | yfs | Drain to Source On-state Resistance ∗1 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage ∗1 Reverse Recovery Time RDS(on)1 RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Reverse Recovery Charge Qrr Note: Min Typ 1.5 13 2.1 25 11.5 16.5 1500 160 50 15 5 50 3 25 5 4 0.9 25 Max 1 ±100 2.5 Unit μA nA V S mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns 14 21 2250 240 90 30 13 100 8 38 1.5 26 nC Test Conditions VDS = 60 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = VGS, ID = 250 μA VDS = 5 V, ID = 15 A VGS = 10 V, ID = 15 A VGS = 4.5 V, ID = 7.5 A VDS = 25 V, VGS = 0 V, f = 1 MHz VDD = 30 V, ID = 15 A, VGS = 10 V, RG = 0 Ω VDD = 48 V, VGS = 10 V, ID = 30 A IF = 30 A, VGS = 0 V IF = 30 A, VGS = 0 V, di/dt = 100 A/μs *1. Pulsed test TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω RL Wave Form RG PG. VDD VGS VGS VDD 0 VGS 10% 90% VDS 90% ID IAS 90% VDS VGS 0 BVDSS VDS 10% 0 10% Wave Form VDS VDD Starting Tch τ τ = 1 μs Duty Cycle ≤ 1% td(on) tr ton td(off) tf toff TEST CIRCUIT 3 GATE CHARGE PG. D.U.T. IG = 2 mA RL 50 Ω VDD R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 Page 3 of 7 NP30N06QDK Typical Characteristics (TA = 25°C) TOTAL POWER DISSIPATION vs. CASE TEMPERATURE DERATING FACTOR OF FORWARD BIAS SAFE 120 70 100 60 Pt – Total Power Dissipation - W dT - Percentage of Rated Power - % OPERATING AREA 80 60 40 20 50 40 30 20 10 0 0 50 100 150 0 200 0 TC - Case Temperature - °C 50 100 150 200 TC - Case Temperature - °C FORWARD BIAS SAFE OPERATING AREA 1000 ID(pulse)=120A ID - Drain Current - A 100 ID(DC)=30A 10 Power Dissipation Limited 1 Secondary Breakdown Limited 0.1 TC=25℃ Single Pulse 0.01 0.1 1 10 100 VDS - Drain to Source Voltage – V Rth(t) - Transient Thermal Resistance - °C/W TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Rth(ch-A) = 150°C/W 100 10 Rth(ch-C) = 2.54°C/W 1 0.1 0.01 One channel operation Single pulse Mounted on glass epoxy substrate of 40 mm x 40 mm x 1.6 mmt with 4% copper area(35μm) 100 μ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 Page 4 of 7 NP30N06QDK FORWARD TRANSFER CHARACTERISTICS DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 140 100 120 TA=175°C 125°C 75°C 25°C -55°C 10 ID - Drain Current - A ID - Drain Current - A 100 80 60 40 VGS=10V 20 1 0.1 0.01 VDS = 10V Pulsed Pulsed 0 0.001 0 0.5 1 1.5 2 2.5 3 0 VDS - Drain to Source Voltage - V 3 4 FORWARD TRANSFER ADMITTANCE vs. CURRENT 5 DRAIN 100 3 2 1 VDS = VGS ID=250μA 0 -100 -50 0 50 100 150 200 | yfs | - Forward Transfer Admittance - S 4 VGS(th) – Gate to Source Threshold Voltage - V 2 VGS - Gate to Source Voltage - V GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE TA=175°C 150°C 75°C 25°C -55°C 10 VDS = 5V Pulsed 1 0.1 Tch - Channel Temperature - °C 20 10 VGS=10V Pulsed 0 1 ID - Drain Current - A R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 10 10 100 100 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 30 0.1 1 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-state Resistance - mΩ 1 30 Pulsed ID= 6A 15A 30A 20 10 ID=15A 0 0 5 10 15 20 VGS - Gate to Source Voltage - V Page 5 of 7 NP30N06QDK CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 30 Pulsed VGS=10V ID=15A -50 0 50 100 150 100 Coss 10 0.01 200 0.1 SWITCHING CHARACTERISTICS 10 100 DYNAMIC INPUT CHARACTERISTICS 10 50 1000 VDD = 30V VGS=10V RG=0Ω VDS - Drain to Source Voltage - V td(on),tr,td(off),tr – Switching Time - ns 1 VDS - Drain to Source Voltage - V Tch - Channel Temperature - °C 100 td(off) td(on) 10 tr tf VDD= 48V 30V 12V 40 8 6 30 VGS 20 4 2 10 VDS ID=30A 0 0 1 0.1 1 10 0 100 5 10 15 20 25 QG - Gate Charge - nC ID - Drain Current - A SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DRAIN CURRENT 100 100 trr – Reverse Recovery Time - ns IF - Diode Forward Current - A Crss VGS = 0V f = 1.0MHz VGS - Gate to Source Voltage - V 0 -100 S 10 1000 f Ad i 20 Ciss T Ciss, Coss, Crss - Capacitance - pF RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE VGS=10V 10 VGS=0V 1 Pulsed 0.1 0 0.2 0.4 0.6 0.8 1 VF(S-D) - Source to Drain Voltage - V R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 1.2 10 di/dt = 100A/μs VGS = 0V 1 0.1 1 10 100 IF - Drain Current - A Page 6 of 7 NP30N06QDK Package Drawings (Unit: mm) 8-pin HSON Dual (Mass: 0.12 g TYP.) Renesas package code: PLSN0008DA-A A A S 1: Source 1 2: Gate 1 7, 8: Drain 1 3: Source 2 4: Gate 2 5, 6: Drain 2 R07DS1332EJ0100 Rev.1.00 Mar 28, 2016 Page 7 of 7 Revision History NP30N06QDK Data Sheet Description Rev. 1.00 Date Mar 28, 2016 Page — Summary First Edition Issued All trademarks and registered trademarks are the property of their respective owners. C-1 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. 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