CYStech Electronics Corp. Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 1/9 N-Channel Enhancement Mode Power MOSFET MTE2D0N04F7T BVDSS ID @VGS=10V, TC=25°C 40V RDSON(TYP) @ VGS=10V, ID=20A Features 196A 1.7mΩ • Simple Drive Requirement • Fast Switching Characteristic • RoHS compliant package Symbol Outline MTE2D0N04F7T TO-263-7L-4C G：Gate D：Drain S：Source Ordering Information Device MTE2D0N04F3-0-T7-X Package Shipping TO-263-7L-4C 800 pcs / Tape & Reel (Pb-free lead plating and RoHS compliant package) Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T7 : 800 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name MTE2D0N04F7T CYStek Product Specification CYStech Electronics Corp. Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 2/9 Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Symbol Limits Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TC=25°C(silicon limit) Continuous Drain Current @ TC=100°C(silicon limit) Continuous Drain Current @ TC=25°C(package limit) (Note 1) Pulsed Drain Current (Note 3) Continuous Drain Current @ TA=25°C (Note 2) Continuous Drain Current @ TA=70°C (Note 2) Avalanche Current @L=0.1mH (Note 3) Avalanche Energy @ L=1mH, ID=50A, VDD=40V (Note 4) TC=25°C (Note 1) Power Dissipation TC=100°C (Note 1) TA=25°C (Note 2) Power Dissipation TA=70°C (Note 2) Operating Junction and Storage Temperature VDS VGS 40 ±30 208 147 196 784 24.6 19.7 80 1250 166 83 2 1.3 -55~+175 ID IDM IDSM IAS EAS PD PDSM Tj, Tstg Unit V A mJ W °C Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max, (Note 2) Symbol RθJC RθJA Value 0.9 62.5 Unit °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2.The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 4. 100% tested by conditions of L=1mH, IAS=20A, VGS=10V, VDD=30V. 5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum. 6. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient. MTE2D0N04F7T CYStek Product Specification CYStech Electronics Corp. Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 3/9 Characteristics (TC=25°C, unless otherwise specified) Symbol Static BVDSS VGS(th) GFS IGSS IDSS Min. Typ. Max. 40 2.0 - 33.8 1.7 4.0 ±100 1 25 2.3 113 27.5 29.4 40.6 26 84.2 19.6 5831 751 345 0.9 - 0.68 38.2 41.1 196 784 1 - *RDS(ON) Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Rg Source-Drain Diode *IS *ISM *VSD *trr *Qrr - Unit Test Conditions mΩ VGS=0V, ID=250μA VDS = VGS, ID=250μA VDS =10V, ID=20A VGS=±30V VDS =32V, VGS =0V VDS =32V, VGS =0V, Tj=125°C VGS =10V, ID=20A nC ID=20A, VDS=20V, VGS=10V ns VDS=20V, ID=20A, VGS=10V, RG=1Ω pF VGS=0V, VDS=30V, f=1MHz Ω f=1MHz V S nA μA A V ns nC IS=1A, VGS=0V IF=1A, VGS=0V, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% MTE2D0N04F7T CYStek Product Specification Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 4/9 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 ID, Drain Current(A) 250 BVDSS, Normalized Drain-Source Breakdown Voltage 300 5.5V 200 10V, 9V, 8V, 7V, 6V 5V 150 100 VGS=4.5V 1.2 1 0.8 ID=250μA, VGS=0V 0.6 50 0.4 0 0 1 2 3 4 VDS, Drain-Source Voltage(V) -75 -50 -25 5 Reverse Drain Current vs Source-Drain Voltage 10 1.2 VSD, Source-Drain Voltage(V) R DS(ON) , Static Drain-Source On-State Resistance(mΩ) Static Drain-Source On-State resistance vs Drain Current VGS=7V 1 Tj=25°C 0.8 0.6 Tj=150°C 0.4 VGS=10V 0.2 1 0.1 1 10 ID, Drain Current(A) 100 0 4 8 12 16 IDR , Reverse Drain Current(A) 20 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 50 2.4 R DS(ON) , Normalized Static DrainSource On-State Resistance R DS(ON) , Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) ID=20A 40 30 20 10 2 VGS=10V, ID=20A 1.6 1.2 0.8 0.4 RDS(ON) @Tj=25°C :1.7mΩ typ. 0 0 0 MTE2D0N04F7T 2 4 6 8 VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 5/9 CYStech Electronics Corp. Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage 1.4 VGS(th), NormalizedThreshold Voltage 10000 Capacitance---(pF) Ciss C oss 1000 Crss 1.2 ID=1mA 1 0.8 0.6 ID=250μA 0.4 0.2 100 0 5 10 15 20 25 VDS, Drain-Source Voltage(V) -75 -50 -25 30 Forward Transfer Admittance vs Drain Current Gate Charge Characteristics 10 VDS=20V VGS, Gate-Source Voltage(V) GFS , Forward Transfer Admittance(S) 100 10 1 VDS=10V Pulsed Ta=25°C 0.1 0.01 0.001 8 6 VDS=32V 4 2 ID=20A 0 0.01 0.1 1 ID, Drain Current(A) 10 0 100 1000 1ms 10ms 10 100ms DC TC=25°C, Tj=175°C, VGS=10V, RθJC=0.9°C/W Single Pulse 1 120 140 Silicon Limit ID, Maximum Drain Current(A) 100μs 100 40 60 80 100 Total Gate Charge---Qg(nC) 250 10 μs RDS(ON) Limited 20 Maximum Drain Current vs Case Temperature Maximum Safe Operating Area ID, Drain Current(A) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) 200 150 Package Limit 100 50 VGS=10V, RθJC=0.9°C/W 0 0.1 0.1 MTE2D0N04F7T 1 10 VDS, Drain-Source Voltage(V) 100 25 50 75 100 125 150 TC , Case Temperature(°C) 175 200 CYStek Product Specification Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 6/9 CYStech Electronics Corp. Typical Characteristics(Cont.) Typical Transfer Characteristics Single Pulse Maximum Power Dissipation 300 3000 VDS=10V 2500 200 Power (W) ID, Drain Current (A) 250 150 2000 1500 100 1000 50 500 0 0 2 4 6 8 VGS, Gate-Source Voltage(V) 10 TJ(MAX) =175°C TC=25°C RθJC=0.9°C/W 0 1E-05 0.0001 0.001 0.01 0.1 Pulse Width(s) 1 10 Transient Thermal Response Curves 1 r(t), Normalized Effective Transient Thermal Resistance D=0.5 0.2 0.1 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=0.9 °C/W 0.1 0.05 0.02 0.01 0.01 0.001 0.00001 MTE2D0N04F7T Single Pulse 0.0001 0.001 0.01 0.1 t1, Square Wave Pulse Duration(s) 1 10 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 7/9 Reel Dimension Carrier Tape Dimension MTE2D0N04F7T CYStek Product Specification CYStech Electronics Corp. Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 8/9 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTE2D0N04F7T CYStek Product Specification Spec. No. : C072F7T Issued Date : 2017.01.03 Revised Date : Page No. : 9/9 CYStech Electronics Corp. TO-263-7L-4C Dimension Marking : Device Name Date Code CYS E2D0N04 □□□□ Style : Pin 1. Gate Pin 2, 3, 5, 6, 7 : Source Pin 4. Drain 7-Lead Plastic Surface Mounted TO-263-7L Package CYStek Package Code : F7T Date Code : (From left to right) First Code : Year code, the last digit of Christinr year. For example, 2014→4, 2015→, 2016→6, …, etc. Second Code : Month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G, Aug→H, Sep→J, Oct→K, Nov→L, Dec→M Third and fourth codes : production serial number, 01~99 *:Typical Inches Min. Max. 0.1673 0.1791 0.0472 0.0551 0.0886 0.1004 0.0004 0.0098 0.0197 0.0276 0.0228 0.0331 0.0157 0.0236 0.3563 0.3720 0.2717 - DIM A A1 A2 A3 b b1 c D D4 Millimeters Min. Max. 4.25 4.55 1.20 1.40 2.25 2.55 0.01 0.25 0.50 0.70 0.58 0.84 0.40 0.60 9.05 9.45 6.90 - DIM E e E5 H H2 L L1 L4 θ Inches Min. Max. 0.3858 0.4016 0.0500 BSC 0.2854 0.5768 0.6043 0.0315 0.0472 0.0945 0.1181 0.0335 0.0453 0.0098 BSC 2° 8° Millimeters Min. Max. 9.80 10.20 1.27 BSC 7.25 14.65 15.35 0.80 1.20 2.40 3.00 0.85 1.15 0.25 BSC 2° 8° Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : • Lead : Pure tin plated. • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTE2D0N04F7T CYStek Product Specification