HAT1095C Silicon P Channel MOS FET Power Switching REJ03G1232-0500 Rev.5.00 Jan 26, 2006 Features • Low on-resistance RDS(on) = 108 mΩ typ. (at VGS = –4.5 V) • Low drive current. • 1.8 V gate drive devices. • High density mounting Outline RENESAS Package code: PWSF0006JA-A (Package name: CMFPAK-6) Indexband 6 5 2 3 4 5 D DD D 4 1 2 3 6 G 1. Source 2. Drain 3. Drain 4. Drain 5. Drain 6. Gate S 1 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Drain to Source voltage VDSS –12 Gate to Source voltage VGSS ±8 Drain current ID –2 Drain peak current ID (pulse)Note1 –8 Body - Drain diode reverse drain current IDR –2 Channel dissipation PchNote 2 830 Channel temperature Tch 150 Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the glass epoxy board. (FR4 40 × 40 × 1.6mm), Ta = 25°C Rev.5.00 Jan 26, 2006 page 1 of 6 Unit V V A A A mW °C °C HAT1095C Electrical Characteristics (Ta = 25°C) Item Drain to Source breakdown voltage Gate to Source breakdown voltage Gate to Source leakage current Drain to Source leakage current Gate to Source cutoff voltage Drain to Source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to Source charge Gate to Drain charge Turn - on delay time Rise time |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr Min –12 ±8 — — –0.3 — — — 2 — — — — — — — — Turn - off delay time Fall time Body - Drain diode forward voltage Notes: 3. Pulse test td(off) tf VDF — — — Rev.5.00 Jan 26, 2006 page 2 of 6 Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(th) RDS(on) Typ — — — — — 108 146 225 3 290 70 45 3.8 0.7 1 12 23 Max — — ±10 –1 –1.2 140 205 337 — — — — — — — — — Unit V V µA µA V mΩ mΩ mΩ S pF pF pF nC nC nC ns ns 35 9 –0.8 — — –1.1 ns ns V Test Conditions ID = –10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±6.4V, VDS = 0 VDS = –12 V, VDS = 0 ID = –1 mA, VDS = –10 V Note3 ID = –1 A, VGS = –4.5 V Note3 ID = –1 A, VGS = –2.5 V Note3 ID = –1 A, VGS = –1.8 V Note3 ID = –1 A, VDS = –10 V Note3 VDS = –10 V, VGS = 0, f = 1 MHz VDD = –10 V, VGS = –4.5 V, ID = –2 A VDS = –10 V, VGS = –4.5 V, ID = –1 A, RL = 10 Ω, Rg = 4.7 Ω IF = –2 A, VGS = 0 HAT1095C Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating –100 Test Condition : When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) 1.2 –10 m s –1 s m op –0.3 er at io n Operation in this area is limited by RDS(on) –0.1 –0.03 0 50 100 150 Ambient Temperature 200 –0.01 –0.03 –0.1 –0.3 –1 –10 –10 VDS = 10 V Pulse Test –2.5 V –6 –2.0 V –4 –1.8 V –1.6 V –2 Drain Current ID (A) –4.5 V –3.5 V –8 –10 –30 –100 Typical Transfer Characteristics Pulse Test –10 V –3 Drain to Source Voltage VDS (V) Ta (°C) Typical Output Characteristics Drain Current ID (A) 1 –3 10 0.4 100 µs 10 µs = 0.8 When using the FR4 board. Ta = 25°C,1shot pulse DC Drain Current ID (A) –30 PW Channel Dissipation Pch (W) 1.6 25°C –8 Tc = 75°C –25°C –6 –4 –2 VGS = –1.4 V –2 –4 –6 –8 –10 –1 0 –2 –3 –4 –5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current –500 Pulse Test –400 –300 –200 –2 A –1 A –100 ID = –0.5 A 0 0 –2 –4 –6 –8 –10 Gate to Source Voltage VGS (V) Rev.5.00 Jan 26, 2006 page 3 of 6 Drain to Source On State Resistance RDS(on) (mΩ) Drain to Source Voltage VDS(on) (mV) 0 10000 Pulse Test 1000 1.8 V 2.5 V 100 10 –0.1 VGS = –4.5 V –1 Drain Current ID (A) –10 Forward Transfer Admittance vs. Drain Current Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT1095C 500 Pulse Test 400 300 –0.5 A –1 A –2 A –1.8 V 200 –2.5 V –0.5 A,1 A 100 VGS = –4.5 V 0 –25 0 25 –2 A ID = –0.5 A,1 A 50 75 Case Temperature 100 125 150 Tc 10 25°C 1 0.1 0.03 0.01 0.01 0.03 VDD = –20 V –10 V –5 V –4 –6 –30 4 6 1 3 10 VGS = 0 f = 1 MHz –8 10 8 Ciss 300 100 Coss Crss 30 10 0 –4 –2 –6 –8 –10 –12 Gate Charge Qg (nc) Drain to Source Voltage VDS (V) Reverse Drain Current vs. Source to Drain Voltage Switching Characteristics –10 1000 Pulse Test 300 Switching Time t (ns) Reverse Drain Current IDR (A) 0.3 10000 Capacitance C (pF) –2 Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) 0 2 0.1 Typical Capacitance vs. Drain to Source Voltage VDD = –5 V –10 V –20 V –40 0 VDS = 10 V Pulse Test Drain Current ID (A) (°C) 0 –20 75°C 0.3 Dynamic Input Characteristics –10 Tc = –25°C 3 –8 –6 5V –4 VGS = 10 V –2 VGS = –10 V, VDD = –10 V Rg = 4.7 Ω tr 100 30 td(off) td(on) 10 tf 3 1 0.3 0 –0.4 –0.8 –1.2 –1.6 –2.0 Source to Drain Voltage VSD (V) Rev.5.00 Jan 26, 2006 page 4 of 6 0.1 0.01 0.02 0.1 0.3 1 3 Drain Current ID (A) 10 HAT1095C Switching Time Test Circuit Waveform Vin Vout Monitor Vin Monitor 10% D.U.T. 90% RL 4.7 Ω Vin –4.5 V Vout td(on) Rev.5.00 Jan 26, 2006 page 5 of 6 90% 90% VDD = –10 V 10% 10% tr td(off) tf HAT1095C Package Dimensions JEITA Package Code Package Name CMFPAK-6 RENESAS Code PWSF0006JA-A Previous Code CMFPAK-6 / CMFPAK-6V MASS[Typ.] 0.0065g D A e c E A HE A x M LP L b S A Reference Symbol e A2 A A1 y S S e1 b b1 l1 c1 b2 c Pattern of terminal position areas A-A Section A A1 A2 b b1 c c1 D E e HE L LP x y b2 e1 l1 Dimension in Millimeters Min 0.6 0 0.7 0.15 0.1 1.9 1.6 2.05 0.1 0.15 Nom 0.22 0.2 0.13 0.11 2.0 1.7 0.65 2.1 0.2 Max 0.8 0.01 0.79 0.3 0.15 2.1 1.8 2.15 0.3 0.45 0.05 0.05 0.35 1.65 0.5 Ordering Information Part Name HAT1095C-EL-E Quantity 3000 pcs Shipping Container Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.5.00 Jan 26, 2006 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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