19-0854; Rev 2; 11/08 KIT ATION EVALU E L B A AVAIL 10W Mono Class D Speaker Amplifier with Volume Control The MAX9768 mono 10W Class D speaker amplifier provides high-quality, efficient audio power with an integrated volume control function. The MAX9768 features a 64-step dual-mode (analog or digitally programmable) volume control and mute function. The audio amplifier operates from a 4.5V to 14V single supply and can deliver up to 10W into an 8Ω speaker with a 14V supply. A selectable spread-spectrum mode reduces EMI-radiated emissions, allowing the device to pass EMC testing with ferrite bead filters and cable lengths up to 1m. The MAX9768 can be synchronized to an external clock, allowing synchronization of multiple Class D amplifiers. The MAX9768 features high 77dB PSRR, low 0.08% THD+N, and SNR up to 97dB. Robust short-circuit and thermal-overload protection prevent device damage during a fault condition. The MAX9768 is available in a 24-pin thin QFN-EP (4mm x 4mm x 0.8mm) package and is specified over the extended -40°C to +85°C temperature range. Applications Notebook Computers Flat-Panel Displays Multimedia Monitors GPS Navigation Systems Security/Personal Mobile Radio Features ♦ 10W Output (8Ω, PVDD = 14V, THD+N = 10%) ♦ Patented Spread-Spectrum Modulation ♦ Meets EN55022B EMC with Ferrite Bead Filters ♦ Amplifier Operation from 4.5V to 14V Supply ♦ 64-Step Integrated Volume Control (I2C or Analog) ♦ Low 0.08% THD+N (RL = 8Ω, POUT = 6W) ♦ High 77dB PSRR ♦ Two tON Times Offered MAX9768—220ms MAX9768B—15ms ♦ Low-Power Shutdown Mode (0.5µA) ♦ Short-Circuit and Thermal-Overload Protection Ordering Information PART PIN-PACKAGE tON (ms) MAX9768ETG+ 24 TQFN-EP* 220 MAX9768BETG+ 24 TQFN-EP* 15 Note: All devices are specified over the -40°C to +85°C operating temperature range. +Denotes a lead-free/RoHS-compliant package. *EP = Exposed pad. Pin Configuration located at end of data sheet. Simplified Block Diagram 3.3V 4.5V TO 14V MAX9768 EMI WITH FERRITE BEAD FILTERS (VDD = 12V, 1m CABLE, 8Ω LOAD) 40 FILTERLESS CLASS D SPEAKER OUTPUT SHDN MUTE ANALOG OR I2C VOLUME CONTROL 35 AMPLITUDE (dBμV/m) SPEAKER AUDIO INPUT 30 25 20 OVER 20dB MARGIN TO EN55022B LIMIT 15 10 5 MAX9768 0 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9768 General Description MAX9768 10W Mono Class D Speaker Amplifier with Volume Control ABSOLUTE MAXIMUM RATINGS Continuous Power Dissipation (TA = +70°C) Single-Layer Board: 24-Pin Thin QFN 4mm x 4mm, (derate 20.8mW/°C above +70°C) .................................1.67W Multilayer Board: 24-Pin Thin QFN 4mm x 4mm, (derate 27.8mW/°C above +70°C) .................................2.22W θJA, Single-Layer Board…...........................................….48°C/W θJA, Multilayer Board ...................................................….36°C/W Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) ................................+300°C PVDD to PGND........................................................-0.3V to +16V VDD to GND ..............................................................-0.3V to +4V SCLK, SDA/VOL to GND ..........................................-0.3V to +4V FB, SYNCOUT ............................................-0.3V to (VDD + 0.3V) BOOT_ to OUT_........................................................-0.3V to +4V OUT_ to GND ...........................................-0.3V to (PVDD + 0.3V) PGND to GND ......................................................-0.3V to +0.3V Any Other Pin to GND ..............................................-0.3V to +4V OUT_ Short-Circuit Duration.......................................Continuous Continuous Current (PVDD, PGND, OUT_) ..........................2.2A Continuous Input Current (Any Other Pin) .......................±20mA Continuous Input Current (FB_) .......................................±60mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, V SHDN = VDD, VMUTE = 0; Max volume setting; speaker load resistor connected between OUT+ and OUT-, RL = ∞, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RF = 30kΩ, SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 14.0 V 3.6 V GENERAL Speaker Supply Voltage Range Supply Voltage Range PVDD Inferred from PSRR test 4.5 VDD Inferred from PSRR and UVLO test 2.7 IVDD Quiescent Current Shutdown Current IPVDD ISHDN Output Offset VOS Turn-On Time tON Common-Mode Bias Voltage 7 14.2 Filterless modulation 4 7.6 Classic PWM modulation 4 7.6 ISHDN = IPVDD + IDD, SHDN = GND, TA = +25°C 0.5 50 Filterless modulation, VMUTE = VDD, TA = +25°C ±2 ±12.5 Filterless modulation, VMUTE = 0V, TA = +25°C ±2 ±14 MAX9768 220 MAX9768B 15 VBIAS mA µA mV ms 1.5 V Input Amplifier OutputVoltage Swing High VOH Specified as VDD - VOH RL = 2kΩ connect to 1.5V 3.6 100 mV Input Amplifier OutputVoltage Swing Low VOL Specified as VOL - GND RL = 2kΩ connect to 1.5V 6 50 mV Input Amplifier Output Short-Circuit Current Limit Input Amplifier GainBandwidth Product GBW ±60 mA 1.8 MHz SPEAKER AMPLIFIERS Internal Gain 2 AVMAX Max volume setting; from FB to amplifier outputs |(OUT+) - (OUT-)|; excludes external gain resistors 29.27 30.1 _______________________________________________________________________________________ 31.00 dB 10W Mono Class D Speaker Amplifier with Volume Control (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, V SHDN = VDD, VMUTE = 0; Max volume setting; speaker load resistor connected between OUT+ and OUT-, RL = ∞, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RF = 30kΩ, SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL η Efficiency (Note 2) CONDITIONS POUT = 8W, fIN = 1kHz, RL = 8Ω PVDD = 5V Output Power (Note 2) POUT PVDD = 12V PVDD = 14V Soft Output Current Limit ILIM Hard Output Current Limit ISC Total Harmonic Distortion Plus Noise (Note 2) Signal-to-Noise Ratio (Note 2) THD+N Power-Supply Rejection Ratio f = 1kHz, RL = 8Ω, POUT = 5W 87 Classic PWM modulation 85 RL = 8Ω, THD+N = 1%, filterless modulation 1.3 RL = 8Ω, THD+N = 10%, filterless modulation 1.7 RL = 8Ω, THD+N = 10%, classic PWM modulation 9 9 RL = 8Ω, THD+N = 10%, classic PWM modulation 10 RL = 8Ω, THD+N = 10%, filterless modulation 10 A-weighted FFM SSM 93 FFM 97 SSM 97 FFM 93 SSM 89 FFM 97 SSM dB 91 115 VDD = 2.7V to 3.6V, filterless modulation, TA = +25°C 52 68 PVDD = 4.5V to 14V, filterless modulation, TA = +25°C 67 84 dB dB 77 f = 1kHz, VRIPPLE = 100mVP-P on VDD fOCS % 94 f = 1kHz, VRIPPLE = 200mVP-P on PVDD Oscillator Frequency A 0.08 0dB = 8W, f = 1kHz PSRR 2.5 Classic PWM modulation Unweighted % A 0.09 A-weighted 60 SYNC = GND 1060 1200 1320 SYNC = unconnected 1296 1440 1584 SYNC = VDD (spread-spectrum modulation mode) UNITS 2 Filterless modulation Unweighted MAX W RL = 8Ω, THD+N = 10%, filterless modulation SNR 0dB = 8W, RL = 8Ω, BW = 22Hz to 22kHz, classic PWM modulation TYP Filterless modulation 1.75 0dB = 8W, RL = 8Ω, BW = 22Hz to 22kHz, filterless modulation mode MUTE Attenuation (Note 3) MIN kHz 1200 ±30 _______________________________________________________________________________________ 3 MAX9768 ELECTRICAL CHARACTERISTICS (continued) MAX9768 10W Mono Class D Speaker Amplifier with Volume Control ELECTRICAL CHARACTERISTICS (continued) (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, V SHDN = VDD, VMUTE = 0; Max volume setting; speaker load resistor connected between OUT+ and OUT-, RL = ∞, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RF = 30kΩ, SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL Class D Switching Frequency CONDITIONS MIN TYP MAX SYNC = GND 265 300 330 SYNC = unconnected 324 360 396 SYNC = VDD (spread-spectrum modulation mode) SYNC Frequency Lock Range UNITS kHz 300 ±7.5 1000 1600 kHz Minimum SYNC Frequency Lock Duty Cycle 40 % Maximum SYNC Frequency Lock Duty Cycle 60 % 2 % Gain Matching Click-and-Pop Level (Note 2) Full volume (ideal matching for RIN and RF) KCP Peak voltage, 32 samples per second, A-weighted, RIN x CIN ≤ 10ms to guarantee clickless/popless operation Into shutdown 52.6 Out of shutdown 48 Into mute 67 Out of mute 57 dBV Input Impedance DC volume control mode (SDA/VOL) 100 MΩ Input Hysteresis DC volume control mode (SDA/VOL) 11 mV 9.5dB Gain Voltage DC volume control mode (SDA/VOL) 0.1 x VDD V Full Mute Voltage DC volume control mode (SDA/VOL) 0.9 x VDD V DIGITAL INPUTS (SHDN, MUTE, ADDR1, ADDR2, SYNC) Input-Voltage High VIH Input-Voltage Low VIL Input Leakage Current ISYNC ILK SYNC All other pins 2.33 V 0.7 x VDD SYNC 0.8 All other pins 0.3 x VDD TA = +25°C ±7.5 All other digital inputs, TA = +25°C ±13 ±1 V µA DIGITAL OUTPUT (SYNCOUT) Output-Voltage High Load = 1mA Output-Voltage Low Load = 1mA Rise/Fall Time CL = 10pF 4 VDD - 0.3 V 0.3 5 _______________________________________________________________________________________ V ns 10W Mono Class D Speaker Amplifier with Volume Control (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, V SHDN = VDD, VMUTE = 0; Max volume setting; speaker load resistor connected between OUT+ and OUT-, RL = ∞, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RF = 30kΩ, SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS THERMAL PROTECTION Thermal Shutdown Threshold 150 °C Thermal Shutdown Hysteresis 15 °C DIGITAL INPUTS (SCLK, SDA/VOL) Input-Voltage High VIH Input-Voltage Low VIL 0.7 x VDD Input High Leakage Current IIH VIN = VDD, TA = +25°C ±1 µA Input Low Leakage Current IIL VIN = GND, TA = +25°C ±1 µA Input Hysteresis Input Capacitance V 0.3 x VDD CIN V 0.1 x VDD V 5 pF DIGITAL OUTPUTS (SDA/VOL) Output High Current IOH VOH = VDD 1 µA Output Low Voltage VOL IOL = 3mA 0.4 V 400 kHz I2C TIMING CHARACTERISTICS (Figure 3) Serial Clock fSCL Bus Free Time Between a STOP and START Condition tBUF 1.3 µs Hold Time (Repeated) START Condition tHD,STA 0.6 µs Repeated START Condition Setup Time tSU,STA 0.6 µs STOP Condition Setup Time tSU,STO 0.6 µs Data Hold Time tHD,DAT 0 Data Setup Time tSU,DAT 100 ns SCL Clock Low Period tLOW 1.3 µs SCL Clock High Period µs 0.9 µs tHIGH 0.6 Rise Time of SDA and SCL, Receiving tR (Note 4) 20 + 0.1Cb 300 ns Fall Time of SDA and SCL, Receiving tF (Note 4) 20 + 0.1Cb 300 ns _______________________________________________________________________________________ 5 MAX9768 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, V SHDN = VDD, VMUTE = 0; Max volume setting; speaker load resistor connected between OUT+ and OUT-, RL = ∞, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RF = 30kΩ, SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL Fall Time of SDA, Transmitting tF Pulse Width of Spike Suppressed tSP Capacitive Load for Each Bus Line Cb CONDITIONS MIN (Note 4) MAX UNITS 20 + 0.1Cb TYP 250 ns 0 50 ns 400 pF Note 1: All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by design. Note 2: Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For RL = 8Ω, L = 68µH. Note 3: Device muted by either asserting MUTE or minimum VOL setting. Note 4: Cb = total capacitance of one bus line in pF. Typical Operating Characteristics (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, VMUTE = 0; 0dB volume setting; all speaker load resistors connected between OUT+ and OUT-, RL = 8Ω, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RFB = 30kΩ, spread-spectrum modulation mode.) PVDD = 12V RL = 8Ω FILTERLESS MODULATION 10 MAX9768 toc02 10 MAX9768 toc01 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY PVDD = 12V RL = 8Ω PWM MODE MAX9768 toc03 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY PVDD = 5V RL = 8Ω FILTERLESS MODULATION 1 1 OUTPUT POWER = 6W 0.1 THD+N (%) THD+N (%) 1 THD+N (%) MAX9768 10W Mono Class D Speaker Amplifier with Volume Control OUTPUT POWER = 5W OUTPUT POWER = 1W 0.1 0.1 OUTPUT POWER = 300mW 0.01 OUTPUT POWER = 2W OUTPUT POWER = 2W 0.01 10 100 1k FREQUENCY (Hz) 6 0.001 0.01 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) _______________________________________________________________________________________ 10k 100k 10W Mono Class D Speaker Amplifier with Volume Control (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, VMUTE = 0; 0dB volume setting; all speaker load resistors connected between OUT+ and OUT-, RL = 8Ω, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RFB = 30kΩ, spread-spectrum modulation mode.) 1 OUTPUT POWER = 300mW 0.1 0.01 SPREAD-SPECTRUM MODULATION 0.01 OUTPUT POWER = 800mW 0.001 1k 10k 100k 1k 10k 10 100k 0.1 4 6 8 fIN = 100Hz 10 12 MAX9768 toc06 fIN = 10kHz 1 0.1 0.01 0.01 fIN = 100Hz fIN = 1kHz fIN = 1kHz 0.001 0.001 2 PVDD = 5V RL = 8Ω FILTERLESS MODULATION 10 THD+N (%) fIN = 10kHz 1 MAX9768 toc09 PVDD = 12V RL = 8Ω PWM MODE 10 fIN = 1kHz fIN = 100Hz 0 2 4 6 8 0 10 0.5 1.0 1.5 2.0 OUTPUT POWER (W) OUTPUT POWER (W) OUTPUT POWER (W) TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER PVDD = 12V RL = 8Ω fIN = 1kHz FILTERLESS MODULATION 10 THD+N (%) fIN = 10kHz 0.1 1 fIN = 100Hz FIXED-FREQUENCY MODULATION OUTPUT POWER (W) 1.6 2.0 SPREAD-SPECTRUM MODULATION 0.01 0.01 1.2 FIXED-FREQUENCY MODULATION 0.1 fIN = 1kHz 0.8 1 SPREAD-SPECTRUM MODULATION 0.001 0.4 PVDD = 12V RL = 8Ω fIN = 1kHz PWM MODE 10 0.1 0.01 100 THD+N (%) PVDD = 5V RL = 8Ω PWM MODE MAX9768 toc11 100 MAX9768 toc10 100 0 100k 100 MAX9768 toc08 100 MAX9768 toc07 0.1 1 10k TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER fIN = 10kHz 10 1k TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER 1 0 100 TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER THD+N (%) THD+N (%) 100 FREQUENCY (Hz) 0.001 THD+N (%) 0.001 10 FREQUENCY (Hz) PVDD = 12V RL = 8Ω FILTERLESS MODULATION 0.01 SPREAD-SPECTRUM MODULATION FREQUENCY (Hz) 100 10 FIXED-FREQUENCY MODULATION 0.1 0.01 0.001 100 10 PVDD = 12V RL = 8Ω PWM MODE POUT = 4W MAX9768 toc12 0.1 10 1 FIXED-FREQUENCY MODULATION THD+N (%) THD+N (%) 1 PVDD = 12V RL = 8Ω FILTERLESS MODULATION POUT = 4W THD+N (%) PVDD = 5V RL = 8Ω PWM MODE MAX9768 toc05 10 MAX9768 toc04 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY 0 2 4 6 OUTPUT POWER (W) 8 10 0 2 4 6 8 10 OUTPUT POWER (W) _______________________________________________________________________________________ 7 MAX9768 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, VMUTE = 0; 0dB volume setting; all speaker load resistors connected between OUT+ and OUT-, RL = 8Ω, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RFB = 30kΩ, spread-spectrum modulation mode.) 80 EFFICIENCY (%) 60 50 40 FILTERLESS MODULATION 90 60 50 40 20 THD+N = 10% 89 86 0 4 6 0 8 10 0 0.5 OUTPUT POWER (W) 14 MAX9768 toc16 4.5 86 10 THD+N = 10% 8 6 4 10.5 12.5 14.5 6 4 THD+N = 1% THD+N = 1% 4 14 6 10 12 14 CASE TEMPERATURE vs. OUTPUT POWER THD+N = 10% 2.0 THD+N = 1% 1.5 8 SUPPLY VOLTAGE (V) PVDD = 5V f = 1kHz PWM MODE 2.5 1.0 90 fIN = 1kHz RL = 8Ω 80 PVDD = 14V 70 60 50 40 PVDD = 12V 30 20 2 0.5 0 0 15 12 3.0 OUTPUT POWER (W) THD+N = 10% 8 10 10 3.5 MAX9768 toc19 PVDD = 12V f = 1kHz PWM MODE 5 8 OUTPUT POWER vs. LOAD RESISTANCE OUTPUT POWER vs. LOAD RESISTANCE 12 0 4 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 10 6 0 6 4 CASE TEMPERATURE (°C) 8.5 14.5 2 MAX9768 toc20 6.5 12.5 THD+N = 10% 8 THD+N = 1% 0 4.5 10.5 RL = 4Ω fIN = 1kHz PWM MODE 10 2 80 8.5 OUTPUT POWER vs. SUPPLY VOLTAGE 12 THD+N = 1% 83 6.5 SUPPLY VOLTAGE (V) RL = 8Ω fIN = 1kHz PWM MODE 12 OUTPUT POWER (W) THD+N = 10% 89 80 2.0 OUTPUT POWER vs. SUPPLY VOLTAGE fIN = 1kHz RL = 8Ω PWM MODULATION 92 1.5 OUTPUT POWER (W) EFFICIENCY vs. SUPPLY VOLTAGE 95 1.0 OUTPUT POWER (W) 2 MAX9768 toc17 0 THD+N = 1% 83 PVDD = 5V fIN = 1kHz RL = 8Ω 10 MAX9768 toc18 PVDD = 12V fIN = 1kHz RL = 8Ω 10 EFFICIENCY (%) 92 30 20 20 LOAD RESISTANCE (Ω) 8 fIN = 1kHz RL = 8Ω FILTERLESS MODULATION MAX9768 toc21 30 PWM MODE 70 MAX9768 toc15 PWM MODE 70 95 EFFICIENCY (%) 80 EFFICIENCY (%) MAX9768 toc13 FILTERLESS MODULATION 90 EFFICIENCY vs. SUPPLY VOLTAGE EFFICIENCY vs. OUTPUT POWER 100 MAX9768 toc14 EFFICIENCY vs. OUTPUT POWER 100 OUTPUT POWER (W) MAX9768 10W Mono Class D Speaker Amplifier with Volume Control 25 30 10 0 0 5 10 15 20 LOAD RESISTANCE (Ω) 25 30 0 2 4 6 8 OUTPUT POWER (W) _______________________________________________________________________________________ 10 12 10W Mono Class D Speaker Amplifier with Volume Control (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, VMUTE = 0; 0dB volume setting; all speaker load resistors connected between OUT+ and OUT-, RL = 8Ω, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RFB = 30kΩ, spread-spectrum modulation mode.) POWER-SUPPLY REJECTION RATIO (VDD) vs. FREQUENCY POWER-SUPPLY REJECTION RATIO (PVDD) vs. FREQUENCY -10 -20 -30 -30 -40 -40 PWM MODE -60 -70 -70 -80 -80 -90 -90 FILTERLESS MODULATION 10k FILTERLESS MODULATION 10 100k 100 1k 10k 100k 1μs/div FREQUENCY (Hz) OUTPUT FREQUENCY SPECTRUM OUTPUT WAVEFORM (PWM MODE) MAX9768 toc25 0 FFM MODE VIN = -60dBV f = 1kHz RL = 8Ω UNWEIGHTED 5V/div OUTPUT MAGNITUDE (dBV) -20 5V/div OUTPUT FREQUENCY SPECTRUM -40 0 -60 -80 -100 -120 -30 -40 -50 -60 -70 15 -80 -100 20 0 0 RBW = 10kHz INPUT AC GROUNDED PWM MODE -20 0 -30 -40 -50 -60 -70 -20 -30 -40 -50 -60 -70 -80 -90 -100 -100 -100 1000 RBW = 10kHz INPUT AC GROUNDED FILTERLESS MODULATION -10 -90 100 20 WIDEBAND OUTPUT SPECTRUM (SPREAD-SPECTRUM MODULATION MODE) -90 10 15 WIDEBAND OUTPUT SPECTRUM (FIXED-FREQUENCY MODULATION MODE) -80 FREQUENCY (MHz) 10 FREQUENCY (kHz) -80 1 5 FREQUENCY (kHz) MAX9768 toc29 -20 10 OUTPUT AMPLITUDE (dBV) OUTPUT AMPLITUDE (dBV) -10 5 -10 OUTPUT AMPLITUDE (dBV) RBW = 10kHz INPUT AC GROUNDED FILTERLESS MODULATION MAX9768 toc28 0 -60 -140 0 WIDEBAND OUTPUT SPECTRUM (FIXED-FREQUENCY MODULATION MODE) -40 -120 -140 1μs/div VIN = -60dBV f = 1kHz RL = 8Ω UNWEIGHTED -20 MAX9768 toc27 FREQUENCY (Hz) MAX9768 toc30 1k 5V/div -100 -100 100 PWM MODE -50 -60 10 5V/div OUTPUT MAGNITUDE (dBV) -50 PSRR (dB) PSRR (dB) -20 VDD = 3.3V VRIPPLE = 100mVP-P RL = 8Ω MAX9768 toc26 -10 MAX9768 toc23 PVDD = 12V VRIPPLE = 100mVP-P RL = 8Ω MAX9768 toc24 0 MAX9768 toc22 0 OUTPUT WAVEFORM (FILTERLESS MODULATION) 1 10 100 FREQUENCY (MHz) 1000 1 10 100 1000 FREQUENCY (MHz) _______________________________________________________________________________________ 9 MAX9768 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (VPVDD = 12V, VDD = 3.3V, VGND = VPGND = 0, VMUTE = 0; 0dB volume setting; all speaker load resistors connected between OUT+ and OUT-, RL = 8Ω, unless otherwise noted. CBIAS = 2.2µF, C1 = C2 = 0.1µF, CIN = 0.47µF, RIN = 20kΩ, RFB = 30kΩ, spread-spectrum modulation mode.) TURN-ON/OFF RESPONSE (MAX9768) WIDEBAND OUTPUT SPECTRUM (SPREAD-SPECTRUM MODULATION MODE) TURN-ON/OFF RESPONSE (MAX9768B) MAX9768 toc32 RBW = 10kHz INPUT AC GROUNDED PWM MODE -10 -20 MAX9768 toc33 MAX9768 toc31 0 OUTPUT AMPLITUDE (dBV) -30 SHDN 2V/div SHDN 2V/div OUT 500mA/div OUT 500mA/div -40 -50 -60 -70 -80 -90 -100 1 10 100 1000 100ms/div 40ms/div FREQUENCY (MHz) -20 -40 -60 -80 3.0 PWM MODE 2.5 2.0 1.5 FILTERLESS MODULATION 1.0 -100 0.5 0 -120 0.5 1.0 1.5 2.0 2.5 3.0 6 8 10 12 14 12 14 VVOL (V) SUPPLY VOLTAGE (V) SUPPLY CURRENT (VDD) vs. SUPPLY VOLTAGE SHUTDOWN CURRENT vs. SUPPLY VOLTAGE 13 PWM MODE 9 0.50 MAX9768 toc37 MAX9768 toc36 15 11 4 3.5 SHUTDOWN CURRENT = IPVDD + IDD VDD = 3.3V SHUTDOWN CURRENT (μA) 0 0.45 0.40 0.35 FILTERLESS MODULATION 7 5 0.30 2.6 2.8 3.0 3.2 SUPPLY VOLTAGE (V) 10 RL = ∞ 3.5 SUPPLY CURRENT (mA) 0 VOLUME LEVEL (dB) 4.0 MAX9768 toc34 20 MAX9768 toc35 SUPPLY CURRENT (PVDD) vs. SUPPLY VOLTAGE VOLUME CONTROL LEVEL vs. VOLUME CONTROL VOLTAGE SUPPLY CURRENT (mA) MAX9768 10W Mono Class D Speaker Amplifier with Volume Control 3.4 3.6 4 6 8 10 SUPPLY VOLTAGE (V) ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control PIN NAME 1, 2 OUT+ Positive Speaker Output FUNCTION 3, 16 PVDD Speaker Amplifier Power-Supply Input. Bypass with a 1µF capacitor to ground. 4 BOOT+ Positive Speaker Output Boost Flying-Capacitor Connection. Connect a 0.1µF ceramic capacitor between BOOT+ and OUT+. 5 SCLK I2C Serial-Clock Input and Modulation Scheme Select. In I2C mode (ADDR1 and ADDR2 ≠ GND) acts as I2C serial-clock input. Connect SCLK to VDD for classic PWM modulation, or connect SCLK to ground for filterless modulation. 6 SDA/VOL 7 FB Feedback. Connect feedback resistor between FB and IN to set amplifier gain. See the Adjustable Gain section. 8 IN Audio Input 9, 11 GND Ground 10 BIAS 12 SYNC 13 SYNCOUT Common-Mode Bias Voltage. Bypass with a 2.2µF capacitor to GND. Frequency Select and External Clock Input. SYNC = GND: Fixed-frequency mode with fS = 300kHz. SYNC = Unconnected: Fixed-frequency mode with fS = 360kHz. SYNC = VDD: Spread-spectrum mode with fS = 300kHz ±7.5kHz. SYNC = Clocked: Fixed-frequency mode with fS = external clock frequency. Clock Signal Output 14 VDD 15 BOOT- 17, 18 OUT- Negative Speaker Output 19 SHDN Shutdown Input. Drive SHDN low to disable the audio amplifiers. Connect SHDN to VDD for normal operation 20 MUTE Mute Input. Drive MUTE high to mute the speaker outputs. Connect MUTE to GND for normal operation. 21, 22 PGND Power Ground 23 ADDR2 Address Select Input 2. I2C address option, also selects volume control mode. 24 ADDR1 Address Select Input 1. I2C address option, also selects volume control mode. — EP I2C Serial Data I/O and Analog Volume Control Input Power-Supply Input. Bypass with a 1µF capacitor to GND. Negative Speaker Output Boost Flying-Capacitor Connection. Connect a 0.1µF ceramic capacitor between BOOTL- and OUTL-. Exposed Pad. Connect the exposed thermal pad to GND, and use multiple vias to a solid copper area on the bottom of the PCB. ______________________________________________________________________________________ 11 MAX9768 Pin Description 10W Mono Class D Speaker Amplifier with Volume Control MAX9768 Functional Diagram/Typical Application Circuit 2.7V to 3.6V 4.5V to 14V 1μF 1μF VDD PVDD 3, 16 14 RF 30kΩ FB 7 4 BOOT+ IN 8 CLASS D CIN RIN 0.47μF 20kΩ MAX9768 VOLUME CONTROL 1, 2 OUT+ C1 0.1μF 17, 18 OUT15 BOOT- C2 0.1μF MUTE 20 SHDN 19 SDA/VOL 6 SCLK 5 VDD ADDR1 24 ADDR2 23 MUTE SHUTDOWN CONTROL 10 BIAS BIAS CBIAS 2.2μF I 2C ANALOG CONTROL SYNC 12 13 OSCILLATOR 9, 11 GND SYNCOUT 21, 22 PGND (SHOWN IN ANALOG VOLUME CONTOL MODE, AV = 23.5dB, f-3dB = 17Hz, SPREAD-SPECTRUM MODULATION MODE, FILTERLESS MODULATION MODE, MUTE OFF) Detailed Description The MAX9768 10W, Class D audio power amplifier with spread-spectrum modulation provides a significant step forward in switch-mode amplifier technology. The MAX9768 offers Class AB performance with Class D efficiency and a minimal board space solution. This device features a wide supply voltage operation (4.5V to 14V), analog or digitally adjusted volume control, externally set input gain, shutdown mode, SYNC input and output, speaker mute, and industry-leading click-andpop suppression. The MAX9768 features a 64-step, dual-mode (analog or I2C programmed) volume control and mute function. In analog volume control mode, voltage applied to SDA/VOL sets the volume level. Two address inputs 12 (ADDR1, ADDR2) set the volume control function between analog and I2C and set the slave address. In I2C mode there are three selectable slave addresses allowing for multiple devices on a single bus. Spread-spectrum modulation and synchronizable switching frequency significantly reduce EMI emissions. The outputs use Maxim’s low-EMI modulation scheme with minimum pulse outputs when the audio inputs are at the zero crossing. As the input voltage increases or decreases, the duration of the pulse at one output increases while the other output pulse duration remains the same. This causes the net voltage across the speaker (VOUT+ - VOUT-) to change. The minimum-width pulse topology reduces EMI and increases efficiency. ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control Fixed-Frequency Mode The MAX9768 features two fixed-frequency modes: 300kHz and 360kHz. Connect SYNC to GND to select 300kHz switching frequency; leave SYNC unconnected to select 360kHz switching frequency. The frequency spectrum of the MAX9768 consists of the fundamental switching frequency and its associated harmonics (see the Wideband Output Spectrum graphs in the Typical Operating Characteristics ). For applications where exact spectrum placement of the switching fundamental is important, program the switching frequency so the harmonics do not fall within a sensitive frequency band (Table 1). Audio reproduction is not affected by changing the switching frequency. frequency bands. Applying a clock signal between 1MHz and 1.6MHz to SYNC synchronizes the MAX9768. The Class D switching frequency is equal to one-fourth the SYNC input frequency. SYNCOUT is equal to the SYNC input frequency and allows several Maxim amplifiers to be cascaded. The synchronized output minimizes interference due to clock intermodulation caused by the switching spread between single devices. The modulation scheme remains the same when using SYNCOUT, and audio reproduction is not affected (Figure 1). Current flowing between SYNCOUT of a master device and SYNC of a slave device is low as the SYNC input is high impedance (typically 200kΩ). Spread-Spectrum Mode The MAX9768 features a unique, patented spreadspectrum mode that flattens the wideband spectral components, improving EMI emissions that may be radiated by the speaker and cables. This mode is enabled by setting SYNC = V DD (Table 1). In SSM mode, the switching frequency varies randomly by ±7.5kHz around the center frequency (300kHz). The modulation scheme remains the same, but the period of the triangle waveform changes from cycle to cycle. Instead of a large amount of spectral energy present at multiples of the switching frequency, the energy is now spread over a bandwidth that increases with frequency. Above a few megahertz, the wideband spectrum looks like white noise for EMI purposes. A proprietary amplifier topology ensures this does not corrupt the noise floor in the audio bandwidth. External Clock Mode The SYNC input allows the MAX9768 to be synchronized to an external clock, or another Maxim Class D amplifier, creating a fully synchronous system, minimizing clock intermodulation, and allocating spectral components of the switching harmonics to insensitive OUT+ OUT- MAX9768 SYNCOUT MAX9768 SYNC OUT+ OUT- Figure 1. Cascading Two Amplifiers Table 1. Operating Modes SYNC GND OSCILLATOR FREQUENCY (kHz) CLASS D FREQUENCY (kHz) Fixed-frequency modulation with fOSC = 1200 Fixed-frequency modulation with fOSC = 300 Unconnected Fixed-frequency modulation with fOSC = 1440 Fixed-frequency modulation with fOSC = 360 VDD Clocked Spread-spectrum modulation with fOSC = 1200 ±30 Spread-spectrum modulation with fOSC = 300 ±7.5 Fixed-frequency modulation with fOSC = external clock frequency Fixed-frequency modulation with fOSC = external clock frequency / 4 ______________________________________________________________________________________ 13 MAX9768 Operating Modes Soft Current Limit When the output current exceeds the soft current limit, 2A (typ), the MAX9768 enters a cycle-by-cycle currentlimit mode. In soft current-limit mode, the output is clipped at 2A. When the output decreases so the output current falls below 2A, normal operation resumes. The effect of soft current limiting is a slight increase in distortion. Most applications will not enter soft currentlimit mode unless the speaker or filter creates impedance nulls below 8Ω. Switching between schemes while in normal operating mode with the I2C interface, the output is not click-andpop protected. To have click-and-pop protection when switching between output schemes, the device must enter shutdown mode and be configured to the new output scheme before the startup sequence is terminated. The startup time for the MAX9768 is typically 220ms. The startup time for the MAX9768B is typically 15ms. Efficiency Efficiency of a Class D amplifier is due to the switching operation of the output stage transistors. In a Class D amplifier, the output transistors act as current-steering switches and consume negligible additional power. Any power loss associated with the Class D output stage is mostly due to the I2R loss of the MOSFET onresistance, and quiescent-current overhead. The theoretical best efficiency of a linear amplifier is 78%, however, that efficiency is only exhibited at peak output power. Under normal operating levels (typical music reproduction levels), efficiency falls below 30%, whereas the MAX9768 still exhibits > 80% efficiencies under the same conditions (Figure 2). EFFICIENCY vs. OUTPUT POWER 100 MAX9768 fig02 Filterless Modulation/PWM Modulation The MAX9768 features two output modulation schemes: filterless modulation or classic PWM, selectable through SCLK when the device is in analog mode (ADDR2 and ADDR1 = GND, Table 2) or through the I2C interface (Table 7). Maxim’s unique, filterless modulation scheme eliminates the LC filter required by traditional Class D amplifiers, reducing component count, conserving board space and system cost. Although the MAX9768 meets FCC and other EMI limits with a lowcost ferrite bead filter, many applications still may want to use a full LC-filtered output. If using a full LC filter, the performance is best with the MAX9768 configured for classic PWM output. MAX9768 90 80 EFFICIENCY (%) MAX9768 10W Mono Class D Speaker Amplifier with Volume Control 70 60 CLASS AB 50 40 30 20 PVDD = 12V fIN = 1kHz RL = 8Ω 10 0 0 2 4 6 8 10 OUTPUT POWER (W) Figure 2. MAX9768 Efficiency vs. Class AB Efficiency Table 2. Modulation Scheme Selection In Analog Mode 14 ADDR2 ADDR1 SDA/VOL SCLK FUNCTION 0 0 Analog Volume Control 0 Filterless Modulation 0 0 Analog Volume Control 1 Classic PWM (50% Duty Cycle) ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control Thermal Shutdown When the die temperature exceeds the thermal shutdown threshold, +150°C (typ), the MAX9768 outputs are disabled. When the die temperature decreases below +135°C (typ), normal operation resumes. The effect of thermal shutdown is an output signal turning off for approximately 3s in most applications, depending on the thermal time constant of the audio system. Most applications should never enter thermal shutdown. Some of the possible causes of thermal shutdown are too low of a load impedance, high ambient temperature, poor PCB layout and assembly, or excessive output overdrive. Shutdown The MAX9768 features a shutdown mode that reduces power consumption and extends battery life. Driving SHDN low places the device in low-power (0.5µA) shutdown mode. Connect SHDN to digital high for normal operation. In shutdown mode, the outputs are high impedance, SYNCOUT is pulled high, the BIAS voltage decays to zero, and the common-mode input voltage decays to zero. The I2C register retains its contents during shutdown. Undervoltage Lockout (UVLO) The MAX9768 features an undervoltage lockout protection that shuts down the device if either of the supplies are too low. The device will go into shutdown if VDD is less than 2.5V (VDD UVLO = 2.5V) or if PVDD is less than 4V (PVDD UVLO = 4V). Mute Function The MAX9768 features a clickless/popless mute mode. When the device is muted, the outputs do not stop switching, only the volume level is muted to the speaker. To mute the MAX9768, drive MUTE to logic-high. MUTE should be held high during system power-up and power-down to ensure optimum click-and-pop performance. Volume Control The volume control operates from either an analog voltage input or through the I2C interface. The volume control has 64 levels, with the lowest setting equal to mute. To set the device to analog mode, connect ADDR1 and ADDR2 to GND. In analog mode, SDA/VOL is an analog input for volume control, see the Functional Diagram/Typical Application Circuit. The analog input range is ratiometric between 0.9 x VDD and 0.1 x VDD, where 0.9 x VDD = full mute and 0.1 x VDD = full volume (Table 6). In I2C mode, volume control for the speaker is controlled separately by the command register (Tables 4, 5, 6). See the Write Data Format section for more information regarding formatting data and tables to set volume levels. I2C Interface The MAX9768 features an I2C 2-wire serial interface consisting of a serial data line (SDA) and a serial clock line (SCL). SDA and SCL facilitate communication between the MAX9768 and the master at clock rates up to 400kHz. When the MAX9768 is used on an I2C bus with multiple devices, the VDD supply must stay powered on to ensure proper I2C bus operation. The master, typically a microcontroller, generates SCL and initiates data transfer on the bus. Figure 3 shows the 2wire interface timing diagram. A master device communicates to the MAX9768 by transmitting the proper address followed by the data word. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an acknowledge clock pulse. The MAX9768 SDA line operates as both an input and an open-drain output. A pullup resistor, greater than 500Ω, is required on the SDA bus. The MAX9768 SCL line operates as an input only. A pullup resistor, greater than 500Ω, is required on SCL if there are multiple masters on the bus, or if the master in a single-master system has an open-drain SCL output. Series resistors in line with SDA and SCL are optional. The SCL and SDA inputs suppress noise spikes to assure proper device operation even on a noisy bus. ______________________________________________________________________________________ 15 MAX9768 Hard Current Limit When the output current exceeds the hard current limit, 2.5A (typ), the MAX9768 disables the outputs and initiates a startup sequence. This startup sequence takes 220ms for the MAX9768 and 15ms for the MAX9768B. The shutdown and startup sequence is repeated until the output fault is removed. When in hard current limit, the output may make a soft clicking sound. The average supply current is relatively low, as the duty cycle of the output short is brief. Most applications will not enter hard current-limit mode unless the output is short circuited or incorrectly connected. MAX9768 10W Mono Class D Speaker Amplifier with Volume Control SDA tBUF tSU,STA tSU,DAT tHD,STA tHD,DAT tLOW tSP tSU,STO SCL tHIGH tHD,STA tR tF REPEATED START CONDITION START CONDITION STOP CONDITION START CONDITION Figure 3. 2-Wire Serial-Interface Timing Diagram Bit Transfer One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse. Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section). SDA and SCL idle high when the I2C bus is not busy. START and STOP Conditions A master device initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (Figure 4). A START (S) condition from the master signals the beginning of a transmission to the MAX9768. The master terminates transmission, and frees the bus, by issuing a STOP (P) condition. The bus remains active if a REPEATED START (Sr) condition is generated instead of a STOP condition. S Sr P SCL SDA Early STOP Conditions The MAX9768 recognizes a STOP condition at any point during data transmission except if the STOP condition occurs in the same high pulse as a START condition. Slave Address The slave address of the MAX9768 is 8 bits and consisting of 3 fields: the first field is 5 bits wide and is fixed (10010). The second is a 2-bit field, which is set through ADDR2 and ADDR1 (externally connected as logic-high or low). Third field is a R/W flag bit. Set R/W = 0 to write to the slave. A representation of the slave address is shown in Table 3. When ADDR1 and ADDR2 are connected to GND, serial interface communication is disabled. Table 4 summarizes the slave address of the device as a function of ADDR1 and ADDR2. Acknowledge The acknowledge bit (ACK) is a clocked 9th bit that the MAX9768 uses to handshake receipt each byte of data (Figure 5). The MAX9768 pulls down SDA during the master-generated 9th clock pulse. The SDA line must remain stable and low during the high period of the acknowledge clock pulse. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master can reattempt communication. Figure 4. START, STOP, and REPEATED START Conditions 16 ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control SA7 (MSB) SA6 SA5 SA4 SA3 SA2 SA1 SA0 (LSB) 1 0 0 1 0 ADDR2 ADDR1 R/W Table 4. Slave Address ADDR2 ADDR1 CLOCK PULSE FOR ACKNOWLEDGMENT SLAVE ADDRESS 0 0 Disabled 0 1 1001001_ 1 0 1001010_ 1 1 1001011_ Write Data Format A write to the MAX9768 includes transmission of a START condition, the slave address with the R/W bit set to 0 (see Table 3), one byte of data to the command register, and a STOP condition. Figure 6 illustrates the proper format for one frame. Volume Control The command register is used to control the volume level of the speaker amplifier. The two MSBs (D7 and D6) should be set to 00 to choose the speaker register. V5–V0 is the volume control data that will be written into the addresses register to set the volume level (see Tables 5 and 6). For a write byte operation, the master sends a single byte to the slave device (MAX9768). This is done as follows: 1) The master sends a start condition. 2) The master sends the 7-bit slave ID plus a write bit (low). 3) The addressed slave asserts an ACK on the data line. START CONDITION SCL 1 2 8 9 NOT ACKNOWLEDGE SDA ACKNOWLEDGE Figure 5. Acknowledge WRITE BYTE FORMAT S SLAVE ADDRESS WR 7 bits 0 SLAVE ADDRESS: EQUIVALENT TO CHIPSELECT LINE OF A 3WIRE INTERFACE. ACK DATA ACK P 8 bits DATA BYTE: GIVES A COMMAND. Figure 6. Write Data Format Example 4) The master sends 8 data bits. 5) The active slave asserts an ACK (or NACK) on the data line. 6) The master generates a stop condition. ______________________________________________________________________________________ 17 MAX9768 Table 3. Slave Address Block MAX9768 10W Mono Class D Speaker Amplifier with Volume Control Table 5. Data Byte Format D7 (MSB) D6 D5 D4 D3 D2 D1 D0 (LSB) 0 0 V5 V4 V3 V2 V1 V0 Table 6. Speaker Volume Levels 18 V5 V4 V3 V2 V1 V0 VOLUME POSITION VOLUME LEVEL (dB) STEP SIZE (dB) 1 1 1 1 1 1 63 9.5 0.7 1 1 1 1 1 0 62 8.8 0.7 1 1 1 1 0 1 61 8.2 0.6 1 1 1 1 0 0 60 7.6 0.6 1 1 1 0 1 1 59 7.0 0.6 1 1 1 0 1 0 58 6.5 0.5 1 1 1 0 0 1 57 5.9 0.5 1 1 1 0 0 0 56 5.4 0.5 1 1 0 1 1 1 55 4.9 0.5 1 1 0 1 1 0 54 4.4 0.5 1 1 0 1 0 1 53 3.9 0.6 1 1 0 1 0 0 52 3.4 0.4 1 1 0 0 1 1 51 2.9 0.5 1 1 0 0 1 0 50 2.4 0.4 1 1 0 0 0 1 49 2.0 0.4 1 1 0 0 0 0 48 1.6 0.4 1 0 1 1 1 1 47 1.2 0.7 1 0 1 1 1 0 46 0.5 1.0 1 0 1 1 0 1 45 -0.5 1.5 1 0 1 1 0 0 44 -1.9 1.5 1 0 1 0 1 1 43 -3.4 1.5 1 0 1 0 1 0 42 -5.0 1.1 1 0 1 0 0 1 41 -6.0 1.1 1 0 1 0 0 0 40 -7.1 1.8 1 0 0 1 1 1 39 -8.9 1.0 1 0 0 1 1 0 38 -9.9 1.0 1 0 0 1 0 1 37 -10.9 1.1 1 0 0 1 0 0 36 -12.0 1.2 1 0 0 0 1 1 35 -13.1 1.3 1 0 0 0 1 0 34 -14.4 0.9 1 0 0 0 0 1 33 -15.4 1.0 1 0 0 0 0 0 32 -16.4 1.1 ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control V5 V4 V3 V2 V1 V0 VOLUME POSITION VOLUME LEVEL (dB) STEP SIZE (dB) 0 1 1 1 1 1 31 -17.5 2.2 0 1 1 1 1 0 30 -19.7 1.9 0 1 1 1 0 1 29 -21.6 1.9 0 1 1 1 0 0 28 -23.5 1.7 0 1 1 0 1 1 27 -25.2 2.0 0 1 1 0 1 0 26 -27.2 2.6 0 1 1 0 0 1 25 -29.8 1.6 0 1 1 0 0 0 24 -31.5 2.0 0 1 0 1 1 1 23 -33.4 2.5 0 1 0 1 1 0 22 -36.0 1.6 0 1 0 1 0 1 21 -37.6 2.0 0 1 0 1 0 0 20 -39.6 2.5 0 1 0 0 1 1 19 -42.1 1.6 0 1 0 0 1 0 18 -43.7 2.0 0 1 0 0 0 1 17 -45.6 2.5 0 1 0 0 0 0 16 -48.1 2.5 0 0 1 1 1 1 15 -50.6 3.5 0 0 1 1 1 0 14 -54.2 2.5 0 0 1 1 0 1 13 -56.7 3.5 0 0 1 1 0 0 12 -60.2 2.5 0 0 1 0 1 1 11 -62.7 3.5 0 0 1 0 1 0 10 -66.2 2.5 0 0 1 0 0 1 9 -68.7 3.5 0 0 1 0 0 0 8 -72.2 2.5 0 0 0 1 1 1 7 -74.7 3.5 0 0 0 1 1 0 6 -78.3 2.5 0 0 0 1 0 1 5 -80.8 3.5 0 0 0 1 0 0 4 -84.3 2.5 0 0 0 0 1 1 3 -86.8 3.5 0 0 0 0 1 0 2 -90.3 2.5 0 0 0 0 0 1 1 -92.8 — 0 0 0 0 0 0 0 (MUTE) -161.5 — ______________________________________________________________________________________ MAX9768 Table 6. Speaker Volume Levels (continued) 19 MAX9768 10W Mono Class D Speaker Amplifier with Volume Control Applications Information limits. See Figure 7 for the correct connections of these components. Select a ferrite bead with 100Ω to 600Ω impedance, and rated for at least 1.5A. The capacitor value will vary based on the ferrite bead chosen and the actual speaker lead length. Select the capacitor value based on EMC performance. When doing bench evaluation without a filter or a ferrite bead filter, include a series inductor (68µH for 8Ω load) to model the actual loudspeaker’s behavior. If this inductance is omitted, the MAX9768 will have reduced efficiency and output power, as well as worse THD+N performance. Filterless Class D Operation The MAX9768 can be operated without a filter and meet common EMC radiation limits when the speaker leads are less than approximately 10cm. Lengths beyond 10cm are possible but should be verified against the appropriate EMC standard. Select the filterless modulation mode with spread-spectrum modulation mode for best performance. For longer speaker wire lengths, a simple ferrite bead and capacitor-based filter can be used to meet EMC Table 7. Setting Class D Output Modulation Scheme D7 (MSB) D6 D5 D4 1 1 0 1 1 1 0 1 D3 D2 D1 D0 (LSB) FUNCTION 0 1 0 1 Classic PWM 0 1 1 0 FILTERLESS MODULATION* *Power-on default. BOOT_+ C1 0.1μF OUT_+ MAX9768 C9 330pF OUT_C2 0.1μF C10 330pF BOOT_- Figure 7. Ferrite Bead Filter 20 ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control Adjustable Gain Gain-Setting Resistors External feedback resistors set the gain of the MAX9768. The output stage has an internal 20dB gain in addition to the externally set gain. Set the maximum gain by using resistors RF and RIN (Figure 9) as follows: ⎛R ⎞ AV = − 10⎜ F ⎟ V / V ⎝ RIN ⎠ The component selection is based on the load impedance of the speaker. Table 8 lists suggested values for a variety of load impedances. Choose RF between 10kΩ and 50kΩ. Please note that the actual gain of the amplifier is dependent on the volume level setting. For example, with the volume control set to +9.5dB, the amplifier gain would be 9.5dB + 20dB, assuming RF = RIN. The input amplifier can be configured into a variety of circuits. The FB terminal is an actual operational amplifier output, allowing the MAX9768 to be configured as a summing amplifier, a filter, or an equalizer, for example. Inductors L3 and L4, and capacitor C15 form the primary output filter. In addition to these primary filter components, other components in the filter improve its functionality. Capacitors C13 and C14, plus resistors R6 and R7, form a Zobel at the output. A Zobel corrects the output loading to compensate for the rising impedance of the loudspeaker. Without a Zobel, the filter will have a peak in its response near the cutoff frequency. Capacitors C11 and C12 provide additional high-frequency bypass to reduce radiated emissions. 4 1, 2 BOOT_+ OUT_+ C1 0.1μF L4 MAX9768 C11 C13 R6 RL C15 14, 18 15 L3 OUT_- BOOT_- C2 0.1μF C12 C14 R7 Figure 8. Output Filter for PWM Mode Table 8. Suggested Values for LC filter RL (Ω) L3, L4 (µH) C15 (µF) C11, C12 (µF) R6, R7 (Ω) C13, C14 (µF) 6 15 0.33 0.01 7.5 0.68 8 22 0.22 0.01 10 0.47 12 33 0.1 0.01 15 0.33 ______________________________________________________________________________________ 21 MAX9768 Inductor-Based Output Filters Some applications will use the MAX9768 with a full inductor-/capacitor-based (LC) output filter. This is common for longer speaker lead lengths, and to gain increased margin to EMC limits. Select the PWM output mode and use fixed-frequency modulation mode for best audio performance. See Figure 8 for the correct connections of these components. MAX9768 10W Mono Class D Speaker Amplifier with Volume Control 12V BOOT+ AUDIO CIN INPUT RIN IN IN MAX9768 OUT+ OUT 3.3V SHDN RF FB OUT- BOOT- PVDD 1μF 1μF VDD MAX1726 MAX9768 GND GND Figure 10. Using a Linear Regulator to Produce 3.3V from a 12V Power Supply Figure 9. Setting Gain Power Supplies The MAX9768 has different supplies for each portion of the device, allowing for the optimum combination of headroom power dissipation and noise immunity. The speaker amplifiers are powered from PVDD and can range from 4.5V to 14V. The remainder of the device is powered by VDD. Power supplies are independent of each other so sequencing is not necessary. Power may be supplied by separate sources or derived from a single higher source using a linear regulator to reduce the voltage as shown in Figure 10. Component Selection Input Filter An input capacitor, CIN, in conjunction with the input resistor of the MAX9768 forms a highpass filter that removes the DC bias from an incoming signal. The ACcoupling capacitor allows the amplifier to automatically bias the signal to an optimum DC level. Assuming zero source impedance, the -3dB point of the highpass filter is given by: f − 3 dB = 1 2πRINCIN Choose CIN so f-3dB is well below the lowest frequency of interest. Use capacitors whose dielectrics have lowvoltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased distortion at low frequencies. Other considerations when designing the input filter include the constraints of the overall system and the actual frequency band of interest. Although high-fidelity audio calls for a flat-gain response between 20Hz and 20kHz, portable voice-reproduction devices such as cellular phones and two-way radios need only concentrate 22 on the frequency range of the spoken human voice (typically 300Hz to 3.5kHz). In addition, speakers used in portable devices typically have a poor response below 300Hz. Taking these two factors into consideration, the input filter may not need to be designed for a 20Hz to 20kHz response, saving both board space and cost due to the use of smaller capacitors. BIAS Capacitor BIAS is the output of the internally generated DC bias voltage. The BIAS bypass capacitor, CBIAS, improves PSRR and THD+N by reducing power supply and other noise sources at the common-mode bias node. Bypass BIAS with a 2.2µF capacitor to GND. Supply Bypassing, Layout, and Grounding Proper layout and grounding are essential for optimum performance. Use large traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Large traces also aid in moving heat away from the package. Proper grounding improves audio performance, minimizes crosstalk between channels, and prevents any switching noise from coupling into the audio signal. Connect PGND and GND together at a single point on the PCB. Route all traces that carry switching transients away from GND and the traces/components in the audio signal path. Bypass VDD and PVDD with a 1µF capacitor to PGND. Place the bypass capacitors as close to the MAX9768 as possible. Place a bulk capacitor between PVDD and PGND, if needed. Use large, low-resistance output traces. Current drawn from the outputs increase as load impedance decreases. High output trace resistance decreases the power delivered to the load. Large output, supply, and GND traces allow more heat to move from the MAX9768 to the air, decreasing the thermal impedance of the circuit if possible. ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control Chip Information OUT- OUT- PVDD BOOT- VDD SYNCOUT PROCESS: BICMOS 18 17 16 15 14 13 TOP VIEW SHDN 19 12 SYNC MUTE 20 11 GND 10 BIAS PGND 21 MAX9768 PGND 22 ADDR2 23 9 GND 8 IN 7 FB + 1 2 3 4 5 6 OUT+ OUT+ PVDD BOOT+ SCLK SDA/VOL ADDR1 24 TQFN (4mm × 4mm) ______________________________________________________________________________________ 23 MAX9768 Pin Configuration Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 24 TQFN-EP T2444+4 21-0139 24L QFN THIN.EPS MAX9768 10W Mono Class D Speaker Amplifier with Volume Control 24 ______________________________________________________________________________________ 10W Mono Class D Speaker Amplifier with Volume Control ______________________________________________________________________________________ 25 MAX9768 Package Information (continued) For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. MAX9768 10W Mono Class D Speaker Amplifier with Volume Control Revision History REVISION NUMBER REVISION DATE 0 9/07 Initial release 1 3/08 Updated package outline 2 11/08 Corrected various items DESCRIPTION PAGES CHANGED — 24, 25 2, 4, 5, 11 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products Heaney is a registered trademark of Maxim Integrated Products, Inc.