TI1 LM4911Q Stereo 40mw low noise headphone amplifier with selectable capacitive coupled or ocl output Datasheet

LM4911, LM4911Q
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SNAS152M – MAY 2004 – REVISED JUNE 2011
LM4911/LM4911Q
Stereo 40mW Low Noise Headphone
Amplifier with Selectable Capacitive Coupled or OCL Output
Check for Samples: LM4911, LM4911Q
FEATURES
KEY SPECIFICATIONS
•
•
•
1
2
•
•
•
•
•
•
•
OCL or Capacitively Coupled Outputs (Patent
Pending)
External Gain-Setting Capability
Available in Space-Saving VSSOP and WSON
Packages
Ultra Low Current Shutdown Mode
Mute Mode Allows Fast Turn-on (1ms) with
Less Than 1mV Change on Outputs
2V - 5.5V Operation
Ultra Low Noise
LM4911QMM is an Automotive Grade Product
that is AEC-Q100 Grade 2 Qualified.
APPLICATIONS
•
•
•
•
Portable CD Players
PDAs
Portable Electronics Devices
Automotive
•
•
•
•
PSRR at 217Hz and 1kHz 65 dB (typ)
Output Power at 1kHz with VDD = 2.4V,
1% THD+N into a 16Ω Load 25 mW (typ)
Output Power at 1kHz with VDD = 3V,
1% THD+N into a 16Ω Load 40 mW (typ)
Shutdown Current 2.0 µA (max)
Output Voltage Change on Release from
Shutdown VDD = 2.4V, RL = 16Ω (C-Coupled) 1
mV (max)
Mute Current 100 µA (max)
DESCRIPTION
The LM4911/LM4911Q is an stereo audio power
amplifier capable of delivering 40mW per channel of
continuous average power into a 16Ω load or 25mW
per channel into a 32Ω load at 1% THD+N from a 3V
power supply.
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal amount of external components. Since the
LM4911/LM4911Q does not require bootstrap
capacitors or snubber networks, it is optimally suited
for low-power portable systems. In addition, the
LM4911/LM4911Q may be configured for either
single-ended capacitively coupled outputs or for OCL
outputs (patent pending).
Block Diagram
Figure 1. Block Diagram
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2011, Texas Instruments Incorporated
LM4911, LM4911Q
SNAS152M – MAY 2004 – REVISED JUNE 2011
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DESCRIPTION (CONTINUED)
The LM4911/LM4911Q features a low-power consumption shutdown mode and a power mute mode that allows
for faster turn on time with less than 1mV voltage change at outputs on release. Additionally, the
LM4911/LM4911Q features an internal thermal shutdown protection mechanism.
The LM4911/LM4911Q is unity gain stable and may be configured with external gain-setting resistors.
A Q-grade version is available for automotive applications. It is AEC-Q100 grade 2 qualified and packaged in a
10–pin VSSOP package (LM4911QMM).
Typical Application
Figure 2. Typical Capacitive Coupled Output Configuration Circuit
Figure 3. Typical OCL Output Configuration Circuit
2
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Connection Diagram
Figure 4. VSSOP Package (Top View)
See Package Number DGS0010A
IN A
1
10
VDD
SD
2
9
VoA
MUTE
3
8
VoC
BYPASS
4
7
VoB
IN B
5
6
GND
Figure 5. WSON Package (Top View)
See Package Number NGY0010A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
Supply Voltage
6.0V
−65°C to +150°C
Storage Temperature
Input Voltage
-0.3V to VDD + 0.3V
Power Dissipation
(3)
Internally Limited
ESD Susceptibility
(4)
2000V
ESD Susceptibility
(5)
200V
Junction Temperature
150°C
θJC (VSSOP)
Thermal Resistance
(1)
(2)
(3)
(4)
(5)
(6)
56°C/W
θJA (VSSOP)
190°C/W
θJA (WSON)
(6)
63°C/W
θJA (WSON)
(6)
12°C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits.Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensures specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4911/LM4911Q, see power derating currents for more information.
Human body model, 100pF discharged through a 1.5kΩ resistor.
Machine Model, 220pF-240pF discharged through all pins.
The NGY0010A package has its exposed-DAP soldered to an exposed 1.2in2 area of 1oz. Printed circuit board copper.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
(LM4911MM)
−40°C ≤ T A ≤ 85°C
TMIN ≤ TA ≤ TMAX
(LM4911QMM)
−40°C ≤ T A ≤ 105°C
2V ≤ VCC ≤ 5.5V
Supply Voltage (VDD)
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Electrical Characteristics VDD = 5.0V
(1) (2) (3)
The following specifications apply for VDD = 5V, RL = 16Ω, and CB = 4.7µF unless otherwise specified. Limits apply to TA =
25°C.
Symbol
Parameter
Conditions
LM4911
LM4911Q
Typ (4)
Limit (5)
Typ (4)
Limit (5)
Units
(Limits)
2
5
2
5
mA (max)
6
mA (max)
VIN = 0V, IO = 0A
IDD
Quiescent Current
TA = +25°C
TA = –40°C to +105°C
ISD
Shutdown Current
IM
Mute Current
VSHUTDOWN = GND
0.1
2
0.1
2
µA (max)
50
100
50
100
µA (max)
150
µA (max)
VMUTE = VDD, C-Coupled
TA = +25°C
TA = –40°C to +105°C
VSDIH
Shutdown Voltage Input
High
TA = –40°C to +105°C
1.8
1.8
V
VSDIL
Shutdown Voltage Input
Low
TA = –40°C to +105°C
0.4
0.4
V
VMIH
Mute Voltage Input High
TA = –40°C to +105°C
1.8
1.8
V
VMIL
Mute Voltage Input Low
TA = –40°C to +105°C
0.4
0.4
V
THD ≤ 1%, f 1kHz
PO
Output Power
OCL, RLOAD = 16Ω
80
mW (max)
LM4911/LM4911QLD OCL, RLOAD
= 16Ω (6)
145
mW (max)
OCL, RLOAD = 32Ω
80
mW (max)
C-CUPL, RLOAD = 16Ω
TA = +25°C
145
134
145
TA = –40°C to +105°C
C-CUPL, RLOAD = 32Ω
mW (min)
130
85
mW (min)
mW (max)
THD+N
Total Harmonic Distortion +
PO = 15.3mW, f = 1kHz
Noise
0.1
PSRR
Power Supply Rejection
Ratio
VRIPPLE = 200mV sine p-p
f = 1kHz (8)
65
65
dB
VON
Output Noise Voltage
BW = 20Hz to 20kHz, A-weighted
10
10
µV
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
4
0.5
0.1
0.5
% (max)
(7)
All voltages are measured with respect to the GND pin unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits.Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensures specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to TI's AOQL (Average Outgoing Quality Level).
The NGY0010A package has its exposed-DAP soldered to an exposed 1.2in2 area of 1oz. Printed circuit board copper.
The limit is specified over the temperature range of –40°C to +85°C.
10Ω terminated input.
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Electrical Characteristics VDD = 3.3V
(1) (2) (3)
The following specifications apply for VDD = 3.3V, RL = 16Ω, and CB = 4.7µF unless otherwise specified.
Limits apply to TA = 25°C.
Symbol
Parameter
Conditions
LM4911
LM4911Q
Typ (4)
Limit (5)
Typ (4)
Limit (5)
Units
(Limits)
1.5
3
1.5
3
mA (max)
4
mA (max)
2
µA (max)
4
µA (max)
100
µA (max)
125
µA (max)
VIN = 0V, IO = 0A
IDD
Quiescent Current
TA = +25°C
TA = –40°C to +105°C
VSHUTDOWN = GND
ISD
Shutdown Current
TA = +25°C
0.1
2
0.1
TA = –40°C to +105°C
VMUTE = VDD, C-Coupled
IM
Mute Current
TA = +25°C
50
100
50
TA = –40°C to +105°C
VSDIH
Shutdown Voltage Input
High
TA = –40°C to +105°C
1.8
1.8
V
VSDIL
Shutdown Voltage Input
Low
TA = –40°C to +105°C
0.4
0.4
V
VMIH
Mute Voltage Input High
TA = –40°C to +105°C
1.8
1.8
V
VMIL
Mute Voltage Input Low
TA = –40°C to +105°C
0.4
0.4
V
55
mW (min)
50
mW (min)
THD ≤ 1%, `C-CUPL, RL = 16Ω
PO
Output Power
TA = +25°C
60
55
60
THD+N
Total Harmonic Distortion +
Noise
PO = 15.3mW, f = 1kHz
0.1
PSRR
Power Supply Rejection
Ratio
VRIPPLE = 200mV sine p-p
f = 1kHz (7)
65
65
dB
VON
Output Noise Voltage
BW = 20Hz to 20kHz, A-weighted
10
10
µV
TA = –40°C to +105°C
(1)
(2)
(3)
(4)
(5)
(6)
(7)
0.5
0.1
0.5
% (max)
(6)
All voltages are measured with respect to the GND pin unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits.Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensures specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to TI's AOQL (Average Outgoing Quality Level).
The limit is specified over the temperature range of –40°C to +85°C.
10Ω terminated input.
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Electrical Characteristics VDD = 3.0V
(1) (2) (3)
The following specifications apply for VDD = 3.0V, RL = 16Ω, and CB = 4.7µF unless otherwise specified.
Limits apply to TA = 25°C.
Symbol
Parameter
Conditions
LM4911
LM4911Q
Units
(Limits)
Typ (4)
Limit (5)
Typ (4)
Limit (5)
1.5
3
1.5
3
mA
(max)
4
mA
(max)
VIN = 0V, IO = 0A
IDD
Quiescent Current
TA = +25°C
TA = –40°C to +105°C
ISD
Shutdown Current
VSHUTDOWN = GND
0.1
2
0.1
2
µA (max)
50
100
50
100
µA (max)
120
µA (max)
VMUTE = VDD, C-Coupled
IM
Mute Current
TA = +25°C
TA = –40°C to +105°C
VSDIH
Shutdown Voltage Input
High
TA = –40°C to +105°C
1.8
1.8
V
VSDIL
Shutdown Voltage Input Low TA = –40°C to +105°C
0.4
0.4
V
VMIH
Mute Voltage Input High
TA = –40°C to +105°C
1.8
1.8
V
V MIL
Mute Voltage Input Low
TA = –40°C to +105°C
0.4
0.4
V
35
mW
(min)
30
mW
(min)
THD ≤ 1%; C-CUPL, RL = 16Ω
TA = +25°C
PO
Output Power
40
40
TA = –40°C to +105°C
THD ≤ 1%, f = 1kHz, RL = 32Ω
25
mW
(min)
THD+N
Total Harmonic Distortion +
Noise
PO = 15.3mW, f = 1kHz
0.1
PSRR
Power Supply Rejection
Ratio
VRIPPLE = 200mV sine p-p
f = 1kHz (7)
65
65
dB
VON
Output Noise Voltage
BW = 20 Hz to 20kHz, A-weighted
10
10
µV
(1)
(2)
(3)
(4)
(5)
(6)
(7)
6
0.5
0.1
0.5
% (max)
(6)
All voltages are measured with respect to the GND pin unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits.Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensures specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to TI's AOQL (Average Outgoing Quality Level).
The limit is specified over the temperature range of –40°C to +85°C.
10Ω terminated input.
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Electrical Characteristics VDD = 2.4V
(1) (2) (3)
The following specifications apply for VDD = 2.4V, RL = 16Ω, and CB = 4.7µF unless otherwise specified.
Limits apply to TA = 25°C.
Symbol
Parameter
Conditions
LM4911
LM4911Q
Units
(Limits)
Typ (4)
Limit (5)
Typ (4)
Limit (5)
1.5
3
1.5
3
mA
(max)
4
mA
(max)
2
µA (max)
VIN = 0V, IO = 0A
IDD
Quiescent Current
TA = +25°C
TA = –40°C to +105°C
ISD
Shutdown Current
VSHUTDOWN = GND
0.1
2
0.1
40
80
40
VMUTE = VDD, C-Coupled
IM
Mute Current
T A = +25°C
TA = –40°C to +105°C
80
µA (max)
100
µA (max)
VSDIH
Shutdown Voltage Input
High
TA = –40°C to +105°C
1.8
1.8
V
VSDIL
Shutdown Voltage Input Low TA = –40°C to +105°C
0.4
0.4
V
VMIH
Mute Voltage Input High
1.8
1.8
V
VMIL
Mute Voltage Input Low
0.4
0.4
V
20
mW
(min)
15
mW
(min)
TA = –40°C to +105°C
THD = 1%; C-CUPL, RL = 16Ω
TA = +25°C
PO
25
25
Output Power
TA = –40°C to +105°C
THD+N
Total Harmonic Distortion +
Noise
TWU
Wake Up Time
TUM
THD ≤1%; RL = 32Ω, f = 1kHz
12
PO = 15.3mW, f = 1kHz
0.1
OCL
12
0.5
0.1
0.5
% (max)
(6)
0.5
0.5
C-Coupled, CO = 100μF
2
2
Un-mute Time
C-Coupled, CO= 100μF
0.01
VOSD
Output Voltage Change on
Release from Shutdown
C-Coupled, CO= 100μF
PSRR
Power Supply Rejection
Ratio
VRIPPLE = 200mV sine p-p
f = 1kHz (7)
65
65
dB
VON
Output Noise Voltage
BW = 20 Hz to 20kHz, A-weighted
10
10
dB
(1)
(2)
(3)
(4)
(5)
(6)
(7)
0.02
0.01
1
s
s
0.02
s (max)
1
mV
(max)
All voltages are measured with respect to the GND pin unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional but do not ensure specific performance limits.Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensures specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to TI's AOQL (Average Outgoing Quality Level).
The limit is specified over the temperature range of –40°C to +85°C.
10Ω terminated input.
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External Components Description
(Figure 2)
Components
8
Functional Description
1.
RI
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high-pass
filter with Ci at fc = 1/(2πRiCi).
2.
CI
Input coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high-pass filter
with Ri at fc = 1/(2πRiCi). Refer to the section Proper Selection of External Components, for an explanation of how to
determine the value of Ci.
3.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
4.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply section for information
concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB
6.
Co
Output coupling capacitor which blocks the DC voltage at the amplifier's output. Forms a high pass filter with RL at fo =
1/(2πRLCo)
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Typical Performance Characteristics
THD+N
vs
Frequency
THD+N
vs
Frequency
Figure 6.
Figure 7.
THD+N
vs
Frequency
THD+N
vs
Frequency
Figure 8.
Figure 9.
THD+N
vs
Frequency
THD+N
vs
Frequency
Figure 10.
Figure 11.
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Typical Performance Characteristics (continued)
10
THD+N
vs
Frequency
THD+N
vs
Frequency
Figure 12.
Figure 13.
THD+N
vs
Frequency
THD+N
vs
Frequency
Figure 14.
Figure 15.
THD+N
vs
Frequency
THD+N
vs
Frequency
Figure 16.
Figure 17.
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Typical Performance Characteristics (continued)
THD+N
vs
Output Power
THD+N
vs
Output Power
Figure 18.
Figure 19.
THD+N
vs
Output Power
THD+N
vs
Output Power
Figure 20.
Figure 21.
THD+N
vs
Output Power
THD+N
vs
Output Power
Figure 22.
Figure 23.
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Typical Performance Characteristics (continued)
12
THD+N
vs
Output Power
THD+N
vs
Output Power
Figure 24.
Figure 25.
Output Resistance
vs
Load Resistance
Output Power
vs
Supply Voltage
Figure 26.
Figure 27.
Output Power
vs
Supply Voltage
Output Power
vs
Supply Voltage
Figure 28.
Figure 29.
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Typical Performance Characteristics (continued)
Output Power
vs
Supply Voltage
Output Power
vs
Load Resistance
Figure 30.
Figure 31.
Output Power
vs
Load Resistance
Power Dissipation
vs.
Output Power
Figure 32.
Figure 33.
Power Dissipation
vs.
Output Power
Power Dissipation
vs
Output Power
Figure 34.
Figure 35.
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Typical Performance Characteristics (continued)
14
Channel Separation
Channel Separation
Figure 36.
Figure 37.
Channel Separation
Channel Separation
Figure 38.
Figure 39.
Channel Separation
Channel Separation
Figure 40.
Figure 41.
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Typical Performance Characteristics (continued)
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Figure 42.
Figure 43.
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Figure 44.
Figure 45.
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Figure 46.
Figure 47.
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Typical Performance Characteristics (continued)
16
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Figure 48.
Figure 49.
Frequency Response vs
Input Capacitor Size
Frequency Response vs
Input Capacitor Size
Figure 50.
Figure 51.
Open Loop Frequency Response
Supply Voltage vs
Supply Current
Figure 52.
Figure 53.
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Typical Performance Characteristics (continued)
Clipping Voltage vs
Supply Voltage
Noise Floor
Figure 54.
Figure 55.
Shutdown Hysteresis Voltage, Vdd=5V
Shutdown Hysteresis Voltage, Vdd=3V
Figure 56.
Figure 57.
Power Derating Curve
Figure 58.
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Typical Performance Characteristics
LM4911/LM4911Q Specific Characteristics
The NGY0010A package has its exposed-DAP soldered to an exposed 1.2in2 area of 1oz. Printed circuit board copper.
10
THD+N
vs
Frequency
at VDD = 5V, RL = 16Ω
PO = 100mW, OCL
10
5
5
THD+N
vs
Output Power
at VDD = 5V, RL = 16Ω, OCL
2
1
1
0.5
THD + N (%)
THD + N (%)
2
0.5
0.2
0.1
20kHz
20Hz
0.2
0.1
0.05
0.02
0.01
0.05
1kHz
0.005
0.02
0.01
20
50 100 200 500 1k 2k
0.002
0.001
1m
5k 10k 20k
2m
5m 10m 20m
50m 100m 200m
OUTPUT POWER (W)
FREQUENCY (Hz)
Figure 59.
Figure 60.
Power Dissipation
vs
Output Power
at VDD = 5V, RL = 16Ω
THD+N ≤ 1%, OCL
POWER DISSIPATION (mW)
600
500
400
300
200
100
0
0
50
100
150
200
250
300
OUTPUT POWER (mW)
Figure 61.
18
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APPLICATION INFORMATION
AMPLIFIER CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4911/LM4911Q has three operational amplifiers internally. Two of the amplifier's
have externally configurable gain while the other amplifier is internally fixed at the bias point acting as a unitygain buffer. The closed-loop gain of the two configurable amplifiers is set by selecting the ratio of Rf to Ri.
Consequently, the gain for each channel of the IC is:
AVD = -(Rf / Ri)
By driving the loads through outputs VoA and VoB with VoC acting as a buffered bias voltage the
LM4911/LM4911Q does not require output coupling capacitors. The classical single-ended amplifier configuration
where one side of the load is connected to ground requires large, expensive output coupling capacitors.
A configuration such as the one used in the LM4911/LM4911Q has a major advantage over single supply, singleended amplifiers. Since the outputs VoA, VoB, and VoC are all biased at 1/2 VDD, no net DC voltage exists across
each load. This eliminates the need for output coupling capacitors which are required in a single-supply, singleended amplifier configuration. Without output coupling capacitors in a typical single-supply, single-ended
amplifier, the bias voltage is placed across the load resulting in both increased internal IC power dissipation and
possible loudspeaker damage.
OUTPUT CAPACITOR vs. CAPACITOR COUPLED
The LM4911/LM4911Q is an stereo audio power amplifier capable of operating in two distinct output modes:
capacitor coupled (C-CUPL) or output capacitor-less (OCL). The LM4911/LM4911Q may be run in capacitor
coupled mode by using a coupling capacitor on each single-ended output (VoA and VoB) and connecting VoC to
ground. This output coupling capacitor blocks the half supply voltage to which the output amplifiers are typically
biased and couples the audio signal to the headphones or other single-ended (SE) load. The signal return to
circuit ground is through the headphone jack's sleeve.
The LM4911/LM4911Q can also eliminate these output coupling capacitors by running in OCL mode. Unless
shorted to ground, VoC is internally configured to apply a ½ VDD bias voltage to a stereo headphone jack's
sleeve. This voltage matches the bias voltage present on VoA and VoB outputs that drive the headphones. The
headphones operate in a manner similar to a bridge-tied load (BTL). Because the same DC voltage is applied to
both headphone speaker terminals this results in no net DC current flow through the speaker. AC current flows
through a headphone speaker as an audio signal's output amplitude increases on the speaker's terminal.
The headphone jack's sleeve is not connected to circuit ground when used in OCL mode. Using the headphone
output jack as a line-level output will place the LM4911/LM4911Q's ½ VDD bias voltage on a plug's sleeve
connection. This presents no difficulty when the external equipment uses capacitively coupled inputs. For the
very small minority of equipment that is DC coupled, the LM4911/LM4911Q monitors the current supplied by the
amplifier that drives the headphone jack's sleeve. If this current exceeds 500mAPK, the amplifier is shutdown,
protecting the LM4911/LM4911Q and the external equipment.
MODE SELECT DETAIL
The LM4911/LM4911Q may be set up to operate in one of two modes: OCL and cap-coupled. The default state
of the LM4911/LM4911Q at power up is cap-coupled. During initial power up or return from shutdown, the
LM4911/LM4911Q must detect the correct mode of operation (OCL or cap-coupled) by sensing the status of the
VOC pin. When the bias voltage of the part ramps up to 60mV (as seen on the Bypass pin), an internal
comparator detects the status of VOC; and at 80mV, latches that value in place. Ramp up of the bias voltage will
proceed at a different rate from this point on depending upon operating mode. OCL mode will ramp up about 11
times faster than cap-coupled. Shutdown is not a valid command during this time period (TWU) and should not
enabled to ensure a proper power on reset (POR) signal. In addition, the slew rate of VDD must be greater than
2.5V/ms to ensure reliable POR. Recommended power up timing is shown in Figure 63 along with proper usage
of Shutdown and Mute. The mode select circuit is suspended during CB discharge time.
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The circuit shown in Figure 62 presents an applications solution to the problem of using different supply voltages
with different turn-on times in a system with the LM4911/LM4911Q. This circuit shows the LM4911/LM4911Q
with a 25-50kΩ pull-up resistor connected from the shutdown pin to VDD. The shutdown pin of the
LM4911/LM4911Q is also being driven by an open drain output of an external microcontroller on a separate
supply. This circuit ensures that shutdown is disabled when powering up the LM4911/LM4911Q by either
allowing shutdown to be high before the LM4911/LM4911Q powers on (the microcontroller powers up first) or
allows shutdown to ramp up with VDD (the LM4911/LM4911Q powers up first). This will ensure the
LM4911/LM4911Q powers up properly and enters the correct mode of operation (cap-coupled or OCL).
Figure 62. Recommended Circuit for Different Supply Turn-On Timing
Figure 63. Turn-On, Shutdown, and Mute Timing for Cap-Coupled Mode
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POWER DISSIPATION
Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to
ensure a successful design. When operating in capacitor-coupled mode, Equation 1 states the maximum power
dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output
load.
PDMAX = (VDD) 2 / (2π2RL)
(1)
Since the LM4911/LM4911Q has two operational amplifiers in one package, the maximum internal power
dissipation point is twice that of the number which results from Equation 1. From Equation 1, assuming a 3V
power supply and an 32Ω load, the maximum power dissipation point is 14mW per amplifier. Thus the maximum
package dissipation point is 28mW.
When operating in OCL mode, the maximum power dissipation increases due to the use of the third amplifier as
a buffer and is given in Equation 2:
PDMAX = 4(VDD) 2 / (π2RL)
(2)
The maximum power dissipation point obtained from either Equation 1 or Equation 2 must not be greater than
the power dissipation that results from Equation 3:
PDMAX = (TJMAX - TA) / θJA
(3)
For package DGS0010A, θJA = 190°C/W; for package NGY0010A, θJA = 63°C/W. TJMAX = 150°C for the
LM4911/LM4911Q. Depending on the ambient temperature, TA, of the system surroundings, Equation 3 can be
used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 1 or
Equation 2 is greater than that of Equation 3, then either the supply voltage must be decreased, the load
impedance increased or TA reduced. For the typical application of a 3V power supply, with a 32Ω load, the
maximum ambient temperature possible without violating the maximum junction temperature is approximately
144°C provided that device operation is around the maximum power dissipation point. Thus, for typical
applications, power dissipation is not an issue. Power dissipation is a function of output power and thus, if typical
operation is not around the maximum power dissipation point, the ambient temperature may be increased
accordingly. Refer to the Typical Performance Characteristics curves for power dissipation information for lower
output powers.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4911/LM4911Q's exposed-DAP (die attach paddle) package (WSON) provides a low thermal resistance
between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the
die to the surrounding PCB copper traces, ground plane, and surrounding air.
The WSON package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad
may be connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink,
and radiation area. Further detailed and specific information concerning PCB layout, fabrication, and mounting an
WSON package is available from TI's Package Engineering Group under application note AN-1187 (SNOA401).
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important for low noise performance and high power supply
rejection. The capacitor location on the power supply pins should be as close to the device as possible.
Typical applications employ a 3V regulator with 10mF tantalum or electrolytic capacitor and a ceramic bypass
capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of the
LM4911/LM4911Q. A bypass capacitor value in the range of 0.1µF to 1µF is recommended for CS.
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MICRO POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the LM4911/LM4911Q's shutdown function. Activate micropower shutdown by applying a logic-low voltage to the SHUTDOWN pin. When active, the LM4911/LM4911Q's
micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The trigger point
varies depending on supply voltage and is shown in the Shutdown Hysteresis Voltage graphs in the Typical
Performance Characteristics section. The low 0.1µA(typ) shutdown current is achieved by applying a voltage that
is as near as ground as possible to the SHUTDOWN pin. A voltage that is higher than ground may increase the
shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole,
single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩ
pull-up resistor between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and
ground. Select normal amplifier operation by opening the switch. Closing the switch connects the SHUTDOWN
pin to ground, activating micro-power shutdown.
The switch and resistor specifies that the SHUTDOWN pin will not float. This prevents unwanted state changes.
In a system with a microprocessor or microcontroller, use a digital output to apply the control voltage to the
SHUTDOWN pin. Driving the SHUTDOWN pin with active circuitry eliminates the pull-up resistor.
Shutdown enable/disable times are controlled by a combination of CB and VDD. Larger values of CB results in
longer turn on/off times from Shutdown. Smaller VDD values also increase turn on/off time for a given value of CB.
Longer shutdown times also improve the LM4911/LM4911Q's resistance to click and pop upon entering or
returning from shutdown. For a 2.4V supply and CB = 4.7µF, the LM4911/LM4911Q requires about 2 seconds to
enter or return from shutdown. This longer shutdown time enables the LM4911/LM4911Q to have virtually zero
pop and click transients upon entering or release from shutdown.
Smaller values of CB will decrease turn-on time, but at the cost of increased pop and click and reduced PSRR.
Since shutdown enable/disable times increase dramatically as supply voltage gets below 2.2V, this reduced turnon time may be desirable if extreme low supply voltage levels are used as this would offset increases in turn-on
time caused by the lower supply voltage. This technique is not recommended for OCL mode since shutdown
enable/disable times are very fast (0.5s) independent of supply voltage.
When in cap-coupled mode, some restrictions on the usage of Mute are in effect when entering or returning from
shutdown. These restrictions require Mute not be toggled immediately following a return or entrance to shutdown
for a brief period. These periods are shown as X1 and X2 and are discussed in greater detail in the Mute section
as well as shown in Figure 63.
MUTE
When in C-CUPL mode, the LM4911/LM4911Q also features a mute function that enables extremely fast turnon/turn-off with a minimum of output pop and click with a low current consumption (≤ 100µA). The mute function
leaves the outputs at their bias level, thus resulting in higher power consumption than shutdown mode, but also
provides much faster turn on/off times. Mute mode is enabled by providing a logic high signal on the MUTE pin in
the opposite manner as the shutdown function described above. Threshold voltages and activation techniques
match those given for the shutdown function as well.
Mute may not appear to function when the LM4911/LM4911Q is used to drive high impedance loads. This is
because the LM4911/LM4911Q relies on a typical headphone load (16-32Ω) to reduce input signal feedthrough
through the input and feedback resistors. Mute attenuation can thus be calculated by the following formula:
Mute Attenuation (dB) = 20Log(RL/ (Ri+RF)
Parallel load resistance may be necessary to achieve satisfactory Mute levels when the application load is known
to be high impedance.
The mute function is not necessary when the LM4911/LM4911Q is operating in OCL mode since the shutdown
function operates quickly in OCL mode with less power consumption than mute.
Mute may be enabled during shutdown transitions, but should not be toggled for a brief period immediately after
exiting or entering shutdown. These brief time periods are labeled X1 (time after returning from shutdown) and
X2 (time after entering shutdown) and are shown in the timing diagram given in Figure 63. X1 occurs
immediately following a return from shutdown (TWU) and lasts 40ms±25%. X2 occurs after the part is placed in
shutdown and the decay of the bias voltage has occurred (2.2*400k*CB for cap-coupled and 2.2*100k*CB for
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OCL) and lasts for 100ms±25%. The timing of these transition periods relative to X1 and X2 is also shown in
Figure 63. Mute should not be toggled during these time periods, but may be made during the shutdown
transitions or any other time the part is in normal operation (while in cap-coupled mode - Mute is not valid in OCL
mode). Failure to operate mute correctly may result in much higher click and pop values or failure of the device
to mute at all.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize
device and system performance. While the LM4911/LM4911Q is tolerant of external component combinations,
consideration to component values must be used to maximize overall system quality.
The LM4911/LM4911Q is unity-gain stable which gives the designer maximum system flexibility. The
LM4911/LM4911Q should be used in low gain configurations to minimize THD+N values, and maximize the
signal to noise ratio. Low gain configurations require large input signals to obtain a given output power. Input
signals equal to or greater than 1Vrms are available from sources such as audio codecs. Very large values should
not be used for the gain-setting resistors. Values for Ri and Rf should be less than 1MΩ. Please refer to the
section, Audio Power Amplifier Design, for a more complete explanation of proper gain selection
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the
bandwidth is dictated by the choice of external components shown in Figure 2 and Figure 3. The input coupling
capacitor, Ci, forms a first order high pass filter which limits low frequency response. This value should be
chosen based on needed frequency response and turn-on time.
SELECTION OF INPUT CAPACITOR SIZE
Amplifying the lowest audio frequencies requires a high value input coupling capacitor, Ci. A high value capacitor
can be expensive and may compromise space efficiency in portable designs. In many cases, however, the
headphones used in portable systems have little ability to reproduce signals below 60Hz. Applications using
headphones with this limited frequency response reap little improvement by using a high value input capacitor.
In addition to system cost and size, turn on time is affected by the size of the input coupling capacitor Ci. A larger
input coupling capacitor requires more charge to reach its quiescent DC voltage. This charge comes from the
output via the feedback Thus, by minimizing the capacitor size based on necessary low frequency response,
turn-on time can be minimized. A small value of Ci (in the range of 0.1µF to 0.39µF), is recommended.
AUDIO POWER AMPLIFIER DESIGN
A 25mW/32Ω AUDIO AMPLIFIER
Given:
Power Output
25mWrms
Load Impedance
32Ω
Input Level
1Vrms
Input Impedance
20kΩ
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating
from the Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply
rail can be easily found.
3V is a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates
headroom that allows the LM4911/LM4911Q to reproduce peak in excess of 25mW without producing audible
distortion. At this time, the designer must make sure that the power supply choice along with the output
impedance does not violate the conditions explained in the Power Dissipation section.
Once the power dissipation equations have been addressed, the required gain can be determined from
Equation 1.
(4)
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From Equation 3, the minimum AV is 0.89; use AV = 1. Since the desired input impedance is 20kΩ, and with a AV
gain of 1, a ratio of 1:1 results from for Rf to Ri. The values are chosen with Ri = 20kΩ and Rf = 20kΩ. The final
design step is to address the bandwidth requirements which must be stated as a pair of -3dB frequency points.
Five times away from a -3dB point is 0.17dB down from passband response which is better than the required ±
0.25dB specified.
fL = 100Hz/5 = 20Hz
fH = 20kHz * 5 = 100kHz
As stated in the External Components section, Ri in conjunction with Ci creates a
Ci ≥ 1 / (2π * 20kΩ * 20Hz) = 0.397µF; use 0.39µF.
The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,
AV. With an AV = 1 and fH = 100kHz, the resulting GBWP = 100kHz which is much smaller than the
LM4911/LM4911Q GBWP of 10MHz. This figure displays that is a designer has a need to design an amplifier
with higher differential gain, the LM4911/LM4911Q can still be used without running into bandwidth limitations.
Figure 62 shows an optional resistor connected between the amplifier output that drives the headphone jack
sleeve and ground. This resistor provides a ground path that suppressed power supply hum. This hum may
occur in applications such as notebook computers in a shutdown condition and connected to an external
powered speaker. The resistor's 100Ω value is a suggested starting point. Its final value must be determined
based on the tradeoff between the amount of noise suppression that may be needed and minimizing the
additional current drawn by the resistor (25mA for a 100Ω resistor and a 5V supply).
ESD PROTECTION
As stated in the Absolute Maximum Ratings, the LM4911/LM4911Q has a maximum ESD susceptibility rating of
2000V. For higher ESD voltages, the addition of a PCDN042 dual transil (from California Micro Devices), as
shown in Figure 64, will provide additional protection.
Figure 64. The PCDN042 provides additional ESD protection beyond the 2000V shown in the
Absolute Maximum Ratings for the VOC output
24
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PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
LM4911MM/NOPB
ACTIVE
VSSOP
DGS
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
GA3
LM4911QMM/NOPB
ACTIVE
VSSOP
DGS
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 105
GC9
LM4911QMMX/NOPB
ACTIVE
VSSOP
DGS
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 105
GC9
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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26-Aug-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM4911MM/NOPB
VSSOP
DGS
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM4911QMM/NOPB
VSSOP
DGS
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM4911QMMX/NOPB
VSSOP
DGS
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM4911MM/NOPB
VSSOP
DGS
10
1000
210.0
185.0
35.0
LM4911QMM/NOPB
VSSOP
DGS
10
1000
210.0
185.0
35.0
LM4911QMMX/NOPB
VSSOP
DGS
10
3500
367.0
367.0
35.0
Pack Materials-Page 2
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