INTERSIL ISL55164

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SOC Dual Channel 133MHz Pin Electronics Solution
ISL55164
The ISL55164 is a highly integrated System-on-a-Chip (SOC)
pin electronics solution aimed at incorporating every analog
function, along with some digital support functionality,
required on a per channel basis for Automated Test
Equipment, The interface, control and I/O of the chip are all
digital; all analog circuitry is inside the chip. Two complete
tester channels are integrated into each ISL55164.
• Deskew
- Propagation Delay Adjustment (up to 12.8ns range)
- Falling Edge Adjustment (up to ±3.2ns range)
- Auto Calibration via PLL
• On-Chip DC Levels
- 11 Levels/Pin
- Gain and Offset /Level
- DUT Ground Sensing/Pin
The ISL55164 is pin and functionally compatible with Venus.
Features
• 3-Bit Serial CPU Port
- Load Internal Registers and Memory
- Read Back Internal States
• Flexible High Speed Digital Inputs and Outputs
- Selectable On-Chip Terminations for High Speed Inputs
- 50Ω Series Terminated High Speed for Comparator Outputs
• 133MHz
• 3.75ns Minimum Pulse Width
• Pin Electronics Driver/Comparator
-
3 Level Driver (DVH/DVL/VTT)
8V Driver Output Swings
16V Comparator Input Voltage Range
Extremely Low HiZ Leakage over 16V Range
• Package/Power Dissipation
- 64-Lead, 10mm x 10mm TQFP with Top Exposed Heat Slug
- Pdq ≤ 1.10W/Channel; Pdq ≤ 2.2W/Chip
• Per Pin PMU
- FV, FI, MV, MI
- 8 Current Ranges (32mA, 8mA, 2mA, 512μA, 128μA,
32μA, 8μA, 2μA)
- +12V Super Voltage Capability
- Resistive Load (8 selectable resistor values)
Applications
• Automated Test Equipment
• Instrumentation
• ASIC Verifiers
MONITOR
DVH-0
DVH-1
DVL-0
DVL-1
EXT_FORCE
DATA_0
EN_0
EXT_SENSE
2
2
DOUT_0
2
DOUT_1
2
2
+
2
+
-
CVB-0
CVB-1
CVA-0
CVA-1
+
2
+
COMP_A_0
EN_1
VTT-1
VTT-0
COMP_B_0
DATA_1
2
F/S
COMP_B_1
COMP_A_1
F/S
PMU
PMU
V-MU
V-MU
+
-
CVA-PPMU-0
CVA-PPMU-1
CVB-PPMU-0
CVB-PPMU-1
+
+
+
FIGURE 1. BLOCK DIAGRAM
March 7, 2011
FN7826.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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ISL55164
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in the quality certifications found at www.intersil.com/design/quality
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accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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2
FN7826.0
March 7, 2011