PD - 96988A
IRF2903Z
IRF2903ZS
IRF2903ZL
AUTOMOTIVE MOSFET
HEXFET® Power MOSFET
Features
l
l
l
l
l
D
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
VDSS = 30V
RDS(on) = 2.4mΩ
G
Description
ID = 75A
S
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications.
D
D
G
D
S
G
D
S
Drain
Source
Max.
260
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
180
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)
75
c
Linear Derating Factor
Gate-to-Source Voltage
EAS (Thermally limited) Single Pulse Avalanche Energy
d
EAS (Tested )
Single Pulse Avalanche Energy Tested Value
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
TJ
Operating Junction and
TSTG
Storage Temperature Range
c
h
g
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Junction-to-Case
k
290
W
2.0
W/°C
± 20
V
290
mJ
820
See Fig.12a, 12b, 15, 16
A
°C
300 (1.6mm from case )
y
i
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
RθJA
Junction-to-Ambient (PCB Mount, steady state)
y
10 lbf in (1.1N m)
i
RθCS
RθJA
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A
mJ
Parameter
ik
Units
-55 to + 175
Soldering Temperature, for 10 seconds
RθJC
S
1020
PD @TC = 25°C Power Dissipation
VGS
G
D
TO-262
IRF2903ZL
G
Parameter
Pulsed Drain Current
S
Gate
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
IDM
D
D2Pak
IRF2903ZS
TO-220AB
IRF2903Z
Absolute Maximum Ratings
D
jk
Typ.
Max.
–––
0.51
0.50
–––
–––
62
–––
40
Units
°C/W
1
8/26/05
IRF2903Z/S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
VGS(th)
gfs
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
IGSS
Min. Typ. Max. Units
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
30
–––
–––
2.0
120
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.021
1.9
–––
–––
–––
–––
–––
–––
160
51
58
24
100
48
37
4.5
–––
–––
2.4
4.0
–––
20
250
200
-200
240
–––
–––
–––
–––
–––
–––
–––
LS
Internal Source Inductance
–––
7.5
–––
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
6320
1980
1100
5930
2010
3050
–––
–––
–––
–––
–––
–––
V
V/°C
mΩ
V
S
µA
nA
nC
ns
nH
pF
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 75A
VDS = VGS, ID = 150µA
VDS = 10V, ID = 75A
VDS = 30V, VGS = 0V
VDS = 30V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
ID = 75A
VDS = 24V
VGS = 10V
VDD = 15V
ID = 75A
RG = 3.2 Ω
VGS = 10V
e
e
e
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 24V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 24V
f
Source-Drain Ratings and Characteristics
Parameter
IS
ISM
VSD
trr
Qrr
ton
2
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
c
Min. Typ. Max. Units
–––
–––
75
–––
–––
1020
–––
–––
–––
–––
34
29
1.3
51
44
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 75A, VGS = 0V
TJ = 25°C, IF = 75A, VDD = 15V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF2903Z/S/L
1000
1000
ID, Drain-to-Source Current (A)
TOP
100
BOTTOM
10
4.5V
TOP
ID, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
BOTTOM
100
4.5V
≤ 60µs PULSE WIDTH
Tj = 25°C
≤ 60µs PULSE WIDTH
Tj = 175°C
1
10
0.1
1
10
100
1000
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
1000
240
100.0
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current(Α)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TJ = 175°C
10.0
TJ = 25°C
1.0
VDS = 25V
≤ 60µs PULSE WIDTH
TJ = 25°C
200
TJ = 175°C
160
120
80
40
VDS = 10V
380µs PULSE WIDTH
0.1
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10.0
0
0
20
40
60
80 100 120 140 160 180
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRF2903Z/S/L
12000
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
VGS, Gate-to-Source Voltage (V)
10000
ID= 75A
C, Capacitance (pF)
Coss = Cds + Cgd
8000
Ciss
6000
4000
Coss
2000
Crss
VDS= 15V
16
12
8
4
0
0
1
10
0
100
40
1000.0
10000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
120
160
200
240
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
TJ = 175°C
100.0
80
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
10.0
TJ = 25°C
1.0
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
1msec
100µsec
100
LIMITED BY PACKAGE
10
1
VGS = 0V
10msec
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.1
0.0
0.4
0.8
1.2
1.6
2.0
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = 24V
2.4
0.1
1.0
10.0
100.0
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF2903Z/S/L
300
2.0
250
200
VGS = 10V
1.5
(Normalized)
ID , Drain Current (A)
ID = 75A
RDS(on) , Drain-to-Source On Resistance
LIMITED BY PACKAGE
150
100
50
0
25
50
75
100
125
150
1.0
0.5
175
-60 -40 -20
TC , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
Ci= τi/Ri
Ci τi/Ri
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
0.08133 0.000044
0.2408
0.000971
0.18658 0.008723
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF2903Z/S/L
D.U.T
RG
VGS
20V
DRIVER
L
VDS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
1200
15V
ID
26A
42A
BOTTOM 75A
TOP
1000
800
600
400
200
0
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
4.5
ID = 1.0A
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
ID = 1.0mA
4.0
ID = 250µA
ID = 150µA
3.5
3.0
2.5
2.0
1.5
1.0
-75
VGS
-50
-25
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF2903Z/S/L
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
100
0.05
0.10
10
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
300
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 75A
250
200
150
100
50
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF2903Z/S/L
D.U.T
Driver Gate Drive
+
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
D=
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
VDS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRF2903Z/S/L
TO-220AB Package Outline
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 2000
IN T HE AS S EMBLY LINE "C"
Note: "P" in as sembly line position
indicates "Lead - Free"
INT ERNAT IONAL
RECT IFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WEEK 19
LINE C
TO-220AB package is not recommended for Surface Mount Application.
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9
IRF2903Z/S/L
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN T HE AS S EMBLY LINE "L"
Note: "P" in assembly line
position indicates "Lead-Free"
OR
INT ERNAT IONAL
RECT IFIER
LOGO
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
AS S EMBLY
LOT CODE
INT ERNAT IONAL
RECT IFIER
LOGO
AS S EMBLY
LOT CODE
10
PART NUMBER
PART NUMBER
F530S
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 0 = 2000
WEEK 02
A = AS S EMBLY S IT E CODE
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IRF2903Z/S/L
TO-262 Package Outline (Dimensions are shown in millimeters (inches))
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
AS SEMBLED ON WW 19, 1997
IN T HE AS SEMBLY LINE "C"
Note: "P" in ass embly line
pos ition indicates "Lead-Free"
INT ERNAT IONAL
RECT IFIER
LOGO
ASS EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
OR
INT ERNAT IONAL
RECT IFIER
LOGO
AS SEMBLY
LOT CODE
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PART NUMBER
DAT E CODE
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 7 = 1997
WEEK 19
A = AS SEMBLY SIT E CODE
11
IRF2903Z/S/L
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Notes:
Repetitive rating; pulse width limited by
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11).
avalanche performance.
Limited by TJmax, starting TJ = 25°C, L = 0.10mH This value determined from sample failure population. 100%
RG = 25Ω, IAS = 75A, VGS =10V. Part not
tested to this value in production.
recommended for use above this value.
This is only applied to TO-220AB pakcage.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
This is applied to D2Pak, when mounted on 1" square PCB (FR Coss eff. is a fixed capacitance that gives the
4 or G-10 Material). For recommended footprint and soldering
same charging time as Coss while VDS is rising
techniques refer to application note #AN-994.
from 0 to 80% VDSS .
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/05
12
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