ON MC100EP16TDR2 3.3v / 5v ecl differential receiver/driver with internal termination Datasheet

MC10EP16T, MC100EP16T
3.3V / 5VECL Differential
Receiver/Driver with
Internal Termination
The EP16T is a world–class differential receiver/driver. The device
is functionally equivalent to the EP16 with internal termination
resistors. A 50 resistor is connected from the D input to the VT pin
and from the D input to the VT pin. Tie the VT and VT pins to VTT
supply (VCC – 2 V) for parallel termination or connect VT and VT
pins for 100 input series termination.
Special considerations are required for differential inputs under No
Signal conditions to prevent instability.
The 100 Series contains temperature compensation.
• 220 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
•
•
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = –3.0 V to –5.5 V
Internal 50 Termination Resistors
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MARKING DIAGRAMS*
8
8
8
1
SO–8
D SUFFIX
CASE 751
HEP61
ALYW
1
1
8
8
1
TSSOP–8
DT SUFFIX
CASE 948R
KEP61
ALYW
8
HP61
ALYW
1
H = MC10
K = MC100
A = Assembly Location
KP61
ALYW
1
L = Wafer Lot
Y = Year
W = Work Week
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
Package
Shipping
MC10EP16TD
Device
SO–8
98 Units/Rail
MC10EP16TDR2
SO–8
2500 Tape & Reel
MC100EP16TD
SO–8
98 Units/Rail
MC100EP16TDR2
SO–8
2500 Tape & Reel
MC10EP16TDT
TSSOP–8
100 Units/Rail
MC10EP16TDTR2
TSSOP–8
2500 Tape & Reel
MC100EP16TDT
TSSOP–8
100 Units/Rail
MC100EP16TDTR2 TSSOP–8
 Semiconductor Components Industries, LLC, 2002
September, 2002 – Rev. 3
1
2500 Tape & Reel
Publication Order Number:
MC10EP16T/D
MC10EP16T, MC100EP16T
VT
1
8
VCC
50 D
D
PIN DESCRIPTION
2
7
3
Q
PIN
FUNCTION
6
Q
D, D
Q, Q
VCC
VEE
VT
VT
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
50 Termination Resistor to D
50 Termination Resistor to D
5
VEE
50 VT
4
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram
ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
N/A
Internal Input Pullup Resistor
ESD Protection
N/A
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Level 1
Oxygen Index: 28 to 34
UL–94 V–0 @ 0.125 in
Transistor Count
167
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
MAXIMUM RATINGS (Note 2)
Parameter
Symbol
Condition 1
Condition 2
Rating
Units
6
V
–6
V
6
–6
V
V
50
100
mA
mA
VCC
PECL Mode Power Supply
VEE = 0 V
VEE
NECL Mode Power Supply
VCC = 0 V
VI
Input
PECL Mode In
ut Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
Iout
Output Current
Continuous
Surge
IBB
VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
–40 to +85
°C
Tstg
Storage Temperature Range
–65 to +150
°C
θJA
Thermal Resistance (Junction–to–Ambient)
0 LFPM
500 LFPM
8 SOIC
8 SOIC
190
130
°C/W
°C/W
θJC
Thermal Resistance (Junction–to–Case)
std bd
8 SOIC
41 to 44
°C/W
θJA
Thermal Resistance (Junction–to–Ambient)
0 LFPM
500 LFPM
8 TSSOP
8 TSSOP
185
140
°C/W
°C/W
θJC
Thermal Resistance (Junction–to–Case)
std bd
8 TSSOP
41 to 44
°C/W
Tsol
Wave Solder
<2 to 3 sec @ 248°C
265
°C
2. Maximum Ratings are those values beyond which device damage may occur.
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2
VI VCC
VI VEE
MC10EP16T, MC100EP16T
10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 3)
–40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
16
23
31
16
23
31
16
23
31
mA
VOH
Output HIGH Voltage (Note 4)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage (Note 4)
1365
1490
1615
1430
1555
1680
1490
1615
1740
mV
VIH
Input HIGH Voltage (Single–Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single–Ended)
1365
1690
1430
1755
1490
1815
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 5)
2.0
3.3
2.0
3.3
2.0
3.3
V
RT
Internal Termination Resistor
43
57
43
57
43
IIH
Input HIGH Current
IIL
Input LOW Current
50
150
150
–150
–150
57
150
µA
µA
–150
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
3. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to –2.2 V.
4. All loading with 50 to VCC–2.0 volts.
5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 6)
–40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
16
23
31
16
23
31
16
23
31
mA
VOH
Output HIGH Voltage (Note 7)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage (Note 7)
3065
3190
3315
3130
3255
3380
3190
3315
3440
mV
VIH
Input HIGH Voltage (Single–Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single–Ended)
3065
3390
3130
3455
3190
3515
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 8)
2.0
5.0
2.0
5.0
2.0
5.0
V
RT
Internal Termination Resistor
43
57
43
57
43
IIH
Input HIGH Current
IIL
Input LOW Current
50
150
150
–150
–150
57
150
µA
µA
–150
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
6. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to –0.5 V.
7. All loading with 50 to VCC–2.0 volts.
8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = –5.5 V to –3.0 V (Note 9)
–40°C
Symbol
Characteristic
Min
25°C
Typ
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
16
23
31
16
23
31
16
23
31
mA
VOH
Output HIGH Voltage (Note 10)
–1135
–1010
–885
–1070
–945
–820
–1010
–885
–760
mV
VOL
Output LOW Voltage (Note 10)
–1935
–1810
–1685
–1870
–1745
–1620
–1810
–1685
–1560
mV
VIH
Input HIGH Voltage (Single–Ended)
–1210
–885
–1145
–820
–1085
–760
mV
VIL
Input LOW Voltage (Single–Ended)
–1935
–1610
–1870
–1545
–1810
–1485
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 11)
0.0
V
RT
Internal Termination Resistor
IIH
Input HIGH Current
IIL
Input LOW Current
VEE+2.0
0.0
43
VEE+2.0
57
43
150
–150
50
0.0
57
VEE+2.0
43
150
–150
–150
57
150
µA
µA
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
9. Input and output parameters vary 1:1 with VCC.
10. All loading with 50 to VCC–2.0 volts.
11. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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3
MC10EP16T, MC100EP16T
100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 12)
–40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
18
25
35
20
27
37
22
29
39
mA
VOH
Output HIGH Voltage (Note 13)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 13)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VIH
Input HIGH Voltage (Single–Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single–Ended)
1355
1675
1355
1675
1355
1675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 14)
2.0
3.3
2.0
3.3
2.0
3.3
V
RT
Internal Termination Resistor
43
57
43
57
43
IIH
Input HIGH Current
IIL
Input LOW Current
50
150
150
–150
–150
57
150
µA
µA
–150
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
12. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to –2.2 V.
13. All loading with 50 to VCC–2.0 volts.
14. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 15)
–40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
18
25
35
20
27
37
22
29
39
mA
VOH
Output HIGH Voltage (Note 16)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
VOL
Output LOW Voltage (Note 16)
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
VIH
Input HIGH Voltage (Single–Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single–Ended)
3055
3375
3055
3375
3055
3375
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 17)
2.0
5.0
2.0
5.0
2.0
5.0
V
RT
Internal Termination Resistor
43
57
43
57
43
IIH
Input HIGH Current
IIL
Input LOW Current
50
150
150
–150
–150
57
150
µA
µA
–150
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
15. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to –0.5 V.
16. All loading with 50 to VCC–2.0 volts.
17. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = –5.5 V to –3.0 V (Note 18)
–40°C
Symbol
Characteristic
Min
25°C
Typ
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
18
25
35
20
27
37
22
29
39
mA
VOH
Output HIGH Voltage (Note 19)
–1145
–1020
–895
–1145
–1020
–895
–1145
–1020
–895
mV
VOL
Output LOW Voltage (Note 19)
–1945
–1820
–1695
–1945
–1820
–1695
–1945
–1820
–1695
mV
VIH
Input HIGH Voltage (Single–Ended)
–1225
–880
–1225
–880
–1225
–880
mV
VIL
Input LOW Voltage (Single–Ended)
–1945
–1625
–1945
–1625
–1945
–1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 20)
0.0
V
RT
Internal Termination Resistor
IIH
Input HIGH Current
IIL
Input LOW Current
VEE+2.0
0.0
43
VEE+2.0
57
43
150
–150
50
0.0
57
VEE+2.0
43
150
–150
–150
57
150
µA
µA
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
18. Input and output parameters vary 1:1 with VCC.
19. All loading with 50 to VCC–2.0 volts.
20. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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4
MC10EP16T, MC100EP16T
AC CHARACTERISTICS VCC = 0 V; VEE = –3.0 V to –5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21)
–40°C
Symbol
Characteristic
Min
fmax
Maximum Frequency
(See Figure 2 Fmax/JITTER)
tPLH,
tPHL
Propagation Delay to
Output Differential
tSKEW
Typ
25°C
Max
Min
>3
150
Typ
Max
Min
>3
230
300
Duty Cycle Skew (Note 22)
5.0
tJITTER
Cycle–to–Cycle Jitter
(See Figure 2 Fmax/JITTER)
VPP
Input Voltage Swing (Differential)
tr
tf
Output Rise/Fall Times
(20% – 80%)
Q, Q
85°C
150
Typ
Max
>3
240
300
20
5.0
0.2
<1
150
800
1200
70
120
170
200
Unit
GHz
275
350
ps
20
5.0
20
ps
0.2
<1
0.2
<1
ps
150
800
1200
150
800
1200
mV
80
130
180
100
140
200
ps
900
9
800
8
700
7
600
6
500
5
JITTEROUT ps (RMS)
VOUTpp (mV)
21. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to VCC–2.0 V.
22. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
ÉÉ
ÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
400
4
300
3
200
2
(JITTER)
100
1
0
0
500
1000
1500
2000
2500
FREQUENCY (MHz)
Figure 2. Fmax/Jitter
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5
3000
3500
4000
MC10EP16T, MC100EP16T
Q
D
Receiver
Device
Driver
Device
Q
D
50 50 V TT
V TT = V CC – 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020 – Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1404
–
ECLinPS Circuit Performance at Non–Standard VIH Levels
AN1405
–
ECL Clock Distribution Techniques
AN1406
–
Designing with PECL (ECL at +5.0 V)
AN1504
–
Metastability and the ECLinPS Family
AN1568
–
Interfacing Between LVDS and ECL
AN1650
–
Using Wire–OR Ties in ECLinPS Designs
AN1672
–
The ECL Translator Guide
AND8001
–
Odd Number Counters Design
AND8002
–
Marking and Date Codes
AND8009
–
ECLinPS Plus Spice I/O Model Kit
AND8020
–
Termination of ECL Logic Devices
For an updated list of Application Notes, please see our website at http://onsemi.com.
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6
MC10EP16T, MC100EP16T
PACKAGE DIMENSIONS
SO–8
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751–07
ISSUE AA
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751-01 THRU 751-06 ARE OBSOLETE. NEW
STANDAARD IS 751-07
–X–
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
X
S
J
S
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
TSSOP–8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R–02
ISSUE A
8x
0.15 (0.006) T U
K REF
0.10 (0.004)
S
2X
L/2
8
1
PIN 1
IDENT
S
T U
V
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
S
5
0.25 (0.010)
B
–U–
L
0.15 (0.006) T U
M
M
4
A
–V–
F
DETAIL E
C
0.10 (0.004)
–T– SEATING
PLANE
D
–W–
G
DETAIL E
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7
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0
6
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0
6
MC10EP16T, MC100EP16T
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
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Phone: 81–3–5773–3850
Email: [email protected]
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
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N. American Technical Support: 800–282–9855 Toll Free USA/Canada
http://onsemi.com
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