INTEGRATED CIRCUITS 74F827 10-bit buffer/line driver, non-inverting (3-State) 74F828 10-bit buffer/line driver, inverting (3-State) Product specification IC15 Data Handbook Philips Semiconductors 1994 Dec 5 Philips Semiconductors Product specification Buffers 74F827, 74F828 74F827 10-bit buffer/line driver, non-inverting (3-State) 74F828 10-bit buffer/line driver, inverting (3-State) FEATURES DESCRIPTION •High impedance NPN base inputs for reduced loading (20µA in The 74F827 and 74F828 10-Bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (OE0, OE1) for maximum control flexibility. High and Low states) •IIL is 20µA vs FAST family spec of 600µA and 1000µA for AMD 29827/29828 series The 74F827 and 74F828 are functionally and pin compatible to AMD AM29827 and AM29828. The 74F828 is an inverting version of 74F827. •Ideal where high speed, light bus loading and increased fan-in are required •Controlled rise and fall times to minimize ground bounce •Glitch free power-up in 3-State •Flow through pinout architecture for microprocessor oriented applications •Outputs sink 64mA •74F827 available in SSOP type II package TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F827 6.0ns 60mA 74F828 6.0ns 55mA ORDERING INFORMATION PACKAGES COMMERCIAL RANGE VCC = 5V10%; TA = 0°C to +70°C DRAWING NUMBER 24-Pin Plastic DIP (300 mil) N74F827N, N74F828N SOT222-1 24-Pin Plastic SOL N74F827D, N74F828D SOT137-1 24-Pin Plastic SSOP Type II N74F827DB SOT340-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS D0-D9 OE0-OE1 DESCRIPTION Data inputs Output enable inputs (active Low) 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW 1.0/0.033 20µA/20µA 1.0/0.033 20µA/20µA Q0-Q9 Data outputs (74F827) 1200/106.7 24mA/64mA Q0-Q9 Data outputs ( 74F828) 1200/106.7 24mA/64mA NOTES: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6 mA in the Low state. 1994 Dec 05 2 853-0880 14382 Philips Semiconductors Product specification Buffers 74F827, 74F828 PIN CONFIGURATION - 74F827 PIN CONFIGURATION - 74F828 OE0 1 24 VCC OE0 1 24 VCC D0 2 23 Q0 D0 2 23 Q0 D1 3 22 Q1 D1 3 22 Q1 D2 4 21 Q2 D2 4 21 Q2 D3 5 20 Q3 D3 5 20 Q3 D4 6 19 Q4 D4 6 19 Q4 D5 7 18 Q5 D5 7 18 Q5 D6 8 17 Q6 D6 8 17 Q6 D7 9 16 Q7 D7 9 16 Q7 D8 10 15 Q8 D8 10 15 Q8 D9 11 14 Q9 D9 11 14 Q9 GND 12 13 OE1 GND 12 13 OE1 SF00266 SF00269 LOGIC SYMBOL - 74F827 2 3 4 5 6 LOGIC SYMBOL - 74F828 7 8 9 10 11 2 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 3 4 5 6 7 9 10 11 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 1 OE0 1 OE0 13 OE1 13 OE1 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 23 22 21 20 19 18 17 16 15 14 23 22 21 20 19 18 17 16 15 14 VCC = Pin 24 GND = Pin 12 VCC = Pin 24 GND = Pin 12 SF00267 SF00270 LOGIC SYMBOL (IEEE/IEC) - 74F827 1 LOGIC SYMBOL (IEEE/IEC) - 74F828 1 & 13 EN1 2 1 & 13 EN1 1 23 2 3 22 3 22 4 21 4 21 5 20 5 20 6 19 6 19 7 18 7 18 8 17 8 17 9 16 9 16 10 15 10 15 11 14 11 14 SF00268 1994 Dec 05 8 23 SF00271 3 Philips Semiconductors Product specification Buffers 74F827, 74F828 LOGIC DIAGRAM 74F827 D0 D1 D2 D3 D4 D5 D6 D7 2 3 4 5 6 7 8 9 D8 D9 10 11 1 OE0 13 OE1 22 23 21 Q1 Q0 Q2 20 19 Q3 Q4 18 Q5 17 16 Q6 Q7 15 14 Q8 Q9 VCC = Pin 24 GND = Pin 12 SF00272 LOGIC DIAGRAM 74F828 OE0 D0 D1 D2 D3 D4 D5 D6 D7 2 3 4 5 6 7 8 9 D8 D9 10 11 1 13 OE1 23 22 21 Q1 Q0 Q2 20 19 Q3 Q4 18 Q5 17 16 Q6 Q7 15 14 Q8 Q9 VCC = Pin 24 GND = Pin 12 SF00280 FUNCTION TABLE OUTPUTS INPUTS 74F828 OPERATING MODE OEn Dn Qn Qn L L L H Transparent L H H L Transparent X Z Z High impedance H H L X Z 74F827 = = = = High voltage level Low voltage level Don’t care High impedance “off” state ABSOLUTE MAXIMUM RATINGS Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range. PARAMETER SYMBOL RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to +VCC V IOUT Current applied to output in Low output state 128 mA 0 to + 70 °C –65 to + 150 °C TA Operating free-air temperature range Tstg Storage temperature range 1994 Dec 05 4 Philips Semiconductors Product specification Buffers 74F827, 74F828 RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT Min Nom Max 5.0 5.5 VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –24 mA IOL Low-level output current 64 mA +70 °C Tamb Operating free-air temperature range V V 0 DC ELECTRICAL CHARACTERISTICS Over recommended operating free-air temperature range unless otherwise noted. LIMITS SYMBOL VOH TEST CONDITIONS1 PARAMETER VCC = MIN, VIL = MAX MAX, VIH = MIN IOH = –15mA VCC = MIN, VIL = MAX MAX, VIH = MIN IOH = –24mA IOL = MAX High-level out output ut voltage MIN TYP2 Low-level out output ut voltage VCC = MIN, VIL = MAX, VIH = MIN VIK Input clamp voltage VCC = MIN, II = IIK UNIT 10%VCC 2.4 5%VCC 2.4 10%VCC 2.0 V 5%VCC 2.0 V V 3.3 10%VCC VOL MAX 5%VCC V 0.55 V 0.42 0.55 V –0.73 –1.2 V II Input current at maximum input voltage VCC = 0.0V, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –20 µA IOZH Off-state output current, High voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current, Low voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short circuit output current3 VCC = MAX –225 mA 50 70 mA 70 100 mA 60 90 mA 30 45 mA 65 85 mA 55 70 mA –100 ICCH 74F827 ICC ICCL VCC = MAX ICCZ Supply y current (total) ICCH 74F828 ICCL VCC = MAX ICCZ NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under operating conditions for the applicable type. 2. All typical values are at VCC = 5V, TA = 25°C. 3. Not more than one output should be shorted at one time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1994 Dec 05 5 Philips Semiconductors Product specification Buffers 74F827, 74F828 AC CHARACTERISTICS LIMITS SYMBOL Tamb = 0 °C to +70°C VCC = 5V 10% CL = 50pF RL = 500Ω Tamb = +25°C VCC = 5V CL = 50pF RL = 500Ω PARAMETER UNIT Min Typ Max Min Max Waveform 1 2.0 2.0 5.5 4.5 8.5 8.5 2.0 2.0 9.0 9.0 ns Waveform 3 Waveform 4 5.0 4.0 8.0 6.0 12.0 10.5 4.5 4.0 14.0 11.5 ns tPLH tPHL Propagation delay Dn to Qn tPZH tPZL Output enable time OEn to Qn tPHZ tPLZ Output disable time OEn to Qn Waveform 3 Waveform 4 2.5 2.5 5.0 5.0 8.0 8.0 2.0 2.0 8.5 8.5 ns tPLH tPHL Propagation delay Dn to Qn Waveform 2 2.0 1.0 6.0 3.0 8.5 7.0 2.0 1.0 9.5 8.0 ns tPZH tPZL Output enable time OEn to Qn Waveform 3 Waveform 4 6.0 5.0 8.0 7.0 11.5 10.5 5.5 4.5 14.0 12.0 ns tPHZ tPLZ Output disable time OEn to Qn Waveform 3 Waveform 4 2.5 1.5 5.0 4.0 8.5 7.0 2.0 1.5 9.0 8.0 ns 74F827 74F828 AC CHARACTERISTICS for 1 Output switching with CL = 300pF and RL = 500Ω load LIMITS SYMBOL Tamb = 0 °C to +70°C VCC = 5V 10% CL = 300pF RL = 500Ω Tamb = +25°C VCC = 5V CL = 300pF RL = 500Ω PARAMETER MIN MIN UNIT Typ Max Max Waveform 1 9.5 7.5 13.0 10.0 14.0 11.0 ns Waveform 3 Waveform 4 15.0 9.5 20.0 13.0 21.0 14.0 ns tPLH tPHL Propagation delay Dn to Qn tPZH tPZL Output enable time OEn to Qn tPHZ tPLZ Output disable time OEn to Qn Waveform 3 Waveform 4 15.0 9.5 19.0 13.5 20.0 14.0 ns tPLH tPHL Propagation delay Dn to Qn Waveform 2 10.0 6.0 13.0 9.0 14.0 10.0 ns tPZH tPZL Output enable time OEn to Qn Waveform 3 Waveform 4 15.5 10.5 19.0 13.0 21.0 14.0 ns tPHZ tPLZ Output disable time OEn to Qn Waveform 3 Waveform 4 15.0 10.0 18.0 13.0 20.0 14.5 ns 1994 Dec 05 74F827 74F828 6 Philips Semiconductors Product specification Buffers 74F827, 74F828 AC CHARACTERISTICS for 10 Outputs switching with CL = 300pF and RL = 500Ω load LIMITS SYMBOL Tamb = 0 °C to +70°C VCC = 5V 10% CL = 50pF RL = 500Ω Tamb = +25°C VCC = 5V CL = 50pF RL = 500Ω PARAMETER MIN MIN UNIT Typ Max Max Waveform 1 12.0 14.0 16.0 17.0 17.0 18.0 ns Waveform 3 Waveform 4 15.0 17.0 20.0 21.0 21.0 21.5 ns tPLH tPHL Propagation delay Dn to Qn tPZH tPZL Output enable time OEn to Qn tPHZ tPLZ Output disable time OEn to Qn Waveform 3 Waveform 4 15.0 12.5 19.0 15.5 20.0 16.0 ns tPLH tPHL Propagation delay Dn to Qn Waveform 2 10.0 10.0 17.0 13.5 18.0 14.0 ns tPZH tPZL Output enable time OEn to Qn Waveform 3 Waveform 4 18.0 15.0 21.0 18.0 23.0 19.0 ns tPHZ tPLZ Output disable time OEn to Qn Waveform 3 Waveform 4 16.5 11.5 19.5 14.5 22.5 15.0 ns 74F827 74F828 AC WAVEFORMS For all waveforms, VM = 1.5V Dn VM VM tPLH Qn OEn tPHL VM VM VM tPZH tPHZ Qn, Qn VM VOH -0.3V VM 0V SF00125 Waveform 1. Propagation Delay for Non-Inverting Output SF00263 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level Dn VM VM tPHL Qn VM tPLH OEn VM VM VM tPZL Qn, Qn SF00282 tPLZ VM VOL +0.3V Waveform 2. Propagation Delay for Inverting Output SF00264 Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1994 Dec 05 7 Philips Semiconductors Product specification Buffers 74F827, 74F828 VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% Test Circuit for Open Collector Outputs POSITIVE PULSE 90% VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 1994 Dec 05 8 Philips Semiconductors Product specification Buffers 74F827, 74F828 DIP24: plastic dual in-line package; 24 leads (300 mil) 1994 Dec 05 9 SOT222-1 Philips Semiconductors Product specification Buffers 74F827, 74F828 SO24: plastic small outline package; 24 leads; body width 7.5 mm 1994 Dec 05 10 SOT137-1 Philips Semiconductors Product specification Buffers 74F827, 74F828 SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1994 Dec 05 11 SOT340-1 Philips Semiconductors Product specification Buffers 74F827, 74F828 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1994 All rights reserved. Printed in U.S.A.