LINER LTC1064MJ Low noise, fast, quad universal filter building block Datasheet

LTC1064
Low Noise, Fast, Quad
Universal Filter Building Block
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FEATURES
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DESCRIPTIO
The LTC®1064 consists of four high speed, low noise
switched-capacitor filter building blocks. Each filter building block, together with an external clock and three to five
resistors can provide various 2nd order functions like
lowpass, highpass, bandpass and notch. The center frequency of each 2nd order function can be tuned with an
external clock, or a clock and resistor ratio. For Q ≤ 5, the
center frequency range is from 0.1Hz to 100kHz. For Q ≤
3, the center frequency range can be extended to 140kHz.
Up to 8th order filters can be realized by cascading all four
2nd order sections. Any classical filter realization (such as
Butterworth, Cauer, Bessel and Chebyshev) can be formed.
Four Filters in a 0.3 Inch Wide Package
Maximum Center Frequency: 140kHz
Customized Version with Internal Resistors
Available
One Half the Noise of the LTC1059/LTC1060/
LTC1061 Devices
Maximum Clock Frequency: 7MHz
Clock-to-Center Frequency Ratio of 50:1 and 100:1
Simultaneously Available
Power Supplies: ±2.375V to ±8V
Low Offsets
Low Harmonic Distortion
Available in 24-Pin DIP and SO Wide Packages
A customized monolithic version of the LTC1064 including internal thin film resistors can be obtained for high
volume applications. Consult LTC Marketing for details.
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APPLICATIO S
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Anti-Aliasing Filters
Wide Frequency Range Tracking Filters
Spectral Analysis
Loop Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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TYPICAL APPLICATIO
Clock-Tunable 8th Order Cauer Lowpass Filter with fCUTOFF up to 100kHz
13k
66.5k
1
10k
18.25k
10.7k
2
3
4
5
6
7
8V
0.1µF
10k
(FROM
RH2, RL2)
8
9
49.9K
10
11.5K
11
12
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V+
V
LTC1064
SA
LPA
BPA
HPA/NA
INV A
23
10k
22
12.1k
21
17.4k
0
–15
RL2
26.7k
50/100
LPD
BPD
HPD
INV D
–30
20
– 19
CLK
18
17
Gain vs Frequency
PIN 12
24
–8V
0.1µF
5MHz
GAIN (dB)
22.1k
VIN
RH2
102k
–45
fCLK = 5MHz
RIPPLE = ±0.1dB
–60
–75
fCLK = 1MHz
RIPPLE = ±0.05dB
–90
8V
VOUT
16
15
41.2k
14
12.7k
13
14k
–105
–120
–135
1k
121k
10k
100k
INPUT FREQUENCY (Hz)
1M
1064 TA02
10k
FOR fCLK = 5MHz, ADD C1 = 10pF BETWEEN PINS 4, 1
C2 = 10pF BETWEEN PINS 21, 24
C3 = 27pF BETWEEN PINS 9, 12
WIDEBAND NOISE ≅ 140µVRMS
1064 TA01
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LTC1064
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ABSOLUTE
AXI U RATI GS (Note 1)
Total Supply Voltage (V + to V –) ............................. 16V
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC1064AC/LTC1064C .................... – 40°C to 85°C
LTC1064AM
LTC1064M (OBSOLETE) ............... – 55°C to 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
ORDER PART
NUMBER
INV B
1
24 INV C
HPB/NB
2
23 HPC/NC
BPB
3
22 BPC
LPB
4
21 LPC
20 SC
SB
5
20 SC
19 V –
AGND
6
19 V –
INV B
1
24 INV C
HPB/NB
2
23 HPC/NC
BPB
3
22 BPC
LPB
4
21 LPC
SB
5
AGND
6
LTC1064ACN
LTC1064CN
V+
7
18 CLK
V+
7
18 CLK
SA
8
17 50/100
SA
8
17 50/100
LPA
9
16 LPD
LPA
9
16 LPD
BPA 10
15 BPD
BPA 10
15 BPD
HPA/NA 11
14 HPD
HPA/NA 11
14 HPD
INV A 12
INV A 12
13 INV D
LTC1064CSW
13 INV D
SW PACKAGE
24-LEAD PLASTIC SO WIDE
TJMAX = 100°C, θJA = 85°C/ W
N PACKAGE
24-LEAD PLASTIC DIP
TJMAX = 110°C, θJA = 65°C/W
J PACKAGE 24-LEAD CERAMIC DIP
TJMAX = 150°C, θJA = 100°C/W
ORDER PART
NUMBER
TOP VIEW
LTC1064ACJ
LTC1064CJ
LTC1064AMJ
LTC1064MJ
OBSOLETE PACKAGE
Consider the 24-Lead N Package as an Alternate Source
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
(Internal Op Amps) The ● denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
Operating Supply Voltage Range
Voltage Swings
CONDITIONS
VS = ±5V, RL = 5k
●
Output Short-Circuit Current (Source/Sink)
DC Open-Loop Gain
GBW Product
Slew Rate
VS = ±5V
VS = ±5V, RL = 5k
VS = ±5V
VS = ±5V
MIN
±2.375
±3.2
±3.1
TYP
±3.6
3
80
7
10
MAX
±8
UNITS
V
V
V
mA
dB
MHz
V/µs
1064fb
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LTC1064
ELECTRICAL CHARACTERISTICS
(Complete Filter) The ● denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at VS = ±5V, TA = 25°C, TTL clock input level, unless otherwise specified.
PARAMETER
Center Frequency Range, fO
Input Frequency Range
Clock-to-Center Frequency
Ratio, fCLK /fO
CONDITIONS
VS = ±8V, Q ≤ 3
LTC1064
LTC1064A (Note 2)
LTC1064
LTC1064A (Note 2)
Clock-to-Center Frequency
Ratio, Side-to-Side Matching
Clock-to-Center Frequency
Ratio, fCLK/fO (Note 3)
LTC1064
LTC1064A (Note 2)
LTC1064
LTC1064A (Note 2)
LTC1064
LTC1064 A (Note 2)
Q Accuracy
fO Temperature Coefficient
Q Temperature Coefficient
DC Offset Voltage
Clock Feedthrough
Maximum Clock Frequency
Power Supply Current
VOS1 (Table 1)
VOS2 (Table 1)
VOS3 (Table 1)
MIN
fCLK = 1MHz, fO = 20kHz, Pin 17 High
Sides A, B, C: Mode 1,
R1 = R3 = 5k, R2 = 5k, Q = 10,
Sides D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k
Same as Above, Pin 17 Low, fCLK = 1MHz
fO = 10kHz
Sides A, B, C
Side D
fCLK = 1MHz
TYP
0.1 to 140
0 to 1
50 ± 0.3
●
50 ± 0.8
UNITS
kHz
MHz
%
%
●
50 ± 0.9
%
100 ± 0.3
%
0.4
%
%
%
%
1
50 ± 0.6
100 ± 0.6
●
●
●
●
●
9
●
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
%
100 ± 0.8
100 ± 0.9
●
●
●
fCLK = 4MHz, fO = 80kHz, Pin 17 High
Sides A, B, C: Mode 1, VS = ±7.5V
R1 = R3 = 50k, R2 = 5k, Q = 5
Side D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k, fCLK = 4MHz
Same as Above, Pin 17 Low
fCLK = 4MHz, fO = 40kHz
Sides A, B, C: Mode 1, Q = 10
Side D: Mode 3, fCLK = 1MHz
Mode 1, 50:1, fCLK < 2MHz
Mode 1, 100:1, fCLK < 2MHz
Mode 3, fCLK < 2MHz
fCLK = 1MHz, 50:1 or 100:1
fCLK = 1MHz, 50:1 or 100:1
fCLK = 1MHz, 50:1 or 100:1
fCLK < 1MHz
Mode 1, Q < 5, VS ≥ ±5V
MAX
±2
±3
±1
±5
±5
2
3
3
0.2
7
12
50 ± 1.3
100 ± 1.3
6
8
15
45
45
23
26
%
%
%
%
ppm/°C
ppm/°C
ppm/°C
mV
mV
mV
mVRMS
MHz
mA
mA
Note 2: Contact LTC Marketing.
Note 3: Not tested, guaranteed by design.
Table 1. Output DC Offsets, One 2nd Order Section
MODE
1
1b
2
3
VOSN
PINS 2, 11, 14, 23
VOS1 [(1/Q) + 1 + ⏐⏐HOLP⏐⏐] – VOS3 /Q
VOS1 [(1/Q) + 1 + (R2/R1)] – VOS3 /Q
VOS1 [(1 + (R2/R1) + (R2/R3) + (R2/R4) – VOS3 (R2/R3)]
× [R4/(R2 + R4)] + VOS2[R2/(R2 + R4)]
VOS2
VOSBP
PINS 3, 10, 15, 22
VOS3
VOS3
VOS3
VOS3
VOSLP
PINS 4, 9, 16, 21
VOSN – VOS2
~(VOSN – VOS2)[1 + (R5/R6)]
VOSN – VOS2
VOS1[1 + (R4/R1) + (R4/R2) + (R4/R3)]
– VOS2(R4/R2) – VOS3(R4/R3)
1064fb
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LTC1064
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BLOCK DIAGRA
HPA/NA
(11)
BPA
(10)
LPA
(9)
V + (7)
INV A
(12)
–
AGND
(6)
+
+
–
CLK (18)
LPB
(4)
SA
(8)
+
Σ
+∫
V – (19)
+∫
–
HPC/NC
(23)
–
+
LPC
(21)
BPC
(22)
SB
(5)
+
Σ
+∫
BY TYING PIN 17 TO V +, ALL SECTIONS
OPERATE WITH (fCLK/fO) = 50:1
+∫
BY TYING PIN 17 TO V –, ALL SECTIONS
OPERATE WITH (fCLK/fO) = 100:1
–
HPD
(14)
INV D
(13)
50/100 (17)
+∫
BPB
(3)
+
INV C
(24)
+∫
–
HPB/NB
(2)
INV B
(1)
Σ
LPD
(16)
BPD
(15)
SC
(20)
BY TYING PIN 17 TO AGND, SECTIONS B, C
OPERATE WITH (fCLK/fO) = 50:1 AND
SECTIONS A, D OPERATE AT 100:1
–
+∫
+∫
+
1064 BD
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TYPICAL PERFORMANCE CHARACTERISTICS
Mode 1, (fCLK /fO) = 50:1
VS = ±7.5V
0
VS = ±5V
1.5
1.0
VS = ±7.5V
VS = ±2.5V
0.5
0
0 10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G01
VS = ±7.5V
5
0
–5
TA = 25°C
Q = 5 OR 10
VS = ±5V
10
Q ERROR (%)
VS = ±2.5V
15
1.5
VS = ±2.5V
0.5
15
10
5
VS = ±2.5V
CC = 15pF
0
VS = ±5V
CC = 15pF
–5
VS = ±5V
1.0 VS = ±2.5V
TA = 25°C
Q = 10
PIN 17 AT V +
(R2/R4) = 3
20
TA = 25°C
Q = 5 OR 10
VS = ±7.5V
0
0 10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G02
CENTER FREQUENCY
ERROR (%)
5
Q ERROR (%)
10
TA = 25°C
Q=5
Q = 10
20
VS = ±5V
15
–5
CENTER FREQUENCY
ERROR (%)
TA = 25°C
Q=5
Q = 10
CENTER FREQUENCY
ERROR (%)
Q ERROR (%)
20
Mode 2, (fCLK /fO) = 25:1
Mode 1, (fCLK /fO) = 100:1
1.5
1.0
0.5
VS = ±2.5V
VS = ±5V
0
0 10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G03
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LTC1064
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TYPICAL PERFORMANCE CHARACTERISTICS
Mode 2, (fCLK /fO) = 25:1
5
Q=5
CC = 22pF
Q=2
CC = 39pF
0
10
VS = ±7.5V
5
0
–5
CENTER FREQUENCY
ERROR (%)
CENTER FREQUENCY
ERROR (%)
–5
15
TA = 25°C
PIN 17 AT V –
(R2/R4) = 3
Q=5
Q = 10
1.5
Q=2
Q=5
1.0
0.5
0
0 20 40 60 80 100 120140160180 200
CENTER FREQUENCY (kHz)
20
Q ERROR (%)
10
VS = ±2.5V VS = ±5V
20
TA = 25°C
CC = 5pF
R2 = R4
Q=5
Q = 10
VS = ±5V
15
VS = ±2.5V
10
5
VS = ±7.5V
0
–5
1.5
VS = ±5V
1.0
VS = ±2.5V
0.5
VS = ±7.5V
0
0 10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G04
1064 G05
CENTER FREQUENCY
ERROR (%)
15
TA = 25°C
VS = ±7.5V
PIN 17 AT V +
(R2/R4) = 3
Q ERROR (%)
Q ERROR (%)
20
Mode 3, (fCLK /fO) = 50:1
Mode 2, (fCLK /fO) = 50:1
1.5
1.0
VS = ±5V
VS = ±2.5V
0.5
VS = ±7.5V
0
0 10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G06
Mode 3, (fCLK /fO) = 50:1
Wideband Noise vs Q
Mode 3, (fCLK /fO) = 100:1
240
Q=2
5
Q=1
0
1.5
1.0
VS = ±7.5V
VS = ±2.5V
VS = ±5V
0.5
0
0 10 20 30 40 50 60 70 80 90 100 110 120
CENTER FREQUENCY (kHz)
VS = ±5V
10
5
VS = ±7.5V
0
–5
VS = ±2.5V
VS = ±5V
1.5
VS = ±7.5V
1.0
ANY OUTPUT
R3 = R1
ONE SECOND ORDER
SECTION
MODE 1 OR 3
100:1 OR 50:1
220
200
180
160
140
120
±7.5V
±5V
±2.5V
100
80
60
40
0.5
20
0
0 10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G07
0
0
2
4
6
8 10 12 14 16 18 20 22 24
Q
1064 G08
1064 G09
Harmonic Distortion, 8th Order
LP Butterworth, fC = 20kHz,
THD = 0.015% for 3VRMS Input
Power Supply Current vs
Supply Voltage
48
44
POWER SUPPLY CURRENT (mA)
CENTER FREQUENCY
ERROR (%)
–5
VS = ±2.5V
15
TA = 25°C
CC = 5pF
R2 = R4
Q = 10
WIDEBAND NOISE (µV/RMS)
10
Q ERROR (%)
15
20
CENTER FREQUENCY
ERROR (%)
Q ERROR (%)
20
TA = 25°C
CC = 15pF
R2 = R4
VS = ±7.5V
40
36
32
28
24
–55°C
25°C
125°C
20
16
12
8
4
0
0
2
4 6 8 10 12 14 16 18 20 22 24
POWER SUPPLY VOLTAGE (V + – V –)
1064 G11
1064 G10
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LTC1064
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PIN FUNCTIONS
V +, V – (Pins 7, 19): Power Supplies. They should be
bypassed with a 0.1µF ceramic capacitor. Low noise,
nonswitching power supplies are recommended. The device operates with a single 5V supply and with dual
supplies. The absolute maximum operating power supply
voltage is ±8V.
AGND (Pin 6): Analog Ground. When the LTC1064 operates with dual supplies, Pin 6 should be tied to system
ground. When the LTC1064 operates with a single positive
supply, the analog ground pin should be tied to 1/2 supply
and it should be bypassed with a 1µF solid tantalum in
parallel with a 0.1µF ceramic capacitor, Figure 1. The
positive input of all the internal op amps, as well as the
common reference of all the internal switches, are internally tied to the analog ground pin. Because of this, a very
“clean” ground is recommended.
CLK (Pin 18): Clock. For ±5V supplies the logic threshold
level is 1.4V. For ±8V and 0V to 5V supplies the logic
threshold levels are 2.2V and 3V respectively. The logic
threshold levels vary ±100mV over the full military temperature range. The recommended duty cycle of the input
clock is 50%, although for clock frequencies below 500kHz,
the clock “on” time can be as low as 200ns. The maximum
clock frequency for ±5V supplies is 4MHz. For ±7V
supplies and above, the maximum clock frequency is
7MHz.
V+
V+/2
+
1µF
1
24
2
23
LTC1064
3
5k
0.1µF
ANALOG
GROUND
PLANE
22
4
21
5
20
6
7
5k
50/100 (Pin 17): By tying Pin 17 to V +, all filter sections
operate with a clock-to-center frequency ratio internally
set at 50:1. When Pin 17 is at mid-supplies, sections B and
C operate with (fCLK /fO) = 50:1 and sections A and D
operate at 100:1. When Pin 17 is shorted to the negative
supply pin, all filter sections operate with (fCLK /fO) =
100:1.
8
AGND
V+
V–
CLK
50/100
19
CLOCK INPUT
V + = 15V, TRIP VOLTAGE = 7V
V + = 10V, TRIP VOLTAGE = 6.4V
V + = 5V, TRIP VOLTAGE = 3V
18
17
9
16
10
15
11
14
12
13
TO DIGITAL
GROUND
1064 F01
NOTE: PINS 5, 8, 20, IF NOT USED, SHOULD BE CONNECTED TO PIN 6
Figure 1. Single Supply Operation
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LTC1064
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APPLICATIONS INFORMATION
ANALOG CONSIDERATIONS
Figure 2 shows an example of an ideal ground plane
design for a 2-sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this as possible. Protoboards are not
recommended.
Grounding and Bypassing
The LTC1064 should be used with separated analog and
digital ground planes and single point grounding
techniques.
Pin 6 (AGND) should be tied directly to the analog ground
plane.
Buffering the Filter Output
Pin 7 (V +) should be bypassed to the ground plane with a
0.1µF ceramic capacitor with leads as short as possible.
Pin 19 (V –) should be bypassed with a 0.1µF ceramic
capacitor. For single supply applications, V – can be tied to
the analog ground plane.
When driving coaxial cables and 1× scope probes, the
filter output should be buffered. This is important especially when high Qs are used to design a specific filter.
Inadequate buffering may cause errors in noise, distortion, Q and gain measurements. When 10 × probes are
used, buffering is usually not required. An inverting buffer
is recommended especially when THD tests are performed. As shown in Figure 3, the buffer should be
adequately bypassed to minimize clock feedthrough.
For good noise performance, V + and V – must be free of
noise and ripple.
All analog inputs should be referenced directly to the
single point ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
VIN
2
23
3
22
FOR BEST HIGH FREQUENCY RESPONSE
PLACE RESISTORS PARALLEL TO DOUBLESIDED COPPER CLAD BOARD AND LAY FLAT
(4 RESISTORS SHOWN HERE TYPICAL)
4
21
5
7.5V
0.1µF
CERAMIC
ANALOG
GROUND
PLANE
PIN 1 IDENT
24
1
LTC1064
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
5k
–7.5V
0.1µF CERAMIC
CLOCK
DIGITAL
GROUND
PLANE
(SINGLE POINT
GROUND)
NOTE: CONNECT ANALOG AND DIGITAL
GROUND PLANES AT A SINGLE POINT AT
THE BOARD EDGE
1064 F02
Figure 2. Example Ground Plane Breadboard Technique for LTC1064
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LTC1064
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APPLICATIONS INFORMATION
Offset Nulling
Noise
Lowpass filters may have too much DC offset for some
users. A servo circuit may be used to actively null the
offsets of the LTC1064 or any LTC switched-capacitor
filter. The circuit shown in Figure 4 will null offsets to better
than 300µV. This circuit takes seconds to settle because of
the integrator pole frequency.
All the noise performance mentioned excludes the clock
feedthrough. Noise measurements will degrade if the
already described grounding bypassing and buffering
techniques are not practiced. The graph Wideband Noise
vs Q in the Typical Performance Characteristics section is
a very good representation of the noise performance of
this device.
SEPARATE V + POWER SUPPLY TRACE FOR BUFFER
R12
+
R11
VIN
0.1µF
R21
R22
R31
R32
10k
+
V TRACE FOR FILTER
LTC1064
POSITIVE
SUPPLY
19
7
0.1µF
FROM
FILTER OUTPUT
1µF
10k
R1
1M
–
4
LT ®318
LT1007
LT1056
+
VOUT
7
TO FILTER
FIRST SUMMING
NODE
+
R3
100k
C1
0.1µF
LT1012
–
0.1µF
0.1µF
+
NEGATIVE
SUPPLY
1µF
R2
1M
C2
0.1µF
C1 = C2 = LOW LEAKAGE FILM
(I.E., POLYPROPYLENE)
R1 = R2 = METAL FILM 1%
1064 F04
1064 F03
Figure 3. Buffering the Output of a 4th Order Bandpass Realization
Figure 4. Servo Amplifier
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ODES OF OPERATIO
PRIMARY MODES
Mode 1
In Mode 1, the ratio of the external clock frequency to the
center frequency of each 2nd order section is internally
fixed at 50:1 or 100:1. Figure 5 illustrates Mode 1 providing 2nd order notch, lowpass and bandpass outputs.
Mode 1 can be used to make high order Butterworth
lowpass filters; it can also be used to make low Q notches
and for cascading 2nd order bandpass functions tuned at
the same center frequency with unity gain. Mode 1 is faster
than Mode 3. Note that Mode 1 can only be implemented
with three of the four LTC1064 sections because Section
D has no externally available summing node. Section D,
however, can be internally connected in Mode 1 upon
special request.
8
R3
R2
N
R1
–
VIN
BP
S
+
Σ
–
+
∫
LP
∫
1/4 LTC1064
AGND
fO =
R2
R3
R2
R3
fCLK
;f =f ;H
=–
; HOBP = –
;H
=–
;Q=
R1
R1 ON1
R1
R2
100(50) n O OLP
1064 F05
Figure 5. Mode 1: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
1064fb
LTC1064
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ODES OF OPERATIO
Mode 3
SECONDARY MODES
Mode 3 is the second of the primary modes. In Mode 3, the
ratio of the external clock frequency to the center frequency of each 2nd order section can be adjusted above or
below 50:1 or 100:1. Side D of the LTC1064 can only be
connected in Mode 3. Figure 6 illustrates Mode 3, the
classical state variable configuration, providing highpass,
bandpass and lowpass 2nd order filter functions. Mode 3
is slower than Mode 1. Mode 3 can be used to make high
order all-pole bandpass, lowpass, highpass and notch
filters.
Mode 1b
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case. This was done to provide
speed without penalizing the noise performance.
Mode 1b is derived from Mode 1. In Mode 1b, Figure 7, two
additional resistors R5 and R6 are added to alternate the
amount of voltage fed back from the lowpass output into
the input of the SA (or SB or SC) switched-capacitor
summer. This allows the filter’s clock-to-center frequency
ratio to be adjusted beyond 50:1 or 100:1. Mode 1b
maintains the speed advantages of Mode 1.
R6
R5
R3
R2
N
R1
–
VIN
BP
S
+
Σ
–
∫
+
CC
LP
∫
1064 F07
1/4 LTC1064
R4
AGND
R3
R2
HP
R1
–
VIN
+
BP
S
Σ
–
∫
+
LP
fO =
fCLK
100(50)
(
∫
1064 F06
HOBP = –
AGND
MODE 3 (50:1):
f
fO = CLK
100
√ R2R4 ; Q = R3R2 √ R2R4 ; H
HOBP = –
R3
R4
;H
=–
R1 OLP
R1
OHP = –
R2
;
R1
√
HOHP = –
R2
;H
=–
R1 OBP
R3
R4
R1
; HOLP = –
R3
R1
1–
16R4
R2
1.005
Q
√
; THEN CALCULATE R1 TO SET
R2 + R2 THE DESIRED GAIN.
R4 16R4
)
R3
; R5⏐⏐R6 ≤ 5k
R1
R3
R2
√R5R6+ R6 ;
R2
; HOLP = –
R1
R2
R1
;
R6
R5 + R6
1064 F07 Eq
Mode 2
√
R2
1.005 R4
R2
;Q=
;
R2
R2
R4
–
R3 16R4
f
fO = CLK
50
O; Q =
Figure 7. Mode 1b: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
NOTE: THE 50:1 EQUATIONS FOR MODE 3 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 3 OPERATIONS OF THE LTC1059, LTC1060 AND LTC1061. START WITH
fO, CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
R3 =
n
f
HON1(f→ 0) = HON2 f→ CLK
=–
2
1/4 LTC1064
MODE 3 (100:1):
√R5R6+ R6 ; f = f
Mode 2 is a combination of Mode 1 and Mode 3, as shown
in Figure 8. With Mode 2, the clock-to-center frequency
ratio fCLK /fO is always less than 50:1 or 100:1. The
advantage of Mode 2 is that it provides less sensitivity to
resistor tolerances than does Mode 3. As in Mode 1,
Mode 2 has a notch output which depends on the clock
frequency and the notch frequency is therefore less than
the center frequency fO.
1064 F06 Eq
Figure 6. Mode 3: 2nd Order Filter Providing Highpass,
Bandpass and Lowpass
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case.
1064fb
9
LTC1064
W
U
ODES OF OPERATIO
R4
MODE 2 (100:1):
R3
R2
N
R1
–
VIN
BP
S
+
Σ
–
∫
+
LP
∫
f
fO = CLK
100
√
HOBP = –
R3
; H (f→ 0) = –
R1 ON1
f
fO = CLK
50
MODE 2 (50:1):
√
f
R3
R2
1+
; f = CLK ; Q =
50
R2
R4 n
√
R2
1+
; HOLP = –
R4
(
)
R2
f
R1
; HON2 f→ CLK
=–
2
R2
1+
R4
R2
R1
;
R2
1+
R4
R2
R1
√
R2
R2
1.005 1 +
R2
fCLK
R1
R4
1+
;f =
;Q=
; HOLP = –
;
R4 n 50
R2
R2
R2
1+
–
R3 16R4
R4
1064 F08
1/4 LTC1064
(
R2
R3
f
R1
R1
HOBP = –
; HON1(f→ 0) = –
;H
= f→ CLK
=
2
R3
R2 ON2
1–
1+
16R4
R4
AGND
)
–
R2
R1
NOTE: THE 50:1 EQUATIONS FOR MODE 2 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 2 OPERATION OF THE LTC1059, LTC1060 AND LTC1061. START WITH
fO, CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
R2
R3 =
1.005
Q
√
1+
; THEN CALCULATE R1 TO SET THE DESIRED GAIN.
R2
R2
+
R4 16R4
1064 F08Eq
Figure 8. Mode 2: 2nd Order Filter Providing Notch, Bandpass and Lowpass
Mode 3a
This is an extension of Mode 3 where the highpass and
lowpass outputs are summed through two external resistors RH and RL to create a notch. This is shown in Figure 9.
Mode 3a is more versatile than Mode 2 because the notch
frequency can be higher or lower than the center frequency of the 2nd order section. The external op amp of
Figure 9 is not always required. When cascading the
sections of the LTC1064, the highpass and lowpass
outputs can be summed directly into the inverting input of
the next section. The topology of Mode 3a is useful for
elliptic highpass and notch filters with clock-to-cutoff
frequency ratios higher than 100:1. This is often required
to extend the allowed input signal frequency range and to
avoid premature aliasing.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case.
MODE 3a (100:1):
CC
R4
MODE 3a (50:1):
R2
VIN
–
+
HP
S
+
–
Σ
BP
∫
∫
1/4 LTC1064
AGND
√ R2R4 ; f = 100 √ R ; H
HOLP = –
R R4
R4
f
; H (f→ 0) = G
;H
f→ CLK
=
RL R1 ON2
R1 ON1
2
n
HON(f = fO) = Q
R3
R1
f
fO = CLK
100
RL
–
NOTCH
+
RH
EXTERNAL OP AMP OR INPUT
OP AMP OF THE LTC1064,
SIDE A, B, C, D
1064 F09
RH
L
OHP = –
R2
R3
; HOBP = –
;
R1
R1
( )( ) (
)
(
√
R
RG
R3
H
– GH
;Q=
RL OLP RH OHP
R2
) ( )( )
RG R2
;
RH R1
√ R2R4
)
f
fO = CLK
50
√1 + R2R4 ; f = f50
HOBP = –
R3
R2
1.005
R4
R1
R4
; HOLP(f = 0) = –
;Q =
R3
R1
R2
R2
1–
–
16R4
R3 16R4
RG
LP
(
fCLK
n
CLK
f
RH
; HOHP f→ CLK
=
2
RL
–
R2
;
R1
√
NOTE: THE 50:1 EQUATIONS FOR MODE 3A ARE DIFFERENT FROM
THE EQUATIONS FOR MODE 3A OPERATION OF THE LTC1059,
LTC1060 AND LTC1061. START WITH fO, CALCULATE R2/R4, SET R4;
FROM THE Q VALUE, CALCULATE R3:
R2
R3 =
; THEN CALCULATE R1 TO
1.005
Q
R2
√ R2R4 + 16R4
SET THE DESIRED GAIN.
1064 F09Eq
Figure 9. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass and Notch
1064fb
10
LTC1064
U
TYPICAL APPLICATIO S
Wideband Bandpass: Ratio of High to Low Corner Frequency Equal to 2
R14
2
R33
3
R43
4
5
6
C1
7
5V TO 8V
0.1µF
8
R41
9
R31
10
R21
11
R11
12
VIN
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V–
LTC1064
V+
SA
CLK
50/100
LPA
LPD
BPA
BPD
HPA/NA
HPD
INV A
INV D
Amplitude Response
24
23
R24
15
22
R34
0
21
R44
VOUT
20
19
18
fCLK = 7MHz
–15
–5V TO –8V
0.1µF
fCLK ≤ 7MHz
GAIN (dB)
1
R23
17
–30
–45
fCLK = 2MHz
–60
–75
16
15
R42
14
R32
13
R22
C2
–90
VS = ±8V
–105
10k
R12
100k
INPUT FREQUENCY (Hz)
1M
R13
1064 TA04
RESISTOR VALUES:
R11 = 16k
R21 = 16k
R31 = 7.32k R41 = 10k
R12 = 10k
R22 = 10k
R32 = 22.6k R42 = 13.3k
R13 = 23.2k R23 = 13.3k R33 = 21.5k R43 = 10k
R14 = 6.8k R24 = 20k
R34 = 15.4k R44 = 32.4k
NOTE: FOR fCLK ≥ 3MHz, USE C1 = C2 = 22pF
1064 TA03
Quad Bandpass Filter with Center Frequency Equal to fO, 2fO, 3fO and 4fO
10.5k
1
R22
2
R32
3
4
5
6
7
5V TO 8V
0.1µF
8
9
R11
VIN3
R31
10
R21
11
12
INV B
INV C
HPB/NB
HPC/NC
R23
22
R33
0
21
R43
–5
BPC
LPB
LPC
SB
SC
AGND
19
V–
V+
SA
LPA
BPA
HPA/NA
INV A
CLK
50/100
LPD
BPD
HPD
INV D
VIN2
23
BPB
LTC1064
Amplitude Response
R13
24
5
20
18
fCLK = 2MHz
–10
GAIN (dB)
R12
VIN1
–5V TO –8V
fCLK
0.1µF
17
–15
–20
–25
16
R44
15
R34
14
R24
–30
–35
–40
R14
13
0
VIN4
17.4k
10
20
30
40
50
INPUT FREQUENCY (kHz)
20k
1064 TA06
20k
20k
RESISTOR VALUES:
R11 = 249k R21 = 10k
R12 = 249k R22 = 10k
R13 = 499k R23 = 10k
R14 = 453k R24 = 10k
R31 = 249k
R32 = 249k
R33 = 174k
R34 = 249k
–
LT1056
VOUT
+
R43 = 17.8k
R44 = 40.2k
1064 TA05
1064fb
11
LTC1064
U
TYPICAL APPLICATIO S
8th Order Bandpass Filter with 2 Stopband Notches
RL2
RH2
Amplitude Response
RH3
1
R22
2
R32
3
R42
4
5
6
7
5V TO 8V
0.1µF
R41
8
R31
10
R21
11
R11
9
12
VIN
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V–
V+
LTC1064
CLK
50/100
SA
LPD
LPA
BPA
BPD
HPA/NA
HPD
INV D
INV A
24
10
23
R23
22
R33
21
R43
–10
RL3
20
19
18
–5V TO –8V
1.28MHz
17
0.1µF
TO V +
16
R44
15
R34
14
R24
VS = ±5V
fCLK = 1.28MHz
PIN 17 AT V +
0
GAIN (dB)
R12
–20
–30
–40
–50
–60
–70
10
20
40
5
INPUT FREQUENCY (kHz)
1
13
100
1064 TA08
VOUT
RESISTOR VALUES:
R11 = 46.95k R21 = 10k
R12 = 93.93k R22 = 10k
R23 = 16.3k
R24 = 13.19k
R31 = 38.25k
R32 = 81.5k
R33 = 70.3k
R34 = 39.42k
R41 = 11.81k
R42 = 14.72k
R43 = 10k
R44 = 10.5k
RL2 = 27.46k
RL3 = 17.9k
NOTE 1: THE V +, V – PINS SHOULD BE BYPASSED WITH A 0.1µF TO 0.22µF
CERAMIC CAPACITOR, RIGHT AT THE PINS.
NOTE 2: THE RATIOS OF ALL (R2/R4) RESISTORS SHOULD BE MATCHED
TO BETTER THAN 0.25%. THE REMAINING RESISTORS SHOULD BE
BETTER THAN 0.5% ACCURATE.
RH2 = 6.9k
RH3 = 69.7k
1064 TA07
C-Message Filter
R13
R22
2
R32
3
R42
4
5
6
7
5V
R12 0.1µF
8
R41
9
R31
R21
R11
10
11
12
VIN
RESISTOR VALUES:
R11 = 88.7k R21 = 10k
R12 = 10k
R22 = 44.8k
R13 = 15.8k R23 = 48.9k
R14 = 15.8k R24 = 44.8k
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
23
R23
22
R33
21
R43
20
SB
SC
AGND
19
V–
V+
LTC1064
SA
CLK
50/100
LPA
LPD
BPA
BPD
HPA/NA
HPD
INV A
INV D
Amplitude Response
24
10
–10
0.1µF
R14
–5V
18
3.5795MHz
fCLK =
16
17
–20
–30
–40
–50
16
R44
15
R34
–60
14
R24
–70
0
13
VOUT
R31 = 35.7k
R32 = 33.2k
R33 = 63.5k
R34 = 16.5k
VS = ±5V
0
GAIN (dB)
1
R41 = 88.7k
R42 = 24.9k
R43 = 25.5k
R44 = 24.9k
1
3
2
4
INPUT FREQUENCY (kHz)
5
1064 TA10
1064 TA09
1064fb
12
LTC1064
U
TYPICAL APPLICATIO S
8th Order Chebyshev Lowpass Filter with a Passband
Ripple of 0.1dB and Cutoff Frequency up to 100kHz
R13
R22
R32
R12
R42
2
3
4
5
6
7
5V TO 8V
0.1µF
8
R41
R31
R21
R11
VIN
9
10
11
12
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V+
V
LTC1064
SA
50/100
LPA
LPD
BPA
BPD
HPA/NA
HPD
INV A
23
R23
15
22
R33
0
21
R43
– 15
20
R14
– 19
CLK
INV D
Amplitude Response
24
18
17
–5V TO –8V
GAIN (dB)
1
0.1µF
fCLK = 5MHz
R31 = 23.6k
R32 = 45.2k
R33 = 68.15k
R34 = 17.72k
–45
–60
16
5V TO 8V
R44
–75
15
R34
–90
14
R24
R41 = 99.73k
R42 = 25.52k
R43 = 99.83k
R44 = 25.42k
VS = ±8V
fCLK = 5MHz
PASSBAND RIPPLE = 0.1dB
–105
10k
13
VOUT
RESISTOR VALUES:
R11 = 100.86k R21 = 16.75k
R12 = 25.72k R22 = 20.93k
R13 = 16.61k R23 = 10.18k
R14 = 13.84k R24 = 11.52k
–30
100k
INPUT FREQUENCY (Hz)
1M
1064 TA12
1064 TA11
FOR fCLK > 3MHz, ADD C2 = 10pF ACROSS R42
C3 = 10pF ACROSS R43
C4 = 10pF ACROSS R44
WIDEBAND NOISE = 170µVRMS
1064fb
13
LTC1064
U
TYPICAL APPLICATIO S
8th Order Clock-Sweepable Lowpass Elliptic Antialiasing Filter
RH1
RL1
RH2
Amplitude Response
RL2
2
R32
3
R42
4
5
6
7
7.5V
0.1µF
8
R43
9
R33
10
R23
11
12
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
V–
AGND
V+
LTC1064
SA
LPA
CLK
50/100
LPD
BPA
BPD
HPA/NA
HPD
INV A
INV D
R11
24
23
R21
22
R31
21
R41
VIN
–15
–30
20
19
18
17
–7.5V
fCLK ≤ 2MHz
0.1µF
16
R44
15
R34
14
R24
–90
–105
0
10
20
30
40
50
60
70
FREQUENCY (kHz)
13
R41 = 15.4k
R42 = 10.2k
R43 = 10k
R44 = 42.7k
–60
–75
VOUT
RH3
R31 = 13.7k
R32 = 23.7k
R33 = 84.5k
R34 = 15.2k
–45
–7.5V
RL3
RESISTOR VALUES:
R11 = 19.1k R21 = 10k
R22 = 10k
R23 = 11.3k
R24 = 15.4k
VOUT/VIN (dB)
1
R22
0
RL1 = 14k
RL2 = 26.7k
RL3 = 10k
NOTE: FOR tCUTOFF >15kHz, ADD A 5pF CAPACITOR ACROSS R41 AND R43
RH1 = 30.9k
RH2 = 76.8k
RH3 = 60.2k
8TH ORDER CLOCK-SWEEPABLE LOWPASS
ELLIPTIC ANTIALIASING FILTER MAINTAINS,
FOR 0.1Hz ≤ fCUTOFF ≤ 20kHz, A ±0.1dB MAX
PASSBAND ERROR AND 72dB MIN STOPBAND
ATTENUATION AT 1.5 × fCUTOFF
TOTAL WIDEBAND NOISE = 150µVRMS,
THD = 70dB (0.03%) FOR VIN = 3VRMS,
fCLK /fCUTOFF = 100:1. THIS FILTER AVAILABLE
AS LTC1064-1 WITH INTERNAL THIN FILM
1064 TA14
RESISTORS
1064 TA13
1064fb
14
LTC1064
U
TYPICAL APPLICATIO S
Dual 4th Order Bessel Filter with 140kHz Cutoff Frequency
R13
1
R22
R32
R42
2
3
4
5
6
7
8V
0.1µF
8
9
R41
R31
R11
R21
VIN2
10
11
12
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V
LTC1064
V+
Amplitude Response
24
23
R23
22
R33
0
21
R43
– 15
20
VOUT1
– 19
–8V
0.1µF
18 7MHz
CLOCK
17
50/100
8V
16
LPD
R44
15
BPD
R34
14
HPD
R24
13
INV D
R14
SA
LPA
BPA
HPA/NA
INV A
RESISTOR VALUES:
R11 = 14.3k R21 = 13k
R12 = 15.4k R22 = 15.4k
R13 = 3.92k R23 = 20k
R14 = 3.92k R24 = 20k
15
CLK
R31 = 7.5k
R32 = 7.5k
R33 = 27.4k
R34 = 6.8k
GAIN (dB)
R12
VIN1
–30
–45
–60
–75
VOUT2
VS = ±8V
fCLK = 7MHz
–90
–105
10k
100k
INPUT FREQUENCY (Hz)
1M
1064 TA16
R41 = 10k
R42 = 10k
R43 = 40k
R44 = 10k
WIDEBAND NOISE = 64µVRMS
1064 TA15
8th Order Linear Phase (Bessel) Filter with
fCLK 65
=
f –3dB 1
R12
VIN1
1
R21
2
R31
3
R41
4
5
6
7
5V TO 8V
0.1µF
8
9
R43
FROM
PIN 20
R13
10
R33
11
R23
12
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V–
V+
LTC1064
CLK
50/100
SA
LPA
LPD
BPA
BPD
HPD
HPA/NA
INV D
INV A
Amplitude Response
24
23
R22
15
22
R32
0
21
R42
20
TO R13
19
18
17
– 15
fCLK
≤7MHz
TO V +
16
15
R44
14
R34
13
R24
–5V TO –8V
0.1µF
VOUT
GAIN (dB)
R11
–30
–45
–60
–75
–90
–105
10k
R14
VS = ±8V
fCLK = 4.5MHz
fCLK = 50% DUTY CYCLE
f–3dB = 70kHz
100k
INPUT FREQUENCY (Hz)
1M
1064 TA18
RESISTOR VALUES:
R11 = 34.8k R21 = 34.8k
R12 = 10.5k R22 = 45.3k
R13 = 12.7k R23 = 34.8k
R14 = 20k
R24 = 34.8k
R31 = 14.3k
R32 = 22.1k
R33 = 24.3k
R34 = 13.3k
WIDEBAND NOISE = 70µVRMS
R41 = 40.2k
R42 = 39.2k
R43 = 20k
R44 = 20k
1064 TA17
1064fb
15
LTC1064
U
TYPICAL APPLICATIO S
Dual 5th Order Chebyshev Lowpass Filter with
50kHz and 100kHz Cutoff Frequencies
R14
R13b
C2
1000pF
1
R23
2
R33
3
R43
4
5
2pF
6
7
8V
0.1µF
22pF
8
9
R11a
VIN1
R11b
R41
10
R31
11
R21
12
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V–
V+
LTC1064
SA
LPA
BPA
HPA/NA
INV A
CLK
50/100
LPD
BPD
HPD
INV D
24
Amplitude Response
23
R24
22
R34
21
R44
15
PASSBAND RIPPLE = 0.2dB
VOUT2
fC = 100kHz
20
19
18
17
0
4pF
–8V
5MHz
T2L
0.1µF
16
R42
15
R32
14
R22
VOUT1
fC = 50kHz
39pF
–30
–45
–60
–75
–90
–105
10k
13
C1
1000pF
– 15
GAIN (dB)
R13a
VIN2
R12
50k 100k
INPUT FREQUENCY (Hz)
1M
1064 TA20
RESISTOR VALUES:
R11a = 4.32k R21 = 11.8k
R11b = 27.4k R22 = 20k
R12 = 10.5k
R23 = 11.8k
R13a = 3k
R24 = 20k
R13b = 29.4k
R14 = 10.5k
R31 = 29.4k
R32 = 21.5k
R33 = 29.4k
R34 = 21.6k
R41 = 10k
R42 = 31.6k
R43 = 10k
R44 = 31.6k
1064 TA19
1064fb
16
LTC1064
U
PACKAGE DESCRIPTIO
J Package
24-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
1.290
(32.77)
MAX
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
.025
.220 – .310
(5.588 – 7.874) (0.635)
RAD TYP
.005
(0.127)
MIN
.300 BSC
(7.62 BSC)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.008 – .018
(0.203 – 0.457)
0° – 15°
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
.125
(3.175)
MIN
.045 – .065
(1.143 – 1.651)
.014 – .026
(0.360 – 0.660)
.100
(2.54)
BSC
J24 0801
OBSOLETE PACKAGE
1064fb
17
LTC1064
U
PACKAGE DESCRIPTIO
N Package
24-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
1.265*
(32.131)
MAX
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
.255 ± .015*
(6.477 ± 0.381)
.300 – .325
(7.620 – 8.255)
.130 ± .005
(3.302 ± 0.127)
.045 – .065
(1.143 – 1.651)
.020
(0.508)
MIN
.008 – .015
(0.203 – 0.381)
(
+.035
.325 –.015
+0.889
8.255
–0.381
)
.120
(3.048)
MIN
.065
(1.651)
TYP
N24 1103
.100
(2.54)
BSC
.018 ± .003
(0.457 ± 0.076)
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
1064fb
18
LTC1064
U
PACKAGE DESCRIPTIO
SW Package
24-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 ±.005
.030 ±.005
TYP
N
24
23
22
21
.598 – .614
(15.190 – 15.600)
NOTE 4
20 19 18 17 16
15
14
13
N
.325 ±.005
.420
MIN
.394 – .419
(10.007 – 10.643)
NOTE 3
1
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.005
(0.127)
RAD MIN
.009 – .013
(0.229 – 0.330)
.291 – .299
(7.391 – 7.595)
NOTE 4
.010 – .029 × 45°
(0.254 – 0.737)
2
3
4
5
6
7
8
.093 – .104
(2.362 – 2.642)
9
10
11
12
.037 – .045
(0.940 – 1.143)
0° – 8° TYP
.050
(1.270)
BSC
NOTE 3
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
1
.004 – .012
(0.102 – 0.305)
.014 – .019
(0.356 – 0.482)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
S24 (WIDE) 0502
1064fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC1064
U
TYPICAL APPLICATIO S
Clock-Tunable, 30kHz to 90kHz 8th Order Notch Filter
Providing Notch Depth in Excess of 60dB
R13
C2
R14
R22
2
R32
3
R42
4
5
6
C1
7
8V
0.1µF
8
R12
9
R31
10
R21
R11
11
12
VIN1
INV B
INV C
HPB/NB
HPC/NC
BPB
BPC
LPB
LPC
SB
SC
AGND
V–
LTC1064
V+
CLK
50/100
SA
LPA
LPD
BPA
BPD
HPA/NA
HPD
INV A
INV D
Amplitude Response
24
23
R23
22
R33
R31 = 50k
R32 = 88.7k
R33 = 100k
R34 = 63.4k
R42 = 48.7k
0
21
–20
0.1µF
20
19
BW
–10
–30
–8V
18
fCLK ≤ 5MHz
C3
17
–40
–50
–60
–70
–80
16
15
R44
14
R34
13
R24
RG = 68.1k
RL4 = 10k (0.1%)
RH4 = 10k (0.1%)
R44 = 12.4k
–90
C1 = C2 = C3 = 15pF
THE NOTCH DEPTH FROM
5kHz TO 30kHz IS 50dB
WIDEBAND NOISE = 300µVRMS
RL4
0.1%
RH4
0.1%
RESISTOR VALUES:
R11 = 50k
R21 = 5k
R12 = 15.4k R22 = 10k
R13 = 10k
R23 = 10k
R14 = 9.09k R24 = 10k
10
GAIN (dB)
1
VS = ±8V
fCLK = 4MHz
–100
–110
10
20
30
40
50
60
INPUT FREQUENCY (kHz)
RG
70
1064 TA22
–
LT1056
VOUT
+
1064 TA21
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENT
LTC1061
Triple Universal Filter Building Block
Three Filter Building Blocks in a 20-Pin Package
LTC1068 Series
Quad Universal Building Blocks
fCLK:fO = 25:1, 50:1, 100:1 and 200:1
LTC1164
Low Power, Quad Universal Filter Building Block
Low Noise, Low Power Pin-for-Pin LTC1064 Compatible
LTC1264
High Speed, Quad Universal Building Block
Up to 250kHz Center Frequency
1064fb
20
Linear Technology Corporation
LT/LT 0905 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1989