LINER LTC3772BETS8 Micropower no rsense constant frequency step-down dc/dc controller Datasheet

LTC3772B
Micropower No RSENSE
Constant Frequency Step-Down
DC/DC Controller
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FEATURES
DESCRIPTIO
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The LTC®3772B is a constant frequency current mode
step-down DC/DC controller in a low profile 8-lead SOT-23
(ThinSOTTM) and a 3mm × 2mm DFN package. The No
RSENSETM architecture eliminates the need for a current
sense resistor, improving efficiency and saving board
space.
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No Current Sense Resistor Required
High Output Currents Easily Achieved
Internal Soft-Start Ramps VOUT
Wide VIN Range: 2.75V to 9.8V
Low Dropout: 100% Duty Cycle
Constant Frequency 550kHz Operation
Low Ripple Pulse Skipping Operation at Light Load
Output Voltage as Low as 0.8V
±1.5% Voltage Reference Accuracy
Current Mode Operation for Excellent Line and Load
Transient Response
Only 8µA Supply Current in Shutdown
Low Profile 8-Lead SOT-23 (1mm) and
(3mm × 2mm) DFN (0.75mm) Packages
The LTC3772B automatically switches into pulse skipping
operation at light loads. It consumes only 200µA of quiescent current under a no-load condition.
The LTC3772B incorporates an undervoltage lockout feature that shuts down the device when the input voltage
falls below 2V. To maximize the runtime from a battery
source, the external P-channel MOSFET is turned on
continuously in dropout (100% duty cycle). High switching frequency of 550kHz allows the use of a small inductor
and capacitors. An internal soft-start smoothly ramps the
output voltage from zero to its regulation point.
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APPLICATIO S
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1- or 2-Cell Li-Ion Battery-Powered Applications
Wireless Devices
Portable Computers
Distributed Power Systems
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
ThinSOT and No RSENSE are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by
U.S. Patents including 5731694, 6127815.
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TYPICAL APPLICATIO
Efficiency and Power Loss vs Load Current
(Figure 5 Circuit)
550kHz Micropower Step-Down DC/DC Converter
ITH/RUN
VIN
2.75V TO 9.8V
VIN
LTC3772B
SW
47µF
VOUT
2.5V
2A
174k
60
0.1
50
40
POWER LOSS
30
3772B TA01
1
EFFICIENCY
70
3.3µH
VFB
80
10µF
PGATE
82.5k
90
POWER LOSS (W)
GND
22pF
10
100
20k
EFFICIENCY (%)
680pF
0.01
20
VIN = 3.3V
VIN = 5V
10
0
1
10
100
1000
LOAD CURRENT (mA)
0.001
10000
3772B TA01b
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LTC3772B
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ABSOLUTE MAXIMUM RATINGS (Note 1)
Input Supply Voltage (VIN)........................ – 0.3V to 10V
IPRG Voltage ............................... – 0.3V to (VIN + 0.3V)
VFB, ITH/RUN Voltages ............................. – 0.3V to 2.4V
SW Voltage ........... – 2V to (VIN + 1V) or 10V Maximum
PGATE Peak Output Current (<10µs) ........................ 1A
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Junction Temperature (Note 3) ............................ 125°C
Storage Temperature Range ................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)
TSOT-23 ........................................................... 300°C
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PACKAGE/ORDER INFORMATION
TOP VIEW
GND 1
8
PGATE
VFB 2
7
VIN
6
SW
5
NC
ITH/RUN 3
9
IPRG 4
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 230°C/W
TJMAX = 125°C, θJA = 76°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC3772BEDDB
8 NC
7 SW
6 VIN
5 PGATE
IPRG 1
ITH/RUN 2
VFB 3
GND 4
DDB PART MARKING
LBWP
TS8 PART MARKING
LTBWN
ORDER PART NUMBER
LTC3772BETS8
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
●
Input Voltage Range
TYP
MAX
UNITS
9.8
V
200
8
1
325
20
5
µA
µA
µA
2.0
1.85
2.75
2.60
V
V
0.7
1.2
1.7
µA
2.75
Input DC Supply Current
No Load
Shutdown
UVLO
(Note 4)
VFB = 0.83V
VITH/RUN = 0V
VIN < UVLO Threshold – 100mV
Undervoltage Lockout (UVLO) Threshold
VIN Rising
VIN Falling
Start-Up Current Source
VITH/RUN = 0V
Shutdown Threshold (at ITH/RUN)
VITH/RUN Rising
●
0.3
0.6
0.95
V
Regulated Feedback Voltage
0°C ≤ TA ≤ 85°C (Note 5)
–40°C ≤ TA ≤ 85°C (Note 5)
●
0.788
0.780
0.800
0.800
0.812
0.812
V
V
●
●
Feedback Voltage Line Regulation
2.75V ≤ VIN ≤ 9V (Note 5)
0.08
0.2
mV/V
Feedback Voltage Load Regulation
ITH/RUN = 1.6V (Note 5)
ITH/RUN = 1V (Note 5)
0.5
–0.5
0.2
–0.2
%
%
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LTC3772B
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
VFB Input Current
(Note 5)
Overvoltage Protect Threshold
Measured at VFB
MIN
TYP
MAX
UNITS
–10
2
10
nA
0.850
0.880
0.910
V
Overvoltage Protect Hysteresis
40
Oscillator Frequency
Normal Operation
Output Short Circuit
VFB = 0.8V
VFB = 0V
Gate Drive Rise Time
CLOAD = 3000pF
500
650
kHz
kHz
40
Gate Drive Fall Time
CLOAD = 3000pF
Peak Current Sense Voltage
IPRG = GND (Note 6)
IPRG = Floating
IPRG = VIN
Default Soft-Start Time
Time for VFB to Ramp from 0.05V to 0.75V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3772BETS8/LTC3772BEDDB are guaranteed to meet
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
550
200
mV
ns
40
●
●
●
55
120
190
70
138
208
ns
85
155
225
mV
mV
mV
0.8
ms
dissipation PD according to the following formula:
TJ = TA + (PD • θJA°C/W)
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: The LTC3772B is tested in a feedback loop that servos VFB to the
output of the error amplifier while maintaining ITH/RUN at the midpoint of
the current limit range.
Note 6: Peak current sense voltage is reduced dependent on duty cycle as
given in Figure 1.
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TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current (No Load)
vs Input Voltage
Quiescent Current (No Load)
vs Temperature
250
QUIESCENT CURRENT (µA)
QUIESCENT CURRENT (µA)
220
215
210
205
200
195
2
3
4
5
7
6
VIN (V)
8
9
10
3772B G01
25
VIN = 5V
230
QUIESCENT CURRENT (µA)
225
Quiescent Current (Shutdown)
vs Input Voltage
210
190
170
150
20
40 60
–60 –40 –20 0
TEMPERATURE (°C)
20
15
10
5
0
80 100
3772B G02
2
3
4
6
5
7
8
INPUT VOLTAGE (V)
9
10
3772B G03
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LTC3772B
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TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current (Shutdown)
vs Temperature
Shutdown Threshold
vs Temperature
14
800
Regulated Feedback Voltage
vs Temperature
812
VIN = 4.2V
VIN = 4.2V
808
700
8
6
4
804
VFB (mV)
10
VITH/RUN (mV)
QUIESCENT CURRENT (µA)
12
600
796
500
792
2
0
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
400
–50
100
80
–30
50
–10 10
30
TEMPERATURE (°C)
3772B G04
70
788
–50 –30
90
30
50
–10 10
TEMPERATURE (°C)
3772B G05
Regulated Feedback Voltage
vs Input Voltage
600
0.808
90
Oscillator Frequency
vs Input Voltage
560
VIN = 4.2V
590
80
3772B G06
Oscillator Frequency
vs Temperature
0.812
580
TA = 25°C
555
570
0.800
0.796
560
fOSC (kHz)
0.804
fOSC (kHz)
FEEDBACK VOLTAGE (V)
800
550
540
530
550
545
520
0.792
510
0.788
2
3
4
8
7
6
5
INPUT VOLTAGE (V)
500
–50
10
9
540
–30
30
–10 10
50
TEMPERATURE (°C)
3772B G07
2.1
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
80
3772B FG10
5
7
6
VIN (V)
8
9
10
2.5
ITH/RUN = 0V
2.4
1.9
2.3
1.7
1.5
1.3
1.1
0.9
2.2
2.1
RISING
2.0
1.9
1.8
FALLING
1.7
0.7
1.6
0.5
100
4
Undervoltage Lockout Thresholds
vs Temperature
INPUT VOLTAGE (V)
ITH/RUN = 0V
1.3
3
3772B G09
ITH/RUN Start-Up Current
vs Input Voltage
ITH/RUN PULL-UP CURRENT (µA)
ITH/RUN PULL-UP CURRENT (µA)
1.4
2
90
3772B G08
ITH/RUN Start-Up Current
vs Temperature
1.5
70
2
4
6
8
INPUT VOLTAGE (V)
10
3772B G11
1.5
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
80
100
3772B G12
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LTC3772B
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TYPICAL PERFOR A CE CHARACTERISTICS
Foldback Frequency
vs Temperature
Soft-Start Time vs Temperature
1100
300
230
200
IPRG = FLOAT
150
100
IPRG = GND
210
FREQUENCY (Hz)
SOFT-START TIME (µs)
IPRG = VIN
900
800
700
0
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
80
190
180
160
500
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
100
200
170
600
50
VFB = 0V
220
1000
250
80
150
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
100
3772B G14
3772B G13
Efficiency vs Load Current
80
100
3772B G15
Efficiency vs Load Current
100
100
VIN = 3.3V
90
VOUT = 3.3V
90
VIN = 4.2V
VOUT = 2.5V
80
VIN = 7V
EFFICIENCY (%)
EFFICIENCY (%)
MAXIMUM CURRENT SENSE THRESHOLD (mV)
Maximum Current Sense
Threshold vs Temperature
VIN = 5V
70
60
80
VOUT = 1.8V
70
60
50
50
VOUT = 2.5V
FIGURE 5 CIRCUIT
40
1
10
100
1000
LOAD CURRENT (mA)
10000
VIN = 5V
FIGURE 5 CIRCUIT
40
10
100
1000
LOAD CURRENT (mA)
3772B G16
3772B G17
Start-Up
Load Step
VOUT
1V/DIV
VOUT
100mV/DIV
(AC)
ITH/RUN
1V/DIV
IL
2A/DIV
INDUCTOR
CURRENT
2A/DIV
ILOAD
2A/DIV
500µs/DIV
VIN = 5V
VOUT = 2.5V
RLOAD = 1.5Ω
FIGURE 5 CIRCUIT
10000
3772B G18
VIN = 5V
20µs/DIV
VOUT = 2.5V
ILOAD = 100mA TO 1.5A
FIGURE 5 CIRCUIT
3772B G19
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LTC3772B
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PI FU CTIO S
(DDB/TS8)
GND (Pin 1/Pin 4): Ground Pin.
NC (Pin 5/Pin 8): No Connection Required.
VFB (Pin 2/Pin 3): Receives the feedback voltage from an
external resistor divider across the output.
SW (Pin 6/Pin 7): Switch Node Connection to Inductor
and Current Sense Input Pin. Normally, the external
P-channel MOSFET’s drain is connected to this pin.
ITH/RUN (Pin 3/Pin 2): This pin performs two functions. It
serves as the error amplifier compensation point as well as
the run control input. Nominal voltage range for this pin is
0.7V to 1.9V. Forcing this pin below 0.6V causes the
device to be shut down. In shutdown, all functions are
disabled and the PGATE pin is held high.
IPRG (Pin 4/Pin 1): Current Sense Limit Pin. Three-state
pin selects maximum peak sense voltage threshold. The
pin selects the maximum voltage drop across the external
P-channel MOSFET. Tie to VIN, GND or float to select
208mV, 70mV or 138mV respectively.
VIN (Pin 7/Pin 6): Supply and Current Sense Input Pin.
This pin must be closely decoupled to GND (Pin 4).
Normally the external P-channel MOSFET’s source is
connected to this pin.
PGATE (Pin 8/Pin 5): Gate Drive for the External P-Channel
MOSFET. This pin swings from 0V to VIN.
Exposed Pad (Pin 9, DDB Only): The Exposed Pad is
ground and must be soldered to the PCB for electrical
connection and optimum thermal performance.
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LTC3772B
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FU CTIO AL DIAGRA
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SW
VIN
UNDERVOLTAGE
LOCKOUT
UV
VOLTAGE
REFERENCE
0.8V
SLOPE
COMPENSATION
–
+
IPRG
1.2µA
–
CURRENT
COMPARATOR
+
ILIM
ITH
BUFFER
SHDN
–
550kHz
OSCILLATOR
RS R S
LATCH
Q
VIN
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
FREQUENCY
FOLDBACK
PGATE
0V
SHORT-CIRCUIT
DETECT
OVERVOLTAGE
COMPARATOR
–
ERROR
AMPLIFIER
1.2V
+
+
+
+
0.88V
–
ITH/RUN
SHUTDOWN
COMPARATOR
+
0.3V
–
VFB
0.8V
SOFT-START
RAMP
GND
3772B FD
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LTC3772B
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OPERATIO
(Refer to the Functional Diagram)
Main Control Loop (Normal Operation)
The LTC3772B is a constant frequency current mode stepdown switching regulator controller. During normal operation, the external P-channel MOSFET is turned on each
cycle when the oscillator sets the RS latch and turned off
when the current comparator resets the latch. The peak
inductor current at which the current comparator trips is
controlled by the voltage on the ITH/RUN pin, which is the
output of the error amplifier. The negative input to the error
amplifier is the output feedback voltage VFB, which is
generated by an external resistor divider connected between VOUT and ground. When the load current increases,
it causes a slight decrease in VFB relative to the 0.8V
reference, which in turn causes the ITH/RUN voltage to
increase until the average inductor current matches the
new load current.
The main control loop is shut down by pulling the ITH/RUN
pin to ground. Releasing the ITH/RUN pin allows an
internal 1µA current source to charge up the external
compensation network. When the ITH/RUN pin voltage
reaches approximately 0.6V, the main control loop is
enabled and the ITH/RUN voltage is pulled up by a clamp
to its zero current level of approximately one diode
voltage drop (0.7V). As the external compensation network continues to charge up, the corresponding peak
inductor current level follows, allowing normal operation.
The maximum peak inductor current attainable is set by a
clamp on the ITH/RUN pin at 1.2V above the zero current
level (approximately 1.9V).
Dropout Operation
When the input supply voltage decreases towards the
output voltage, the rate of change of inductor current
during the on cycle decreases. This reduction means that
at some input-output differential, the external P-channel
MOSFET will remain on for more than one oscillator cycle
(start dropping off-cycles) since the inductor current has
not ramped up to the threshold set by the error amplifier.
Further reduction in input supply voltage will eventually
cause the external P-channel MOSFET to be turned on
100%; i.e., DC. The output voltage will then be determined
by the input voltage minus the voltage drop across the
sense resistor, the MOSFET and the inductor.
Undervoltage Lockout Protection
To prevent operation of the external P-channel MOSFET
with insufficient gate drive, an undervoltage lockout circuit is incorporated into the LTC3772B. When the input
supply voltage drops below approximately 2V, the
P-channel MOSFET and all internal circuitry other than the
undervoltage block itself are turned off. Input supply
current in undervoltage is approximately 1µA.
Short-Circuit Protection
If the output is shorted to ground, the frequency of the
oscillator is folded back from 550kHz to approximately
200kHz while maintaining the same minimum on time.
This lower frequency allows the inductor current to safely
discharge, thereby preventing current runaway. After the
short is removed, the oscillator frequency will gradually
increase back to 550kHz as VFB rises through 0.3V on its
way back to 0.8V.
Overvoltage Protection
If VFB exceeds its regulation point of 0.8V by more than
10% for any reason, such as an output short-circuit to a
higher voltage, the overvoltage comparator will hold the
external P-channel MOSFET off. This comparator has a
typical hysteresis of 40mV.
Peak Current Sense Voltage Selection and Slope
Compensation (IPRG Pins)
When a controller is operating below 20% duty cycle, the
maximum sense voltage allowed across the external
P-channel MOSFET is 138mV, 70mV or 208mV for the
three respective states of the IPRG pin.
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LTC3772B
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OPERATIO
(Refer to the Functional Diagram)
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peak sense voltage by an amount given by the curve in
Figure 1.
voltage to rise smoothly from 0V to its final value, while
maintaining control of the inductor current. After the
soft-start is timed out, it is disabled until the part is put in
shutdown again or the input supply is cycled.
The peak inductor current is determined by the peak sense
voltage and the on-resistance of the external P-channel
MOSFET:
Light Load Current Operation
IPEAK =
∆VSENSE(MAX)
RDS(ON)
Soft-Start
The start-up of VOUT is controlled by the LTC3772B internal soft-start. During soft-start, the error amplifier compares the feedback signal VFB to the internal soft-start
ramp (instead of the 0.8V reference), which rises linearly
from 0V to 0.8V in about 0.6ms. This allows the output
Under very light load current conditions, the ITH/RUN pin
voltage will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current)
and the regulator will start to skip cycles, as it must, in
order to maintain regulation. This behavior allows the
regulator to maintain constant frequency down to very
light loads, resulting in low output ripple as well as low
audio noise and reduced RF interference, while providing
high light load efficiency.
SF = REDUCTION IN SENSE VOLTAGE (mV)
100
90
80
70
60
50
40
30
20
10
0
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
3772B F01
Figure 1. Reduction in Sense Voltage Due to
Slope Compensation vs Duty Cycle
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LTC3772B
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APPLICATIO S I FOR ATIO
Power MOSFET Selection
An external P-channel power MOSFET must be selected for
use with the LTC3772B. The main selection criteria for the
power MOSFET are the threshold voltage VGS(TH), the “on”
resistance RDS(ON), reverse transfer capacitance CRSS and
total gate charge.
Since the LTC3772B is designed for operation down to low
input voltages, a sublogic level threshold MOSFET (RDS(ON)
guaranteed at VGS = 2.5V) is required for applications that
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC3772B is less than
the absolute maximum VGS rating.
The P-channel MOSFET’s on-resistance is chosen based on
the required load current. The maximum average output
load current IOUT(MAX) is equal to the peak inductor current
minus half the peak-to-peak ripple current IRIPPLE. The
LTC3772B’s current comparator monitors the drain-tosource voltage VDS of the P-channel MOSFET, which is
sensed between the VIN and SW pins. The peak inductor
current is limited by the current threshold, set by the voltage on the ITH pin of the current comparator. The voltage
on the ITH pin is internally clamped, which limits the maximum current sense threshold ∆VSENSE(MAX) to approximately 138mV when IPRG is floating (70mV when IPRG is
tied low; 208mV when IPRG is tied high).
The output current that the LTC3772B can provide is given by:
IOUT (MAX) =
∆VSENSE(MAX) IRIPPLE
–
RDS(ON)
2
A reasonable starting point is setting ripple current IRIPPLE
to be 40% of IOUT(MAX). Rearranging the above equation
yields:
RDS(ON)(MAX) =
5 ∆VSENSE(MAX)
•
6
IOUT (MAX)
However, for operation above 20% duty cycle, slope compensation has to be taken into consideration to select the
appropriate value of RDS(ON) for the required amount of load
current:
RDS(ON)(MAX) =
5 ∆VSENSE(MAX) – SF
•
6
IOUT(MAX)
where SF is a factor whose value is obtained from the curve
in Figure 1.
These must be further derated to take into account the
significant variation in on-resistance with temperature. The
following equation is a good guide for determining the
required RDS(ON)MAX at 25°C (manufacturer’s specification), allowing some margin for variations in the LTC3772B
and external component values:
RDS(ON)(MAX) =
∆VSENSE(MAX) – SF
5
• 0.9 •
6
IOUT(MAX) • ρT
The ρT is a normalizing term accounting for the temperature variation in on-resistance, which is typically about
0.4%/°C, as shown in Figure 2. Junction to case temperature TJC is about 10°C in most applications. For a maximum
ambient temperature of 70°C, using ρ80°C ≅ 1.3 in the above
equation is a reasonable choice.
The required minimum RDS(ON) of the MOSFET is also
governed by its allowable power dissipation. For applications that may operate the LTC3772B in dropout–i.e., 100%
2.0
ρT NORMALIZED ON RESISTANCE
The basic LTC3772B application circuit is shown on the front
page of this data sheet. The load requirement drives the
selection of external components: the power MOSFET,
inductor and output diode, as well as the input bypass
capacitor CIN and output bypass capacitor COUT.
1.5
1.0
0.5
0
– 50
50
100
0
JUNCTION TEMPERATURE (ϒC)
150
3772B F02
for Duty Cycle < 20%.
Figure 2. RDS(ON) vs Temperature
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LTC3772B
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APPLICATIO S I FOR ATIO
duty cycle–at its worst case the required RDS(ON) is given
by:
PP
RDS(ON)(DC =100%) =
(IOUT (MAX) )2 (1 + δP )
where PP is the allowable power dissipation and δP is the
temperature dependency of RDS(ON). (1 + δP) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but δP = 0.005/°C can be used as an
approximation for low voltage MOSFETs.
In applications where the maximum duty cycle is less than
100% and the LTC3772B is in continuous mode, the RDS(ON)
is governed by:
RDS(ON) ≅
PP
(DC )IOUT 2 (1 + δP )
where DC is the maximum operating duty cycle of the
LTC3772B.
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor ripple
current. However, this is at the expense of efficiency due
to an increase in MOSFET gate charge losses.
The inductance value also has a direct effect on ripple
current. In normal operation, the ripple current, IRIPPLE, decreases with higher inductance or frequency and increases
with higher V IN or as V OUT approaches 1/2 V IN . The
inductor’s peak-to-peak ripple current is given by:
IRIPPLE =
VIN − VOUT ⎛ VOUT + VD ⎞
⎜
⎟
f(L) ⎝ VIN + VD ⎠
where f is the operating frequency. VD is the forward voltage drop of the catch diode, 0.5V typical. Accepting larger
values of IRIPPLE allows the use of low inductances, but results in higher output voltage ripple and greater core losses.
A reasonable starting point for setting ripple current is
IRIPPLE = 0.4(IOUT(MAX)). Remember, the maximum IRIPPLE
occurs at the maximum input voltage.
Inductor Core Selection
Once the inductance value is determined, the type of inductor must be selected. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko and Sumida.
Output Diode Selection
The catch diode carries load current during the off-time. The
average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the diode
conducts most of the time. As VIN approaches VOUT the
diode conducts only a small fraction of the time. The most
stressful condition for the diode is when the output is shortcircuited. Under this condition the diode must safely handle
IPEAK at close to 100% duty cycle. Therefore, it is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode
ratings.
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LTC3772B
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APPLICATIO S I FOR ATIO
Under normal load conditions, the average current conducted by the diode is:
⎛V −V ⎞
ID = ⎜ IN OUT ⎟ IOUT
⎝ VIN + VD ⎠
The allowable forward voltage drop in the diode is calculated from the maximum short-circuit current as:
VF ≅
PD
The output ripple, ∆VOUT, is determined by:
⎛
1 ⎞
∆VOUT ≤ ∆IL ⎜ ESR +
⎟
⎝
8fC OUT ⎠
IPEAK
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements.
A fast switching diode must also be used to optimize efficiency. Schottky diodes are a good choice for low forward
drop and fast switching times. Remember to keep lead
length short and observe proper grounding to avoid ringing and increased dissipation.
An additional consideration in applications where low noload quiescent current is critical is the reverse leakage
current of the diode at the regulated output voltage. A leakage greater than several microamperes can represent a
significant percentage of the total input current.
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large
ripple voltage, a low ESR input capacitor sized for the
maximum RMS current should be used. RMS current is
given by:
IRMS = IOUT (MAX)
The output filtering capacitor C smooths out current flow
from the inductor to the load, help maintain a steady output voltage during transient load changes and reduce output
voltage ripple. The capacitors must be selected with sufficiently low ESR to minimize voltage ripple and load step
transients and sufficiently bulk capacitance to ensure the
control loop stability.
VOUT
VIN
VIN
–1
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000 hours
of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.
The output ripple is highest at maximum input voltage since
∆IL increases with input voltage. Multiple capacitors placed
in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer,
aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density
than other types. Tantalum capacitors have the highest
capacitance density but it is important to only use types
that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly
higher ESR but can be used in cost-sensitive applications
provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have
excellent low ESR characteristics but can have a high
voltage coefficient and audible piezoelectric effects. The
high Q of ceramic capacitors with trace inductance can also
lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input, VIN.
At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage
spike at VIN large enough to damage the part.
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LTC3772B
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APPLICATIO S I FOR ATIO
For ceramic capacitors, use X7R or X5R types: do not use
Y5V. Manufacturers include AVX, Kemet, Murata, Taiyo
Yuden and TDK.
Setting Output Voltage
The LTC3772B output voltages are each set by an external
feedback resistor divider carefully placed across the output as shown in Figure 3. The regulated output voltage is
determined by:
⎛ R ⎞
VOUT = 0.8 V • ⎜ 1 + B ⎟
⎝ RA ⎠
To improve the frequency response, a feed-forward capacitor, CFF, may be used. Great care should be taken to route
the VFB line away from noise sources, such as the inductor
or the SW line.
LTC3772B
VOUT
RB
CFF
VFB
RA
3772B F03
Figure 3. Setting Output Voltage
Efficiency Considerations
The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
Efficiency = 100% – (η1 + η2 + η3 + ...)
where η1, η2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, five main sources usually account for most of the
losses in LTC3772B circuits: 1) LTC3772B DC bias current,
2) MOSFET gate charge current, 3) I2R losses, 4) voltage
drop of the output diode and 5) external MOSFET transition losses.
1. The VIN current is the DC supply current, given in the
electrical characteristics, that excludes MOSFET driver
and control currents. VIN current results in a small loss
which increases with VIN.
2. MOSFET gate charge current results from switching the
gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from VIN to ground. The
resulting dQ/dt is a current out of VIN that is typically
much larger than the DC supply current. In continuous
mode, IGATECHG = (f)(dQ).
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current shunt. In continuous
mode the average output current flows through L but is
“chopped” between the P-channel MOSFET (in series
with RSENSE) and the output diode. The MOSFET RDS(ON)
plus RSENSE multiplied by duty cycle can be summed with
the resistances of L and RSENSE to obtain I2R losses.
4. The output diode is a major source of power loss at high
currents and gets worse at high input voltages. The diode
loss is calculated by multiplying the forward voltage
times the diode duty cycle multiplied by the load current.
For example, assuming a duty cycle of 50% with a Schottky diode forward voltage drop of 0.4V, the loss increases
from 0.5% to 8% as the load current increases from 0.5A
to 2A.
5. Transition losses apply to the external MOSFET and
increase at higher operating frequencies and input voltages. Transition losses can be estimated from:
Transition Loss = 2(VIN)2IO(MAX)CRSS(f)
Other losses including CIN and COUT ESR dissipative losses
and inductor core losses, generally account for less than
2% total additional loss.
Foldback Current Limiting
As described in the Output Diode Selection, the worst-case
dissipation occurs with a short-circuited output when the
diode conducts the current limit value almost continuously.
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LTC3772B
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APPLICATIO S I FOR ATIO
To prevent excessive heating in the diode, foldback current
limiting can be added to reduce the current in proportion
to the severity of the fault.
Foldback current limiting is implemented by adding diodes
DFB1 and DFB2 between the output and the ITH/RUN pin as
shown in Figure 4. In a hard short (VOUT = 0V), the current
will be reduced to approximately 50% of the maximum
output current.
VOUT
LTC3772B
RB
ITH /RUN VFB
DFB1
RA
DFB2
3772B F04
Figure 4. Foldback Current Limiting
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD)(ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The
regulator loop then returns VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for overshoot or ringing. OPTI-LOOP compensation allows the
transient response to be optimized over a wide range of
output capacitance and ESR values.
The ITH series RC-CC filter (see Functional Diagram) sets
the dominant pole-zero loop compensation. The ITH external components shown in the Figure 5 circuit will provide
an adequate starting point for most applications. The
values can be modified slightly (from 0.2 to 5 times their
suggested values) to optimize transient response once the
final PC layout is done and the particular output capacitor
type and value have been determined. The output capacitors need to be decided upon because the various types
and values determine the loop feedback factor gain and
phase. An output current pulse of 20% to 100% of full load
current having a rise time of 1µs to 10µs will produce
output voltage and ITH pin waveforms that will give a sense
of the overall loop stability. The gain of the loop will be
increased by increasing RC and the bandwidth of the loop
will be increased by decreasing CC. The output voltage
settling behavior is related to the stability of the closedloop system and will demonstrate the actual overall supply
performance. For a detailed explanation of optimizing the
compensation components, including a review of control
loop theory, refer to Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
Minimum On-Time Considerations
Minimum on-time, tON(MIN), is the smallest amount of
time that the LTC3772B is capable of turning the top
MOSFET on and then off. It is determined by internal
timing delays and the gate charge required to turn on the
top MOSFET. The minimum on-time for the LTC3772B is
about 250ns. Low duty cycle and high frequency applications may approach this minimum on-time limit and care
should be taken to ensure that:
tON(MIN) <
VOUT
f • VIN
If the duty cycle falls below what can be accommodated by
the minimum on-time, the LTC3772B will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple current and ripple voltage will increase.
3772bfa
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LTC3772B
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TYPICAL APPLICATIO S
550kHz Micropower, 1A, 2-Cell Li-Ion to 3.3VOUT
Step-Down DC/DC Converter
100pF
15k
ITH/RUN
VIN
CIN
22µF
LTC3772B
GND
56.2k
Si2341DS
PGATE
IPRG
L1 4.7µH
VFB
SW
UPS120
22pF
VIN
5V TO 8.4V
COUT
47µF
VOUT
3.3V
1A
174k
3772B TA02a
L1: SUMIDA CR43-4R7
CIN: MURATA GRM32ER61C226KA65B
COUT: MURATA GRM32ER60J476ME20B
Efficiency vs Load Current
100
VIN = 5.5V
90
EFFICIENCY (%)
VIN = 7.2V
80
VIN = 8.4V
70
60
50
40
1
10
100
1000
LOAD CURRENT (mA)
10000
3772B TA02b
Start-Up
Load Step
VOUT
2V/DIV
VOUT
100mV/DIV
(AC)
ITH/RUN
1V/DIV
IL
500mA/DIV
IL
1A/DIV
ILOAD
500mA/DIV
VIN = 5.5V
VOUT = 3.3V
RLOAD = 3Ω
400µs/DIV
3772B TA02c
20µs/DIV
VIN = 5.5V
VOUT = 3.3V
ILOAD = 40mA TO 500mA
3772B TA02d
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15
LTC3772B
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TYPICAL APPLICATIO S
550kHz Micropower 3A Step-Down DC/DC Converter
220pF
34.8k
ITH/RUN
VIN
CIN
22µF
LTC3772B
GND
PGATE
IPRG
82.5k
VFB
NTMS5PO2R2
L1 2.2µH
SW
COUT
100µF
×2
B320A
22pF
VIN
2.75V TO 9.8V
174k
VOUT
2.5V
3A
3772B TA03a
L1: VISHAY IHLP-2525CZ-01
CIN: GRM32ER61A220KA65B
COUT: TAIYO YUDEN LDK375BJ107MM
Efficiency vs Load Current
100
90
EFFICIENCY (%)
VIN = 3.3V
80
VIN = 5V
70
60
50
40
1
100
1000
10
LOAD CURRENT (mA)
10000
3772B TA03b
Start-Up
Load Step
VOUT
2V/DIV
VOUT
100mV/DIV
(AC)
ITH/RUN
1V/DIV
IL
2A/DIV
IL
2A/DIV
ILOAD
2A/DIV
CITH = 220pF
RITH = 34.8k
RLOAD = 1.5Ω
400µs/DIV
3772B TA03c
VIN = 5V
20µs/DIV
VOUT = 2.5V
ILOAD = 15OmA TO 2A
3772B TA03d
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LTC3772B
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TYPICAL APPLICATIO S
550kHz Micropower 5VIN to 1.8VOUT at 8A DC/DC Converter
470pF
15k
ITH/RUN
VIN
CIN
22µF
LTC3772B
GND
140k
VIN
PGATE
IPRG
VFB
Si9433DBY
×2
L1 1µH
SW
CSHD10-45L
22pF
174k
VIN
5V
COUT
100µF
×2
VOUT
1.8V
8A
3772B TA04a
L1: TOKO FDV0630-1R0
CIN: MURATA GRM32ER61C226K
COUT: MURATA GRM32ER60J107K
Efficiency vs Load Current
100
EFFICIENCY (%)
90
80
70
60
50
40
100
1000
LOAD CURRENT (mA)
10000
3772B TA04b
Start-Up
Load Step
VOUT
1V/DIV
VOUT
200mV/DIV
AC COUPLED
ITH/RUN
1V/DIV
IL
10A/DIV
IL
5A/DIV
ILOAD
10A/DIV
VIN = 5V
VOUT = 1.8V
RLOAD = 0.25Ω
500µs/DIV
3772B TA04c
VIN = 5V
20µs/DIV
VOUT = 1.8V
ILOAD = 800mA TO 8A
3772B TA04d
3772bfa
17
LTC3772B
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
0.61 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
R = 0.115
TYP
5
R = 0.05
TYP
0.40 ± 0.10
8
0.70 ±0.05
2.55 ±0.05
1.15 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
2.20 ±0.05
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
2.00 ±0.10
(2 SIDES)
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
0 – 0.05
4
0.25 ± 0.05
1
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
(DDB8) DFN 0905 REV B
0.50 BSC
2.15 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3772bfa
18
LTC3772B
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PACKAGE DESCRIPTIO
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
0.52
MAX
2.90 BSC
(NOTE 4)
0.65
REF
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
1.95 BSC
TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3772bfa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3772B
U
TYPICAL APPLICATIO
220pF
15k
VIN
ITH/RUN
CIN
22µF
LTC3772B
GND
82.5k
PGATE
IPRG
VFB
FDC638P
L1 3.3µH
SW
B220A
22pF
VIN
3V TO 8V
COUT
47µF
VOUT
2.5V
2A
174k
3772B F05
L1: TOKO D53LC #A915AY-3R3M
CIN: TAIYO YUDEN LMK316BJ226ML
COUT: TAIYO YUDEN JMK325BJ476MM
Figure 5. 550kHz Micropower Step-Down DC/DC Converter
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1624
High Efficiency SO-8 N-Channel Switching Regulator Controller
N-Channel Drive, 3.5V ≤ VIN ≤ 36V
TM
LTC1625
No RSENSE Synchronous Step-Down Regulator
97% Efficiency, No Sense Resistor
LTC1772/LTC1772B
550kHz ThinSOT Step-Down DC/DC Controllers
2.5V ≤ VIN ≤ 9.8V, VOUT ≥ 0.8V, IOUT ≤ 6A
LTC1778/LTC1778-1
No RSENSE Current Mode Synchronous Step-Down Controllers
4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ (0.9)(VIN), IOUT Up to 20A
LTC1872/LTC1872B
550kHz ThinSOT Step-Up DC/DC Controllers
2.5V ≤ VIN ≤ 9.8V; 90% Efficiency
LTC3411/LTC3412
1.25A/2.5A, 4MHz Monolithic Synchronous Step-Down Converter
95% Efficiency, 2.5V ≤ VIN ≤ 5.5V, VOUT ≥ 0.8V,
TSSOP16 Exposed Pad Package
LTC3414
4A, 4MHz Monolithic Synchronous Step-Down Converter
95% Efficiency, 2.5V ≤ VIN ≤ 5.5V, VOUT ≥ 0.8V,
TSSOP20 Exposed Pad Package
LTC3418
8A, 4MHz Monolithic Synchronous Step-Down Converter
95% Efficiency, 2.5V ≤ VIN ≤ 5.5V, VOUT ≥ 0.8V,
TSSOP20 Exposed Pad Package
LTC3440
600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter
2.5V ≤ VIN ≤ 5.5V, Single Inductor
LTC3736/LTC3736-2
Dual, 2-Phase, No RSENSE Synchronous Controller
with Output Tracking
VIN: 2.75V to 9.8V, IOUT Up to 5A,
4mm × 4mm QFN Package
LTC3736-1
Dual, 2-Phase, No RSENSE Synchronous Controller
with Spread Spectrum
VIN: 2.75V to 9.8V, Spread Spectrum Operation, Output
Voltage Tracking, 4mm × 4mm QFN Package
LTC3737
Dual, 2-Phase, No RSENSE Controller with Output Tracking
VIN: 2.75V to 9.8V, IOUT Up to 5A,
4mm × 4mm QFN Package
LTC3772
Micropower No RSENSE Constant Frequency Controller
VIN: 2.75V to 9.8V, IOUT Up to 5A, ThinSOT,
3mm × 2mm DFN Package
LTC3776
Dual, 2-Phase, No RSENSE Synchronous Controller for
DDR/QDR Memory Termination
Provides VDDQ and VTT with one IC, 2.75V ≤ VIN ≤ 9.8V,
Adjustable Constant Frequency with PLL Up to 850kHz,
Spread Spectrum Operation, 4mm × 4mm QFN and
16-Lead SSOP Packages
LTC3808
No RSENSE, Low EMI, Synchronous Step-Down Controller with
Output Tracking
2.75V ≤ VIN ≤ 9.8V, Spread Spectrum Operation,
3mm × 4mm DFN and 16-Lead SSOP Packages
LTC3809/LTC3809-1
No RSENSE, Synchronous Step-Down Controller
2.75V ≤ VIN ≤ 9.8V, 3mm × 4mm DFN and 10-Lead MSOP
Packages
3772bfa
20
Linear Technology Corporation
LT 0606 REV A • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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