Anpec APL531230S5I-TRG Ultra-low-noise, high psrr, low-dropout, 300ma linear regulator Datasheet

APL5312
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator
Features
General Description
•
Wide Operating Voltage: 2.3V~6V
•
Low Dropout Voltage: 290mV @ 3V/300mA
The APL5312 is an ultra low noise, low dropout linear
regulator, which operates from 2.3V to 6V input voltage
•
Fixed Output Voltages: 1.5V~3.5V with Step 100mV,
and delivers up to 300mA. Typical dropout voltage is only
290mV at 300mA loading. Designed for use in RF
2.85V
applications, the high PSRR 74dB and low noise 36µVRMS
makes it an ideal choice.
•
Guaranteed 300mA Output Current
•
High PSRR: 74dB before 10kHz
•
Low Output Noise: 36µVRMS at 100Hz to 100kHz
•
Current-Limit Protection
•
Controlled Short Circuit Current: 50mA
•
Over-Temperature Protection
•
Stable with 1µF Capacitor for Any Load
limit protection to ensure specified output current and
controlled short-circuit current. The APL5312 regulator
•
Excellent Load/Line Transient
comes in a miniature SOT-23-5 and SC-70-5 package.
•
SOT-23-5 and SC-70-5 Packages
•
Lead Free and Green Devices Available
Design with an internal P-channel MOSET pass element,
the APL5312 maintains a low supply current, independent of the load current and dropout voltage. Other features include thermal-shutdown protection and current-
Pin Configuration
(RoHS Compliant)
SOT-23-5/SC-70-5
Applications
•
Cellular Phones
•
Portable and Battery-Powered Equipment
•
Wireless LANs
•
GPS
VIN
1
GND
2
SHDN
3
5
4
VOUT
BP
APL5312
Ordering and Marking Information
Package Code
B : SOT-23-5 S5 : SC-70-5
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Voltage Code
15 : 1.5V 30 : 3.0V
Assembly Material
G : Halogen and Lead Free Device
APL5312
Assembly Material
Handling Code
Temperature Range
Package Code
Voltage Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
1
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APL5312
Ordering and Marking Information (Cont.)
SOT-23-5 packages
Product Name Marking
Product Name
Marking
Product Name Marking
Product Name
Marking
APL5312-15B
339X
APL5312-16B
33AX
APL5312-17B
33BX
APL5312-18B
33CX
APL5312-19B
33DX
APL5312-20B
33EX
APL5312-21B
33FX
APL5312-22B
33GX
APL5312-23B
33HX
APL5312-24B
33IX
APL5312-25B
33JX
APL5312-26B
33KX
APL5312-27B
33LX
APL5312-28B
33MX
APL5312-29B
33NX
APL5312-30B
33OX
APL5312-31B
33PX
APL5312-32B
33QX
APL5312-33B
33RX
APL5312-34B
33SX
APL5312-35B
33TX
APL5312-285B
33dX
SC-70-5 packages
Product Name
Marking
Product Name
Marking
Product Name
Marking
Product Name
Marking
APL5312-15S5
339
APL5312-16S5
33A
APL5312-17S5
33B
APL5312-18S5
33C
APL5312-19S5
33D
APL5312-20S5
33E
APL5312-21S5
33F
APL5312-22S5
33G
APL5312-23S5
33H
APL5312-24S5
33I
APL5312-25S5
33J
APL5312-26S5
33K
APL5312-27S5
33L
APL5312-28S5
33M
APL5312-29S5
33N
APL5312-30S5
33O
APL5312-31S5
33P
APL5312-32S5
33Q
APL5312-33S5
33R
APL5312-34S5
33S
APL5312-35S5
33T
APL5312-285S5
33d
Absolute Maximum Ratings
Symbol
(Note 1)
Parameter
Rating
Unit
VIN, VOUT
Input Voltage or Out Voltage
6.5
V
SHDN/BP
VOUT Shutdown Control Pin/Bypass Signal Pin
6.5
V
0 to 125
°
C
-65 to +150
°
C
260
°
C
TJ
Operating Junction Temperature
TSTG
Storage Temperature Range
TSDR
Maximum Lead Temperature Soldering, 10 Seconds
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
θJA
Parameter
Thermal Resistance-Junction to Ambient
Rating
Unit
(Note 2)
SOT-23-5
SC-70-5
240
325
SOT-23-5
SC-70-5
410
310
o
C/W
Power Dissipation, TA = 25 oC (Note 3)
PD
mW
Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Note 3 : When mounted on a (Copper foil area 50%, 45x45x1.6tmm) glass epoxy board.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
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APL5312
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature, VIN = VOUT+1V, CIN = COUT = 1µ F, TA = -40 to 85°C. Typical
values refer to TA = 25°C.
Symbol
VIN
VOUT
ILIMIT
IQ
IOUT
Parameter
Test Conditions
Input Voltage
Output Voltage Accuracy
VIN = 5V
APL5312
Min.
Typ.
Max.
Unit
2.3
-
6
V
-2
-
2
%
Output Voltage Range
1.5
-
3.5
V
Circuit Current Limit
450
500
550
mA
IOUT = 0mA
-
120
160
IOUT = 300mA
-
120
160
Quiescent Current
-
300
-
mA
REGLINE
Line Regulation
VOUT+0.5V<VIN<6V, IOUT = 10mA
-
0.1
0.3
%
REGLOAD
Load Regulation
VIN = VOUT+1V, 0mA<IOUT<300mA
-
0.8
1.5
%
VOUT =1.5V, IOUT = 300mA
-
520
680
VOUT = 2V, IOUT = 300mA
-
430
560
VOUT = 3V, IOUT = 300mA
-
290
380
f = 1kHz, CBP=10nF, IOUT=10mA
-
73
-
VDROP
PSRR
ISHORT
Load Current
µA
Dropout Voltage (Note 4)
Ripple Rejection
mV
dB
f = 10kHz, CBP=10nF, IOUT = 10mA
-
74
-
f = 100kHz, CBP = 10nF, IOUT = 10mA
-
55
-
Short Current
VOUT = 0V
-
50
-
mA
Noise
f = 100Hz to 100kHz, CBP = 10nF,
IOUT = 10mA
-
36
-
µVRMS
High Threshold Voltage
1.6
-
VIN+0.3
-0.3
-
0.1
0.4
1
µA
0.1
1
µA
VSHDN
V
ISHDN
Low Threshold Voltage
Shutdown Input Bias Current
IQSHDN
Shutdown Supply Current
SHDN = Low, VIN = VOUT+1V
-
TEXIT
Shutdown Exit Delay
VOUT = 90%, RLOAD = 50Ω
-
100
-
µS
Over Temperature Shutdown
-
160
-
°
C
Over Temperature Shutdown
Hysteresis
-
20
-
°
C
-
100
-
ppm/°
C
-
1
-
µF
0.025
-
1
Ω
OTS
TC
COUT
Output Voltage Temperature
Coefficient
VSHDN = VIN
TJ = -40~125°
C
Output Capacitor
ESR
Note 4 : Dropout voltage definition: VIN-VOUT when VOUT is 2% below the value of VOUT for VIN= VOUT +1V.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
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APL5312
Typical Operating Characteristics
Quiescent Current vs. Ambient Temperature
Quiescent Current vs. Output Current
180
160
120
Quiescent Current (µA)
Quiescent Current (µA)
125
115
110
105
140
120
VIN=4.5V
100
80
60
100
-40
-15
10
35
60
VIN=5.5V
85
0
50
Ambient Temperature (°C)
Quiescent Current vs. Input Voltage
VOUT=2.5V
350
160
140
Droput Voltage (mv)
Quiescent Current (µA)
300
400
180
120
100
80
60
40
300
250
200
TA=85 oC
150
TA=25 oC
100
50
20
0
1
2
3
4
5
0
6
0
50
Input Voltage (V)
140
500
120
Shutdown Exit Delay (µs)
600
400
VOUT=1.5V
300
VOUT=2.2V
200
100
0
VOUT=3.3V
0
50
100
150
200
Output Current (mA)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
100
150
200
250
300
3
3.3
Output Current (mA)
Dropout Voltage vs. Output Current
Dropout Voltage (mV)
250
Dropout Voltage vs.Output Current
200
0
100
150 200
Output Current (mA)
250
100
4
CBP=10nF
80
60
40
20
0
1.5
300
Shutdown Exit Delay
1.8
2.1
2.4
2.7
Output Voltage (V)
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APL5312
Typical Operating Characteristics (Cont.)
PSRR vs. Frequency
Current Limit vs. Input Voltage
560
-20
IOUT=10mA
540
-30
520
Current Limit (mA)
PSRR (dB)
-40
-50
VIN=5V
-60
-70
-80
VIN=4.5V
-90
-110
480
TA=85oC
460
440
400
20
100
1k
10k
4
100k 200k
5.5
6
Input Voltage (V)
Output Noise vs. BP Capacitance
Maximum Power Dissipation (mW)
140
120
100
80
60
IOUT=100mA
40
IOUT=10mA
1
10
400
SOT-23-5
350
300
SC-70-5
250
200
150
100
50
0
100
BP Capacitance (nF)
100
5
Maximun Power Dissipation vs. Ambient
Temperature
450
20
4.5
Frequency (Hz)
160
Output Noise (µVRMS)
500
420
-100
0
TA=25oC
0
25
50
75
100
125
Ambient Temperature (°C)
Region of Stable COUT ESR vs. Load Current
VOUT=2.5V
CIN=COUT=1µF, Y5V
COUT ESR (Ω)
10
Instable
1
0.1
Stable
0.01
Instable
0
50
100
150
200
Output Current (mA)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
250
300
5
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APL5312
Typical Operating Characteristics (Cont.)
Load Transient
Line Transient
VVOUT(50mV/div)
(50mV/div)
OUT
V
VININ=4.5V~5.5V
=4.5V~5.5V
IIOUT(1~300mA)
OUT (1~300mA)
TTr=1µs
=1µs
r
(50mV/div)
VOUT
OUT (50mV/div)
IIOUT
=10mA
=10mA
OUT
Time (0.1ms/div)
Time (0.1ms/div)
Exiting Shutdown Waveform
Entering Shutdown Delay
IIOUT
=100mA
OUT =100mA
CCBP=10nF
=10nF
BP
I OUT
=100mA
IOUT
=100mA
C
=10nF
BP=10nF
CBP
SHDN (1V/div)
SHDN (1V/div)
VOUT (1V/div)
VOUT (1V/div)
Time (0.1ms/div)
Time (50µs/div)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
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APL5312
Pin Description
PIN
NO.
I/O
FUNCTION
NAME
1
VIN
2
GND
3
SHDN
I
Voltage supply input pin
GND pin
I
Shutdown control pin, low = off, high = normal
4
BP
I
Bypass signal pin in fixed output type device
5
VOUT
O
Regulator output pin
Block Diagram
VIN
Thermal Shutdown
& Current Limit
Shutdown
SHDN
BP
VREF
_
MOS Driver
+
VOUT
GND
Typical Application Circuit
VIN
SHDN
CIN
1µF
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
VOUT
APL5312
BP
GND
CBP
10nF
7
COUT
1µF
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APL5312
Application Information
rent can reduce to 0.1µA. The SHDN pin cannot be floating,
a floating SHDN pin may cause an indeterminate state
Output Voltage Selection
The APL5312 are supplied with factory-set output voltages from 1.5V to 3.5V.
on the output. If it is no use, connect to VIN for normal
operation.
Capacitor Selection and Regulation Stability
Input-Output (Dropout) Voltage
The APL5312 uses at least a 1µF capacitor on the input.
The minimum input-output voltage differential (dropout)
determines the lowest usable supply voltage. The drop-
This capacitor can use Aluminum, Tantalum, or Ceramic
capacitors. Input capacitor with large value and low ESR
out voltage is a function of drain-to-source on resistance
multiplied by the load current.
provides better PSRR and line-transient response. The
output capacitor also can use Aluminum, Tantalum, or
Ceramic capacitor, and its proper values is at least 1µF,
ESR must be above 25mΩ. Large output capacitor val-
Current Limit
APL5312 includes a current-limit circuitry for linear
regulator. The current-limit protection, which senses the
ues can reduce noise and improve load-transient
response, stability, and PSRR. W ith X5R and Y5V
current flowing to the P-channel MOSFET, and controls
the output voltage. The point where limiting occurs is
dielectrics, 1µF is sufficient at all operating temperatures.
The selection of output capacitor’s is important because
IOUT =500mA. The output can be shortened to the ground
for an indefinite amount of time without damaging to the
it with COUT form a zero to provide the sufficient phase
margin (see the Figure COUT ESR vs. Load Current).
part.
Bypass Capacitor
Thermal Protection
Use a 10nF bypass capacitor at BP for low-output voltage
Thermal protection limits total power dissipation in the
APL5312. When the junction temperature exceeds
noise. The leakage current going into the BP pin should
be less than 10nA. Increasing the capacitance slightly
+160°C, the thermal sensor generates a logic signal to
turn off the pass element and let IC to cool. When the IC’s
decreases the output noise. Value above 0.1µF and below 1nF are not recommended (see the Figure Output
Noise vs. BP Capacitance).
junction temperature cools down by 20°C, the thermal
sensor will turn the pass element on again, resulting in a
Noise, PSRR, and Load-Transient Response
pulsed output during continuous thermal protection. Thermal protection is designed to protect the IC in the event of
The APL5312 is designed to deliver ultra-low noise and
fault conditions.
high PSRR, as well as low dropout and low quiescent
currents in battery–powered systems. When operating
Operating Region and Power Dissipation
The thermal resistance of the case and circuit board,
from sources other than batteries, improve PSRR and
transient response can be achieved by increasing input
ambient and junction air temperature, and the rate of air
flow all control the APL5312’s maximum power
and output capacitors, and bypass capacitor to form the
passive filtering techniques (see Output Noise vs. BP
dissipation. The power dissipation across the device is
P = IOUT (VIN-VOUT). The maximum power dissipation is:
Capacitance).
PMAX = (TJ - TA) / (θJC + θCA )
Shutdown
θJA = θJC + θCA
The APL5312 has an active high enable function. Force
where TJ - TA is the temperature difference between the
SHDN high (>1.6V) enables the VOUT, SHDN low (<0.4V) disables the VOUT. Enter the shutdown mode, it also causes
junction and ambient air.
θJC is the thermal resistance of the package, θCA is the
the output voltage to discharge through a 500Ω resistance to ground. In shutdown mode, the quiescent curCopyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
thermal resistance through the printed circuit board, copper traces, and other materials to the surrounding air, θJA
8
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APL5312
Application Information (Cont.)
Operating Region and Power Dissipation (Cont.)
is the thermal resistance between Junction and ambient
air. For continual operation, do not exceed the absolute
maximum junction Temperature rating of TJ = 125°C.
For example:
The SOT-23-5 package has maximum power dissipation 300mW at TA= 55°C, relatively 225mW at SC-70-5
package (see Maximum Power Dissipation vs. Ambient
Temperature).
VIN = 5V, IOUT = 250mA, VOUT = 3.3V,
PD = (5-3.3)V x 150mA = 255mW
According the power dissipation issue, we should adapt
the SOT-23-5 package. It could reduce the thermal
resistance to maintain the IC longer life.
The GND pin provides an electrical connection to the
ground and channeling heat away. The printed circuit
board (PCB) forms a heat sink and dissipates most of
the heat into ambient air.
Recommended Minimum Footprint
SC-70-5
0.076
0.052
0.046
0.05
0.1
0.081
SOT-23-5
0.038
0.02
Unit : Inch
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
0.026
0.016
Unit : Inch
9
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APL5312
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-5
INCHES
MILLIMETERS
MIN.
MIN.
MAX.
A
MAX.
1.45
0.057
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
0.020
b
0.30
0.50
0.012
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
0.118
0.071
E
2.60
3.00
0.102
E1
1.40
1.80
0.055
e
0.95 BSC
e1
1.90 BSC
0.037 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
10
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APL5312
Package Information
SC-70-5
D
e
E
E1
SEE VIEW A
c
b
0.15
A
GAUGE PLANE
SEATING PLANE
A1
A2
e1
L
VIEW A
S
Y
M
B
O
L
SC-70-5
INCHES
MILLIMETERS
MIN.
MAX.
MIN.
MAX.
A
0.80
1.10
0.031
0.043
A1
0.00
0.10
0.000
0.004
A2
0.80
1.00
0.031
0.040
b
0.15
0.30
0.006
0.012
c
0.08
0.25
0.003
0.010
D
1.90
2.20
0.075
0.087
E
2.00
2.40
0.079
0.095
E1
1.15
1.35
0.045
0.053
e
0.65 BSC
0.026 BSC
e1
1.30 BSC
0.051 BSC
L
0
0.15
0o
0.006
0.45
8o
0o
0.018
8o
Note : 1. Followed from JEDEC MO-223 AB.
2. Dimension D and E1 do not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
11
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APL5312
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOT-23-5
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.50±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.00 MIN.
0.6+0.00
-0.40
2.40±0.20
2.40±0.20
1.20±0.20
Application
SC-70-5
4.0±0.10
4.0±0.10
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-5
Tape & Reel
3000
SC-70-5
Tape & Reel
3000
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
12
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APL5312
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
SC-70-5
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
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APL5312
Classification Profile
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
14
www.anpec.com.tw
APL5312
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ 125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
15
www.anpec.com.tw
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