Allegro A2982 8-channel source driver Datasheet

A2982
8-Channel Source Driver
Features and Benefits
Description
▪ TTL, DTL, PMOS, or CMOS compatible inputs
▪ 500 mA output source current capability
▪ Transient-protected outputs
▪ Output breakdown voltage to 50 V
▪ DIP or SOIC packaging
Recommended for high-side switching applications that benefit
from separate logic and load grounds, these devices encompass
load supply voltages to 50 V and output currents to -500 mA.
These 8-channel source drivers are useful for interfacing
between low-level logic and high-current loads. Typical loads
include relays, solenoids, lamps, stepper and/or servo motors,
print hammers, and LEDs.
Package: 20-pin SOICW (suffix LW)
Not to scale
All devices may be used with 5 V logic systems — TTL, Schottky
TTL, DTL, and 5 V CMOS. The device packages offered are
electrically interchangeable, and will withstand a maximum
output off voltage of 50 V, and operate to a minimum of 5 V. All
devices in this series integrate input current limiting resistors
and output transient suppression diodes, and are activated by
an active high input.
The package is a 20-pin wide-body SOIC with improved
thermal characteristics compared to the 18-pin SOIC version
it replaces (100% pin-compatible electrically).
(drop-in replacement for discontinued 18-pin SOIC variants)
The package is lead (Pb) free, with 100% matte-tin leadframe
plating.
Simplified Block Diagram
(NC pins, 10 and 11, not present
on discontinued 18-pin LW package)
29310U
A2982
8-Channel Source Driver
Selection Guide
Part Number
A2982SLWTR-T
Package
Packing
Ambient Temperature
TA (°C)
20-pin SOICW
1000 per reel
–20 to 85
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
VCE
5 to 50
V
VIN
20
V
Output Current
IOUT
–500
mA
Package Power Dissipation
PD
See graph
–
–
Operating Ambient Temperature
TA
Range S
–20 to 85
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
A L L OWA B L E P A C K A G E P OW E R DIS S IP A T ION (W)
Output Voltage Range
Input Voltage
2.5
2.0
20-LE AD S OIC , R
JA
= 90 C /W
1.5
1.0
0.5
0
25
50
75
100
A MB IE NT T E MP E R A T UR E C
125
150
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A2982
8-Channel Source Driver
One of Eight Drivers
Typical electrosensitive
printer application
R
IN
1
1
20
IN
2
2
19
IN3
3
18
IN4
4
17
IN
5
5
16
IN6
6
15
IN
7
7
14
IN
8
8
13
VS
9
12
NC
10
11
R
R
R
R
R
R
R
L
L
L
L
L
L
L
L
NC
Pins 10 and 11 can float; other pins
match discontinued 18-pin SOIC: 1 to 9
same, pins 12 to 20 match pins 10 to 18
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A2982
8-Channel Source Driver
ELECTRICAL CHARACTERISTICS1,2 at TA = +25°C (unless otherwise specified).
Characteristic
Symbol
Test Fig.
Min.
Typ.
Max.
Units
VIN = 0.4 V, VS = 50 V
1
—
—
20
μA
IOUT = -45 mA
—
35
—
—
V
VIN = 2.4 V, IOUT = -100 mA
2
—
1.6
1.8
V
VIN = 2.4 V, IOUT = -225 mA
2
—
1.7
1.9
V
VIN = 2.4 V, IOUT = -350 mA
2
—
1.8
2.0
V
VIN = 2.4 V
3
—
140
200
μA
VIN = 12 V
3
—
1.25
1.93
mA
lOUT
VIN = 2.4 V, VCE = 2.0 V
2
-350
—
—
mA
Supply Current Leakage
Current
IS
VIN = 2.4 V*, VS = 50 V
4
—
—
10
mA
Clamp Diode Current
IR
VR = 50 V, VIN = 0.4 V*
5
—
—
50
μA
Clamp Diode Forward
Voltage
VF
IF = 350 mA
6
—
1.5
2.0
V
Turn-On Delay
tON
0.5 EIN to 0.5 EOUT, RL = 100Ω, VS = 35 V
—
—
0.3
2.0
μs
Turn-Off Delay4
tOFF
0.5 EIN to 0.5 EOUT, RL = 100Ω, VS = 35 V, See Note
—
—
2.0
10
μs
Output Leakage Current3
ICEX
Output Sustaining Voltage
VCE(SUS)
Collector-Emitter
Saturation Voltage
Input Current
Output Source Current
(Outputs Open)
1Negative
VCE(SAT)
IIN(ON)
Test Conditions
current is defined as coming out of (sourcing) the specified device terminal.
2All
unused inputs must be connected to ground. Pull-down resistors (approximately 10 kΩ) are recommended for inputs that are allowed to float while power is being applied to VS.
3All
inputs simultaneously.
4Turn-off
delay is influenced by load conditions. Systems applications well below the specified output loading may require timing considerations for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem pole configuration.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A2982
8-Channel Source Driver
TEST FIGURES
Figure 1
Figure 2
VS
VS
V
Figure 3
V
V CE
I IN
mA
V
mA
OPEN
I OUT
VIN
μA
IN
S
V
IN
I CEX
Dwg. No. A-11,083
Dwg. No. A-11,084
Figure 4
Dwg. No. A-11,085
Figure 5
VS
Figure 6
VS
I S mA
OPEN
μA
IR
OPEN
OPEN
VF
VIN
VIN
Dwg. No. A-11,086
Dwg. No. A-11,087
V
I
F
Dwg. No. A-11,088
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
A2982
8-Channel Source Driver
500
500
450
450
RECOMMENDED MAXIMUM OUTPUT CURRENT
350
3
300
4
5
250
200
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
8
7
6
150
100
400
ALLOWABLE PEAK COLLECTOR CURRENT IN mA AT 70°C
400
VS = 15 V
RECOMMENDED MAXIMUM OUTPUT CURRENT
350
300
3
4
250
5
200
8
7
6
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
150
100
VS = 15 V
50
0
50
0
10
20
30
50
60
40
PER CENT DUTY CYCLE
70
80
90
0
100
10
0
20
30
50
60
40
PER CENT DUTY CYCLE
Dwg. No. A-11,107B
70
80
90
100
Dwg. No. A-11,108B
Input current as a function
of input voltage
2.5
2.0
INPUT CURRENT, IIN (mA)
ALLOWABLE PEAK COLLECTOR CURRENT IN mA AT 50°C
Allowable peak collector current
as a function of duty cycle
1.5
UM
IM
X
MA
1.0
AL
PIC
TY
0.5
2
4
6
8
10
12
INPUT VOLTAGE (VOLTS)
Dwg. No. A-11,115B
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
A2982
8-Channel Source Driver
LW Package, 20-Pin SOICW
12.80±0.20
4° ±4
20
20
+0.07
0.27 –0.06
7.50±0.10
10.30±0.33
A
1
2.25
9.50
+0.44
0.84 –0.43
2
1
2
0.65
0.25
20X
SEATING
PLANE
0.10 C
0.41 ±0.10
1.27
C
SEATING PLANE
GAUGE PLANE
1.27
B PCB Layout Reference View
2.65 MAX
0.20 ±0.10
For Reference Only
Dimensions in millimeters
(Reference JEDEC MS-013 AC)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Reference pad layout (reference IPC SOIC127P1030X265-20M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
A2982
8-Channel Source Driver
Revision History
Revision
Revision Date
Rev. U
April 30, 2012
Description of Revision
Update product availability
Copyright ©1977-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
Similar pages