ALSC ASM3X2105AFS Low frequency emi reduction Datasheet

ASM3X2105A
October 2003
rev 1.0
Features
signals. The ASM3X2105A allows significant system cost
FCC approved method of EMI attenuation.
savings by reducing the number of circuit board layers
Generates a 1X or ½ X low EMI spread spectrum
ferrite beads, shielding and other passive components
clock of the input frequency.
that are traditionally required to pass EMI regulations.
Input frequency range: 6MHz to 10 MHz.
Internal loop filter minimizes external components
The ASM3X2105A uses the most efficient and optimized
and board space.
modulation profile approved by the FCC and is
Frequency deviation: Maximum ± 1%.
implemented in a proprietary all digital method.
SSON# control pin for spread spectrum enable
and disable options.
The ASM3X2105A modulates the output of a single PLL
Low cycle-to-cycle jitter.
in order to “spread” the bandwidth of a synthesized clock,
5.0V ± 5% operating voltage range.
and more importantly, decreases the peak amplitudes of
TTL or CMOS compatible outputs.
its harmonics. This results in significantly lower system
Ultra-low power CMOS design.
EMI compared to the typical narrow band signal produced
Available in 8-pin SOIC and TSSOP.
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
Product Description
The ASM3X2105A is a versatile spread spectrum
frequency modulator designed specifically for input clock
frequencies from 6MHz to 12MHz. The ASM3X2105A
can generate an EMI reduced clock from crystal, ceramic
resonator, or system clock. The ASM3X2105A offers
frequency deviation of ± 1%.
spectrum clock generation’.
Applications
The ASM3X2105A is targeted towards EMI management
for high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
The ASM3X2105A reduces electromagnetic interference
systems.
(EMI) at the clock source, allowing system wide reduction
of EMI of
down stream clock and data dependent
Block Diagram
SR0
SSON#
VDD
DIV2
PLL
Modulation
XIN
Crystal
Oscillator
Frequency
Divider
XOUT
Feedback
Divider
Phase
Detector
Loop
Filter
VCO
Output
Divider
MODOUT
VSS
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
ASM3X2105A
October 2003
rev 1.0
Pin Configuration
XIN /CLK
1
XOUT
2
8
VDD
7
MODOUT
ASM3X2105A
DIV2
3
6
SSON#
VSS
4
5
SR0
Pin Description
Pin#
Pin Name
Type
1
XIN/CLK
I
2
XOUT
O
3
DIV2
I
4
VSS
P
5
SR0
I
6
SSON#
I
7
8
MODOUT
VDD
O
P
Description
Crystal connection or external reference frequency input. This pin has dual
functions. It can be connected to either an external crystal or an external
reference clock.
Crystal connection. If using an external reference, this pin must be left
unconnected.
Digital logic input used to select normal output mode or divide-by-2 output
mode. When this pin is HIGH, the frequency of the output clock is the same
as the input clock frequency. When it is tied LOW, the output frequency is
half the input clock frequency. This pin has an internal pull-up resistor.
Ground to entire chip.
Digital logic input used to select Spreading Range (Refer Spread Deviation
Table). This pin has an internal pull-up resistor.
Digital logic input used to enable Spread Spectrum function (Active LOW).
Spread Spectrum function enabled when LOW, disabled when HIGH. This
pin has an internal pull-low resistor.
Spread spectrum low EMI output.
Power supply for the entire chip (5V).
Spread Deviation Table
SR0
1
0
Spread Deviation (%)
±1
Reserved
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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ASM3X2105A
October 2003
rev 1.0
Spread Spectrum
Spreading the spectrum of the signal reduces the system EMI. The optimal setting should minimize system EMI
to the fullest without affecting system performance. The spreading is described as a percentage deviation of the
center frequency (Note: The center frequency is the frequency of the external reference input on CLKIN, Pin1).
Example:
The ASM3X2105A is designed for communications, digital video and imaging applications. It is not only
optimized for operation in the 6MHz – 12MHz range, but its output frequency can be extended down to one half
of the input clock frequency using the divide-by-two feature. This feature extends low frequency operation to as
low as 3MHz. Setting pin 3 low (DIV2=0; divide-by-two mode) sets the output frequency (MODOUT) to half the
frequency of the input clock (CLKIN). This is a simple way to generate a spread spectrum modulated low
frequency clock when only a higher frequency signal is available. If you want the output frequency to be the
same as the input, you can either set DIV2=1 or leave it unconnected.
+5V
8.832MHz Crystal
1
CLKIN
VDD
8
2
XOUT
MODOUT
7
3
DIV2
SSON#
6
4
VSS
SR0
5
0.1µF
Modulated 4.416MHz
is connected to CLK
input pin of the system
ASM3X2105A
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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ASM3X2105A
October 2003
rev 1.0
EMC Software Simulation
By using Alliance’s proprietary EMC simulation software – EMI-Lator®, radiated system level EMI analysis can
be made easier, allowing quantitative measure on the benefits of Alliance’s EMI reduction products. The
simulation engine of this EMC software has already been characterized to correlate with the electrical
characteristics of Alliance EMI reduction ICs. The figure below is an illustration of this simulation result.
Please visit our website at www.alsc.com for information on how to obtain a free copy and demonstration of
EMI-Lator ®.
Simulation results From EMI-Lator®
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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ASM3X2105A
October 2003
rev 1.0
Absolute Maximum Ratings
Symbol
VDD, VIN
Parameter
Voltage on any pin with respect to GND
Rating
Unit
-0.5 to + 7.0
V
TSTG
Storage temperature
-65 to +125
°C
TA
Operating temperature
0 to 70
°C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol
Parameter
VIL
Input low voltage
VIH
IIH
Input high voltage
Input low current (pull-up resistors on inputs SR0 and
DIV2)
Input high current (pull-down resistor on input SSON#)
IXOL
IIL
Min
Typ
Max
Unit
GND – 0.3
-
0.8
V
2.0
-
VDD + 0.3
V
44
µA
66
µA
XOUT output low current (@ 4.0V, VDD = 5V)
3
mA
IXOH
XOUT output high current (@2.5V, VDD = 5V)
3
VOL
Output low voltage (VDD = 5V, IOL = 20mA)
VOH
2.5
IDD
Output high voltage (VDD = 5V, IOH = 20mA)
Dynamic supply current normal mode (5V, 8MHz and
15pF loading)
Static supply current standby mode
VDD
Operating voltage
4.75
5.0
5.25
V
tON
Power up time (first locked clock cycle after power up)
-
0.18
-
mS
ZOUT
Clock out impedance
-
50
-
Ω
ICC
mA
0.4
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
V
V
40
mA
40
µA
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ASM3X2105A
October 2003
rev 1.0
AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
fIN
Input frequency
6
-
10
MHz
MODOUT
Output frequency
6
-
10
MHz
tLH*
Output rise time (measured at 0.8V to 2.0V)
-
440
-
ps
tHL*
Output fall time (measured at 2.0V to 0.8V)
-
300
-
ps
tJC
Jitter (cycle to cycle)
-
-
360
ps
50
55
%
tD
Output duty cycle
45
* VDD = +5V, Input Frequency = 8MHz, tLH and tHL are measured into a capacitive load of 15pF
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
6 of 10
ASM3X2105A
October 2003
rev 1.0
Package Information
8-Pin SOIC (Pb Free Parts)
H
E
D
A2
A
C
θ
e
A1
B
Symbol
Dimensions in inches
D
L
Dimensions in millimeters
Min
Max
Min
Max
A
0.057
0.071
1.45
1.80
A1
0.004
0.010
0.10
0.25
A2
0.053
0.069
1.35
1.75
B
0.012
0.020
0.31
0.51
C
0.004
0.01
0.10
0.25
D
0.186
0.202
4.72
5.12
E
0.148
0.164
3.75
4.15
e
0.050 BSC
1.27 BSC
H
0.224
0.248
5.70
6.30
L
0.012
0.028
0.30
0.70
θ
0°
8°
0°
8°
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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ASM3X2105A
October 2003
rev 1.0
8-Pin TSSOP
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions in inches
Symbol
Min
A
0.047
A1
0.002
0.006
0.05
0.15
A2
0.031
0.041
0.80
1.05
B
0.007
0.012
0.19
0.30
C
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
Max
Dimensions in millimeters
Min
Max
1.10
0.026 BSC
0.65 BSC
H
0.244
0.260
6.20
6.60
L
0.018
0.030
0.45
0.75
θ
0°
8°
0°
8°
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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ASM3X2105A
October 2003
rev 1.0
Ordering Codes
Part Number
ASM3X2105AFTR
ASM3X2105AFT
ASM3X2105AFSR
ASM3X2105AFS
Package
8-PIN TSSOP
8-PIN TSSOP
8-PIN SOIC
8-PIN SOIC
TAPE AND REEL
TUBE
TAPE AND REEL
TUBE
Device Ordering Information
A S M 3 X 2 1 0 5 A F T R
OR - SOT23/T/R
TT – TSSOP, TUBE
TR - TSSOP, T/R
VT – TVSOP, TUBE
VR – TVSOP, T/R
ST – SOIC, TUBE
SR - SOIC, T/R
QR – QFN, T/R
QT - QFN, TUBE
BT - BGA, TUBE
BR – BGA, T/R
F = Pb FREE
PART NUMBER
X = Automotive
I = Industrial
1 – reserved
2 - Non PLL based
3 – EMI Reduction
4 – DDR support products
5 – STD Zero Delay Buffer
P or n/c = Commercial
6 – power management
7 – power management
8 – power management
9 – Hi performance
0 - reserved
Alliance Semiconductor Mixed Signal Product
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
9 of 10
ASM3X2105A
October 2003
rev 1.0
Alliance Semiconductor Corporation
2595, Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Fax: 408-855-4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: ASM3X2105A
Document Version: v1.0
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their
respective companies. Alliance reserves the right to make changes to this document and its products at any time without
notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein
represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this
data at any time, without notice. If the product described herein is under development, significant changes to these
specifications are possible. The information in this product data sheet is intended to be general descriptive information for
potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or
customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product
described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products
including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual
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other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical
components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant
injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer
assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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