APL5316 Low Dropout 300mA Linear Regulator With Power-Ok Indicator Features General Description • Wide Operating Voltage: 2.8~6V The APL5316 is a low dropout linear regulator which • Fixed Output Voltage in the range of 0.8V~5.5V • Low Dropout Voltage: needs only a single input voltage supply from 2.8 to 6V, and it can deliver output current up to 300mA. It can work with low ESR ceramic capacitors and ideally use in the battery-powered applications, such as notebook 170mV(typical) @ 300mA • Guaranteed 300mA Output Current • Power-Ok Indicator • Current Limit Protection with Foldback Current • Internal Soft-Start • Over Temperature Protection • down functions protect the device against current overloads and over temperature. The APL5316 is available in Stable with Low ESR Ceriamic Capacitors a SOT-23-5 package. • SOT-23-5 Package • Lead Free and Green Devices Available computers and cellular phones. Its typical dropout voltage is only 170mV at 300mA loading. A power-ok detection indicates the output status at POK pin. The current limit protection (with foldback current) and thermal shut- Applications (RoHS Compliant) Pin Configuration VIN 1 5 VOUT GND 2 SHDN 3 4 POK • Cellular Phones • Portable and Battery-powered Equipment • Notebook and Personal Computers APL5316 SOT-23-5 Ordering and Marking Information Package Code B : SOT-23-5 Operating Junction Temperature Range I : -40 to 85° C Handling Code TR : Tape & Reel Voltage Code 12 : 1.2V 33 : 3.3V Assembly Material L : Lead Free Device G: Halogen and Lead Free Device APL5316 Assembly Material Handling Code Temperature Range Package Code Voltage Code APL5316 -12 B: 365X APL5316 -33 B: 36RX X - Date code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.21- Aug, 2008 1 www.anpec.com.tw APL5316 Simplified Application Circuits APL5316 VIN 1 CIN VIN VOUT 3 SHDN VOUT 5 POK 4 POK 2 1 CIN COUT GND APL5316 VIN VIN VOUT VOUT 5 R1 3 SHDN POK 4 GND R1 COUT POK 2 VIN Absolute Maximum Ratings Symbol VIN VSHDN Parameter Rating Unit VIN Supply Voltage (VIN to GND) -0.3 ~ 6.5 V SHDN Input Voltage (SHDN to GND) -0.3 ~ 6.5 V Internally Limited W PD Power Dissipation TJ Junction Temperature -40 ~ 150 ° C TSTG Storage Temperature -65 ~ 150 ° C TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 ° C Thermal Characteristics Symbol θJA θJC Parameter Thermal Resistance-Junction to Ambient Typical Value (Note 1) Thermal Resistance- Junction to Case Unit 240 o 130 o C/W C/W Note 1 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions Symbol VIN Parameter VIN Supply Voltage VOUT Output Voltage IOUT VOUT Output Current COUT Output Capacitor TJ Range Junction Temperature Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 2.8 ~ 6 V Fixed Voltage V 0 ~ 300 mA 1.5 ~ 22 µF -40 ~ 125 2 Unit o C www.anpec.com.tw APL5316 Electrical Characteristics Unless otherwise specified, these specifications apply over VIN = VOUT+1V (min VIN=2.8V), IOUT=0~300mA, CIN = 1µF, COUT = 2.2µF, TA = -40 to 85oC. Typical values are at TA = 25oC. Symbol Parameter APL5316 Test Conditions Unit Min. Typ. Max. 2.8 - 6 V VIN Input Voltage IQ Quiescent Current IOUT =10mA ~300mA - 135 160 µA Output Voltage Accuracy IOUT=10mA -2 - +2 % REGLINE Line Regulation ΔVOUT%/ΔVIN, IOUT=10mA -0.06 - +0.06 %/V REGLOAD Load Regulation ΔVOUT%/ΔIOUT -0.2 - +0.2 %/A VOUT = 3.3V, IOUT = 300mA - 170 300 mV f = 10kHz, IOUT = 300mA - 45 - dB 450 600 - mA - 80 - mA SHDN Input Voltage High 1.6 - - SHDN Input Voltage Low - - 0.4 - 0.1 1 µA - 3 - MΩ - 60 - Ω Over Temperature Threshold - 160 - ° C Over Temperature Hysteresis - 40 - ° C Soft-Start Interval - 60 - µs VOUT Rising 89 92 95 %VOUT VOUT falling 78 81 84 %VOUT - 0.25 0.4 V VDROP PSRR Dropout Voltage Power Supply Ripple Rejection Ratio ILIMIT Current Limit ISHORT Foldback Current VOUT = 0V V Shutdown VIN Supply Current SHDN = Low, VIN = 6V SHDN Pull Low Resistance VOUT Discharge MOSFET SHDN = Low RDS(ON) TSS VPOK VPNOK POK threshold Voltage for Power Ok POK threshold Voltage for Power Not Ok POK Low Voltage POK sinks 5mA Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 3 www.anpec.com.tw APL5316 Typical Operating Characteristics Quiescent Current vs. Supply Voltage Quiescent Current vs. Junction Temperature 160 138 IOUT= 0mV 136 Quiescent Current, IQ (µA) Quiescent Current, IQ (µA) 140 120 100 80 60 40 134 132 130 128 20 126 0 0 1 2 3 4 5 6 7 -50 -25 Supply Voltage, VIN (V) Quiescent Current vs. Output Current 50 75 100 125 PSRR vs. Frequency 160 -10 140 -20 PSRR (dB) Quiescent Current, IQ (µA) 25 0 180 VIN=5.5V 120 100 VIN=3.3V, VOUT=1.2V CIN=1µF, COUT=2.2µF IOUT=300mA -30 -40 VIN=4.5V -50 80 -60 60 0 50 100 150 200 250 1000 300 10000 100000 1000000 Frequency (Hz) Output Current, I OUT (mA) Dropout Voltage vs. Output Current Current Limit vs. Junction Temperature 650 250 VIN=5V TJ=25° C VOUT=3.3V TJ=75° C 200 TJ=125° C Current Limit, ILIMIT (mA) Dropout Voltage, VDROP (mV) 0 Junction Temperature, T J (° C) 150 100 TJ=0° C 50 600 550 500 TJ=-50° C 450 0 0 100 200 Output Current, IOUT (mA) Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 -50 300 4 -25 0 25 50 75 Junction Temperature, T J (° C) 100 125 www.anpec.com.tw APL5316 Typical Operating Characteristics (Cont.) Loop Gain vs. Frequency Phase vs. Frequency 160 50 40 VIN=3.3V, VOUT=1.2V, CIN=1µF, COUT=2.2µF 30 140 IOUT=100mA IOUT=300mA Phase (degree) 120 20 Loop Gain (dB) VIN=3.3V, VOUT=1.2V, CIN=1µF, C OUT=2.2µF 10 0 100 80 60 -10 40 IOUT=300mA -20 IOUT=100mA 20 -30 0 -40 1000 10000 100000 1000 1000000 10000 Frequency (Hz) 100000 1000000 Frequency (Hz) Operating Waveforms Load Transient Line Transient VOUT=1.2V, CIN=1µF, COUT=2.2µF, TR=10µs, IOUT=10mA VIN=3.3V, VOUT=1.2V, CIN=1µF, COUT=2.2µF, TR=1µs V OUT V IN V OUT IOUT CH1 : VOUT, 50mV/div, AC CH2 : IOUT, 100mA/div, DC Time : 100µs/div Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 CH1 : VIN, 1V/div, DC CH2 : VOUT, 20mV/div, AC Time : 100µs/div 5 www.anpec.com.tw APL5316 Operating Waveforms (Cont.) Enable Shutdown VOUT=1.2V VOUT=1.2V V OUT V OUT V SHDN V SHDN I OUT I OUT CH1 : VOUT, 500mV/div CH2 : VSHDN, 5V/div CH3 : IOUT, 200mA/div Time : 50µs/div CH1 : VOUT, 500mV/div CH2 : V , 5V/div SHDN CH3 : IOUT, 200mA/div DC Time : 10µs/div Power on Power off V IN V IN V OUT V OUT I OUT I OUT CH1 : VIN, 2V/div CH2 : VOUT, 500mV/div, CH3 : IOUT, 100mA/div Time : 50ms/div CH1 : VIN, 2V/div CH2 : VOUT, 500mV/div CH3 : IOUT, 100mA/div Time : 200µs/div Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 6 www.anpec.com.tw APL5316 Operating Waveforms (Cont.) POK VIN 1 2 VOUT POK 3 IOUT 4 CH1 : VIN, 2V/div CH2 : VOUT, 1V/div, CH3 : POK, 2V/div CH4 : IOUT, 200mA/div Time : 1ms/div Pin Description PIN FUNCTION No NAME 1 VIN Voltage supply input pin 2 GND Ground pin 3 SHDN 4 POK 5 VOUT Shutdown control pin, logic high: enable; logic low: shutdown Power-ok signal output pin Regulator output pin Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 7 www.anpec.com.tw APL5316 Block Diagram SHDN VIN Shutdown Logic Thermal Shutdown Current Limit + VOUT POK X92% + 0.8V GND Typical Application Circuit 1 APL5316 VIN 1 CIN 1μF VIN VOUT 3 SHDN POK VOUT 5 4 POK COUT GND 2 R1 2.2μF 1KΩ VIN 2.2µF/GRM155R60J225M Murata Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 8 www.anpec.com.tw APL5316 Typical Application Circuit (Cont.) 2. APL5316 VIN 1 CIN 1μF 3 VIN VOUT SHDN GND POK VOUT 5 R1 4 1KΩ 2 POK COUT 2.2μF Function Description Internal Soft-Start For normal operation, the device power dissipation should An internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The be externally limited by the design to keep the junction temperature below 125οC. typical soft-start interval is about 60µs. Shutdown Control Power-ok (POK) The APL5316 indicates the status of the output voltage. As the VOUT rises and reaches the Power-ok threshold The APL5316 has an active-low shutdown function. Forcing SHDN high (>1.6V) enables the VOUT; forcing SHDN low (<0.4V) disables the VOUT. SHDN is internally pulled (VPOK), the IC turns off the internal NMOS of the POK to indicate the output is ok. As the VOUT falls and reaches the low by a resistor (3MΩ typical). If shutdown control is not necessary, please connect SHDN pin to VIN for normal falling Power-ok threshold (VPNOK), the IC immediately turns on the NMOS of the POK to indicate the output is not operation. ok. The resistance of the resistor R1 connected from VOUT to POK or VIN to POK should be in the range from 1K to 50K. Thermal Shutdown A thermal shutdown circuit limits the junction temperature of the APL5316. When the junction temperature exceeds +160 οC, a thermal sensor turns off the output PMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new softstart cycle after the junction temperature cools by 40οC. The thermal shutdown is designed with a 40οC hysteresis to lower the average junction temperature during continuous thermal overload conditions, extending life time of the device. Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 9 www.anpec.com.tw APL5316 Application Information Input Capacitor Operation Region and Power dissipation The APL5316 requires proper input capacitors to supply surge current during stepping load transients to prevent The APL5316 maximum power dissipation depends on the thermal resistance and temperature difference the input rail from dropping. Because the parasitic inductor from the voltage sources or other bulk capacitors to between the die junction and ambient air. The power dissipation PD across the device is: the VIN limits the slew rate of the surge current, it is recommeded to place the Input capacitors near VIN as PD = (TJ - TA) / θJA close as possible. Input capacitors should be larger than 1µF and a minimum ceramic capacitor of 1µF is where (TJ-TA) is the temperature difference between the junction and ambient air. θJA is the thermal resistance necessary. between Junction and ambient air. Assuming the TA=25 oC and maximum TJ=160 oC (typical thermal limit Output Capacitor threshold), the maximum power dissipation is calculated as: PD(max)=(160-25)/240 The APL5316 needs a proper output capacitor to maintain circuit stability and improve transient response over temperature and current. In order to insure the circuit = 0.56(W) stability, the proper output capacitor value should be larger than 2.2µF. With X5R and X7R dielectrics, 2.2µF is suffi- For normal operation, do not exceed the maximum junction temperature rating of TJ = 125 oC. The calculated power dissipation should be less than: cient at all operating temperatures. Large output capacitor value can reduce noise and improve load-transient PD =(125-25)/240 response and PSRR, however, it also affects power on issue. Equation (1) shows the relationship between the = 0.41(W) The GND provides an electrical connection to ground and maximum COUT value and VOUT. COUT(max) = 31 - 6 VOUT channels heat away. Connect the GND to ground by using a large pad or ground plane. ...............................(1) Layout Consideration Where the unit of COUT is µF and VOUT is V. Figure 1 shows Figure 2 illustrates the layout. Below is a checklist for your layout: the curve of maximum output capacitor over the output voltage. The output voltage range is from 0.8 to 5.5V and 1. Please place the input capacitors close to the VIN. 2. Ceramic capacitors for load must be placed near the output capacitor value should be under the line. Output capacitors must be placed at the load and ground pin the load as close as possible. 3. To place APL5316 and output capacitors near the as close as possible and the impedance of the layout must be minimized. load is good for performance. 4. Large current paths, the bold lines in figure 2, Output Capacitor (µF) 31 must have wide tracks. 28 25 22 0 1 2 3 4 5 6 Output voltage (V) Figure 1 Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 10 www.anpec.com.tw APL5316 Application Information (Cont.) PCB Layout Consideration ( Cont.) CIN APL5316 VIN VIN 1 VOUT VOUT GND 2 5 R1 COUT LOAD Figure 2 Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 11 www.anpec.com.tw APL5316 Package Information SOT-23-5 D e E E1 SEE VIEW A b c 0.25 A L 0 GAUGE PLANE SEATING PLANE A1 A2 e1 VIEW A S Y M B O L SOT-23-5 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 0.057 1.45 A1 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 0.071 e 0.95 BSC e1 1.90 BSC 0.037 BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.024 8° Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 12 www.anpec.com.tw APL5316 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H 178.0±2.00 50 MIN. SOT-23-5 T1 C d 8.4+2.00 13.0+0.50 1.5 MIN. -0.00 -0.20 P0 P1 P2 D0 D1 4.0±0.10 4.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. D 20.2 MIN. T W E1 8.0±0.30 1.75±0.10 A0 B0 F 3.5±0.05 K0 0.6+0.00 -0.40 3.20±0.20 3.10±0.20 1.50±0.20 (mm) Devices Per Reel Package Type Unit Quantity SOT-23-5 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 13 www.anpec.com.tw APL5316 Taping Direction Information SOT-23-5 USER DIRECTION OF FEED Reflow Condition (IR/Convection or VPR Reflow) tp TP Critical Zone TL to TP Ramp-up Temperature TL tL Tsmax Tsmin Ramp-down ts Preheat 25 t 25°C to Peak Time Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 14 Description 245°C, 5 sec 1000 Hrs Bias @125°C 168 Hrs, 100%RH, 121°C -65°C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA www.anpec.com.tw APL5316 Classification Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly Pb-Free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 217°C 60-150 seconds See table 1 See table 2 10-30 seconds 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Time 25°C to Peak Temperature Note: All temperatures refer to topside of the package. Measured on the body surface. Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures 3 Package Thickness Volume mm <350 <2.5 mm ≥2.5 mm 240 +0/-5°C 225 +0/-5°C Volume mm ≥350 3 225 +0/-5°C 225 +0/-5°C Table 2. Pb-free Process – Package Classification Reflow Temperatures 3 Package Thickness 3 Volume mm <350 Volume mm 350-2000 3 Volume mm >2000 <1.6 mm 260 +0°C* 260 +0°C* 260 +0°C* 1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C* ≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C* * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL level. Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.2 - Aug, 2008 15 www.anpec.com.tw