LTC3622/ LTC3622-2/LTC3622-23/5 17V, Dual 1A Synchronous Step-Down Regulator with Ultralow Quiescent Current DESCRIPTION FEATURES Dual Step-Down Outputs: 1A Per Channel nn Wide V Range: 2.7V to 17V IN nn Wide V OUT Range: 0.6V to VIN nn Up to 95% Efficiency nn No-Load I = 5µA with Both Channels Enabled; Q IQ < 4µA with Only One Channel Enabled nn High Efficiency, Low Dropout Operation (100% Duty Cycle) nn Constant Frequency (1MHz/2.25MHz) with External Frequency Synchronization nn ±1% Output Voltage Accuracy nn Current Mode Operation for Excellent Line and Load Transient Response nn Phase Shift Programmable with External Clock nn Selectable Current Limit nn Internal Compensation and Soft-Start nn Compact 14-Pin DFN (3mm × 4mm) and 16-Lead MSOP Packages The LTC®3622 is a dual 1A output, high efficiency synchronous monolithic step-down regulator capable of operating from input supplies up to 17V. The switching frequency is fixed to 1MHz or 2.25MHz with a ±50% synchronization range to an external clock. The regulator features ultralow quiescent current and high efficiency over a wide output voltage range. APPLICATIONS PART NAME FREQUENCY VOUT Battery Powered Systems nn Point-of-Load Supplies nn Portable – Handheld Scanners LTC3622 1.00MHz Adjustable LTC3622-2 2.25MHz Adjustable LTC3622-23/5 2.25MHZ 5V/3.3V nn nn The step-down regulators operate from an input voltage range of 2.7V to 17V and provide an adjustable output from 0.6V to VIN while delivering up to 1A of output current. A user-selectable mode input is provided to allow the user to trade off ripple noise for light load efficiency. Burst Mode® operation provides the highest efficiency at light loads, while pulse-skipping mode provides the lowest ripple noise. The switching regulators can be synchronized to an external clock. Furthermore, fixed VOUT options are available to eliminate the external feedback resistors. List of LTC3622 Options L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6498466, 6611131, 5705919. TYPICAL APPLICATION Efficiency vs Load Current 2.5V/5V VOUT Application, fSW = 1MHz VIN1 INTVCC VIN2 C1 1µF RUN1 RUN2 PHASE ILIM LTC3622 VOUT1 2.5V 1A 4.7µH 6.8µH SW1 COUT1 22µF 22pF SW2 619k 619k FB2 FB1 196k GND 0.5 80 MODE/SYNC 84.5k 22pF VOUT2 5V 1A COUT2 22µF 3622 TA01 For more information www.linear.com/LTC3622 70 0.4 60 50 0.3 40 20 10 0.2 VOUT1 = 2.5V VOUT2 = 5V 30 VIN = 12V fSW = 1MHz Burst Mode OPERATION 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) POWER LOSS (W) CIN 10µF 0.6 90 EFFICIENCY (%) VIN 5.5V TO 17V 100 0.1 1 3622 TA01b 0 3622fc 1 LTC3622/ LTC3622-2/LTC3622-23/5 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN1, VIN2, SVIN (MSOP Only) (Note 2)........ –0.3V to 17V RUN1, RUN2...............................................–0.3V to VIN1 MODE/SYNC, FB1, FB2................................. –0.3V to 6V PGOOD1, PGOOD2, ILIM, PHASE................... –0.3V to 6V Operating Junction Temperature Range (Note 3) LTC3622E........................................... –40°C to 125°C LTC3622I............................................ –40°C to 125°C LTC3622H........................................... –40°C to 150°C Storage Temperature Range................... –65°C to 150°C PIN CONFIGURATION TOP VIEW VIN1 1 14 SW1 TOP VIEW PGOOD1 2 13 RUN1 MODE/SYNC 3 12 FB1 PHASE 4 PGOOD2 5 10 FB2 ILIM 6 9 RUN2 VIN2 7 8 SW2 15 GND VIN1 SVIN PGOOD1 MODE/SYNC PHASE PGOOD2 ILIM VIN2 11 INTVCC 17 GND 16 15 14 13 12 11 10 9 SW1 NC RUN1 FB1 INTVCC FB2 RUN2 SW2 MSE PACKAGE 16-LEAD PLASTIC MSE DE PACKAGE 14-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 40°C/W, θJC = 4.4°C/W EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION 1 2 3 4 5 6 7 8 TJMAX = 150°C, θJA = 40°C/W, θJC = 10°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB http://www.linear.com/product/LTC3622#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3622EDE#PBF LTC3622EDE#TRPBF 3622 14-Lead (3mm x 4mm) Plastic DFN –40°C to 125°C LTC3622IDE#PBF LTC3622IDE#TRPBF 3622 14-Lead (3mm x 4mm) Plastic DFN –40°C to 125°C LTC3622HDE#PBF LTC3622HDE#TRPBF 3622 14-Lead (3mm x 4mm) Plastic DFN –40°C to 150°C LTC3622EMSE#PBF LTC3622EMSE#TRPBF 3622 16-Lead Plastic MSOP –40°C to 125°C LTC3622IMSE#PBF LTC3622IMSE#TRPBF 3622 16-Lead Plastic MSOP –40°C to 125°C LTC3622HMSE#PBF LTC3622HMSE#TRPBF 3622 16-Lead Plastic MSOP –40°C to 150°C LTC3622EDE-2#PBF LTC3622EDE-2#TRPBF 36222 14-Lead (3mm x 4mm) Plastic DFN –40°C to 125°C LTC3622IDE-2#PBF LTC3622IDE-2#TRPBF 36222 14-Lead (3mm x 4mm) Plastic DFN –40°C to 125°C LTC3622HDE-2#PBF LTC3622HDE-2#TRPBF 36222 14-Lead (3mm x 4mm) Plastic DFN –40°C to 150°C LTC3622EMSE-2#PBF LTC3622EMSE-2#TRPBF 36222 16-Lead Plastic MSOP –40°C to 125°C LTC3622IMSE-2#PBF LTC3622IMSE-2#TRPBF 36222 16-Lead Plastic MSOP –40°C to 125°C LTC3622HMSE-2#PBF LTC3622HMSE-2#TRPBF 36222 16-Lead Plastic MSOP –40°C to 150°C LTC3622EDE-23/5#PBF LTC3622EDE-23/5#TRPBF 223/5 14-Lead (3mm x 4mm) Plastic DFN –40°C to 125°C LTC3622IDE-23/5#PBF LTC3622IDE-23/5#TRPBF 223/5 14-Lead (3mm x 4mm) Plastic DFN –40°C to 125°C LTC3622HDE-23/5#PBF LTC3622HDE-23/5#TRPBF 223/5 14-Lead (3mm x 4mm) Plastic DFN –40°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 2 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN1 = VIN2 = 12V, unless otherwise noted. (Notes 3, 6) SYMBOL PARAMETER CONDITIONS MIN VIN1, VIN2 Operating Voltage SVIN Operating Voltage MSOP Package VOUT Operating Voltage IQ VFB Input Quiescent Current Regulated Feedback Voltage TYP UNITS 2.7 17 V 2.7 17 V 0.6 Active Mode, VRUN1 = VRUN2 = 2V (Note 4) Burst Mode Operation, VRUN1 = VRUN2 = 2V, MODE/SYNC = 3V, No Load Shutdown Mode; VRUN1 = VRUN2 = 0V LTC3622/LTC3622-2 MAX VIN V 3 5 10 mA µA 0.1 ±1 µA 0.594 0.591 0.6 0.6 0.606 0.609 V l 10 nA l 4.950 4.925 5.0 5.0 5.050 5.075 V V l 3.267 3.250 3.3 3.3 3.333 3.350 V V IFB FB Input Current LTC3622/LTC3622-2 VOUT1 Regulated Fixed Output Voltage (Channel 1) LTC3622-23/5 Regulated Fixed Output Voltage (Channel 2) LTC3622-23/5 Feedback Input Leakage Current LTC3622-23/5 1 5 µA Reference Voltage Line Regulation VIN = 2.7V to 17V (Note 5) 0.01 0.015 %/V Output Voltage Load Regulation (Note 5) 0.1 1 1 µA µA VOUT2 IFB(VOUT) NMOS Switch Leakage PMOS Switch Leakage RDS(ON) 0.1 0.1 NMOS On-Resistance PMOS On-Resistance VIN = 5V Maximum Duty Cycle VFB = 0V tON(MIN) Minimum On-Time VFB = 0.7V, VIN1 = VIN2 = 5 VRUN RUN Input High RUN Input Low RUN Input Current VMODE % 0.15 0.37 l 100 % 75 ns 0.35 VRUN = 12V 0.1 Pulse-Skipping Mode Burst Mode Operation VINTVCC–0.4 PHASE Input Threshold Input Low Input High 2.0 ILIM Input Threshold Input Low Input High VINTVCC–0.1 Ω Ω 1.0 V V ±20 nA 0.15 V V 0.4 V V 0.1 INTVCC V V tSS Soft Start Time 0.5 ILIM Peak Current Limit VIN > 5V VILIM = 0.1V (Both Channels) VILIM = INTVCC – 0.1V (Both Channels) VILIM = Floating, Channel 1 VILIM = Floating, Channel 2 1.6 0.8 1.6 0.8 1.8 1.0 1.8 1.0 2.0 1.2 2.0 1.2 VINTVCC Undervoltage Lockout VIN Ramping Up 2.3 2.5 2.65 VINTVCC Undervoltage Lockout Hysteresis ms 160 VIN Overvoltage Lockout Rising l VIN Overvoltage Lockout Hysteresis 18 19 300 A A A A V mV 20 V mV 3622fc For more information www.linear.com/LTC3622 3 LTC3622/ LTC3622-2/LTC3622-23/5 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN1 = VIN2 = 12V, unless otherwise noted. (Notes 3, 6) SYMBOL PARAMETER CONDITIONS fOSC LTC3622-2/LTC3622-23/5 LTC3622 LTC3622 Oscillator Frequency –40°C ≤ TA ≤ 150°C –40°C ≤ TA ≤ 125°C –40°C ≤ TA ≤ 150°C External CLK Amplitude SYNC Capture Range VINTVCC l l l MIN TYP MAX UNITS 1.8 0.82 0.75 2.25 1.00 1.00 2.6 1.16 1.16 MHz MHz MHz 0.4 % of Programmed Frequency INTVCC Voltage 50 3.3 VINTVCC–0.3 V 150 % 3.6 3.9 V % Power Good Range VIN > 4V –7.5 –11 RPGOOD Power Good Resistance PGOOD RDS(ON) at 2mA 275 350 tPGOOD PGOOD Delay PGOOD Low to High PGOOD High to Low 0 32 Cycles Cycles 0 180 Deg Deg Phase Shift Between Channel 1 and Channel VPHASE = 0V 2 VPHASE = INTVCC, VMODE/SYNC = 0V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. Transient Absolute Maximum Voltages should not be applied for more than 4% of the switching duty cycle. Note 3. The LTC3622 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3622E is guaranteed to meet specified performance from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3622I is guaranteed over the –40°C to 125°C operating junction temperature range and the LTC3622H is guaranteed over the -40°C to 150°C operating junction temperature 4 Ω range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environment factors. Note 4. The quiescent current in active mode does not include switching loss of the power FETs. Note 5. The LTC3622 is tested in a proprietary test mode that connects VFB to the output of error amplifier. Note 6. TJ is calculated from the ambient TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA) 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 TYPICAL PERFORMANCE CHARACTERISTICS 90 90 90 80 80 80 70 70 70 50 40 30 60 50 40 20 VIN = 5V 10 100% Duty Cycle fSW = 2.25MHz 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 1 3622 G01 72 ILOAD = 1mA 36 24 6.5 8.5 10.5 12.5 14.5 16.5 18.5 INPUT VOLTAGE (V) VIN = 12V VOUT = 1.8V fSW = 1MHz Burst Mode OPERATION 0 0.001 0.01 0.1 LOAD CURRENT (A) IQ Burst Mode OPERATION IQ SHUT DOWN 2 1 1 4 70 3622 G05 6 8 10 12 14 INPUT VOLTAGE (V) 16 18 3622 G07 VOUT = 2.5V fSW = 1MHz Burst Mode OPERATION 0 2 4 6 8 10 12 14 INPUT VOLTAGE (V) 16 18 3622 G06 Pulse-Skipping Mode Operation SW 10V/DIV SW 10V/DIV VOUT AC-COUPLED 50mV/DIV VOUT AC-COUPLED 20mV/DIV IL 100mA/DIV 4µs/DIV 2 80 75 IL 200mA/DIV 0 85 Burst Mode Operation 5 0 10mA LOAD 1A LOAD 90 30 10 1 3622 G03 Efficiency vs Input Voltage 95 40 IQ vs VIN 3 0.001 0.01 0.1 LOAD CURRENT (A) 3622 G02 50 3622 G04 4 0 0.0001 1 60 20 VOUT = 4.25V fSW = 1MHz Burst Mode OPERATION 4.5 VOUT = 2.5V VOUT = 3.3V VIN = 12V fSW = 2.25MHz Burst Mode OPERATION 30 10 70 48 0 2.5 40 80 60 12 50 Efficiency vs Load Current EFFICIENCY (%) ILOAD = 100µA 60 20 90 ILOAD = 10mA 84 Burst Mode OPERATION PULSE SKIP 30 EFFICIENCY (%) 96 100 EFFICIENCY (%) 60 VOUT Efficiency vs Input Voltage Above and Below Dropout EFFICIENCY (%) Efficiency vs Load Current 100 VOUT = 2.5V VOUT = 5V 20 VIN = 12V 10 fSW = 1MHz Burst Mode OPERATION 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) IQ (µA) Efficiency vs Load Current at Dropout Operation 100 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Load Current VIN1 = VIN2 = 12V, TA = 25°C, unless otherwise noted. 3622 G08 VIN = 12V VOUT = 2.5V Burst Mode OPERATION IOUT = 75mA 4µs/DIV 3622 G09 VIN = 12V VOUT = 2.5V PULSE-SKIPPING MODE IOUT = 10mA 3622fc For more information www.linear.com/LTC3622 5 LTC3622/ LTC3622-2/LTC3622-23/5 TYPICAL PERFORMANCE CHARACTERISTICS Load Step VIN1 = VIN2 = 12V, TA = 25°C, unless otherwise noted. Start-Up Operation 1500 RUN 5V/DIV 1400 IL 200mA/DIV VOUT 1V/DIV IL 500mA/DIV PGOOD 2V/DIV 40µs/DIV 3622 G10 3622 G11 50µs/DIV OSCILLATOR FREQUENCY (kHz) VOUT AC-COUPLED 200mV/DIV 600.5 2.35 2.30 2.25 2.20 2.15 2.10 598.5 16 18 3622 G13 PMOS CHANNEL 1 PMOS CHANNEL 2 NMOS CHANNEL 1 NMOS CHANNEL 2 4 300 200 0 25 50 75 100 125 150 INPUT VOLTAGE (V) 3622 G16 6 200 3622 G12 PMOS CH1 RDS(ON) PMOS CH2 RDS(ON) NMOS CH1 RDS(ON) NMOS CH2 RDS(ON) 400 300 100 Load Regulation 5 400 150 RDS(ON) vs Input Voltage 0 2 4 3622 G14 RDS(ON) vs Temperature –50 –25 700 200 597.0 –50 –30 –10 10 30 50 70 90 110 130 150 TEMPERATURE (°C) 500 100 800 598.0 ∆VOUT (%) RDS(ON) (mΩ) 600 599.0 0.5 PULSE SKIP Burst Mode OPERATION 3 0.3 2 0.2 1 0.1 0 –1 –0.2 –0.3 Line Regulation VOUT = 2.5V ILOAD = 500mA fSW = 1MHz PULSE-SKIPPING OPERATION –0.4 3622 G17 18 3622 G15 0 V = 12V –3 VIN = 3.3V OUT –4 PULSE SKIPPING OPERATION fSW = 1MHz –5 0 0.2 0.4 0.6 0.8 LOAD CURRENT (A) 1.2 16 –0.1 –2 1.0 6 8 10 12 14 INPUT VOLTAGE (V) 0.4 ∆VOUT (%) 700 6 8 10 12 14 INPUT VOLTAGE (V) 900 500 597.5 2.05 4 1000 599.5 RDS(ON) (mΩ) 2.40 2 1100 600 600.0 REFERENCE VOLTAGE (mV) OSCILLATOR FREQUENCY (MHz) 2.45 0 1200 Reference Voltage vs Temperature 2.50 2.00 1300 600 VIN = 12V fSW = 1MHz 500 –100 –50 0 50 100 TEMPERATURE (°C) VIN = 12V VOUT = 3.3V Burst Mode OPERATION LOAD STEP FROM 100mA TO 1A Oscillator Frequency vs Supply Voltage Oscillator Frequency vs Temperature –0.5 0 3 6 9 12 INPUT VOLTAGE (V) 15 18 3622 G18 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 TYPICAL PERFORMANCE CHARACTERISTICS IQ vs Temperature SLEEP SHUTDOWN NMOS1 NMOS2 PMOS1 PMOS2 45000 40000 12 35000 SW LEAKAGE (nA) QUIESCENT CURRENT (µA) 14 VOUT vs Load Current Switch Leakage vs Temperature 50000 10 8 6 4 5 4 30000 VOUT (V) 16 VIN1 = VIN2 = 12V, TA = 25°C, unless otherwise noted. 25000 20000 2 15000 10000 1 5000 2 3 ILIM = GND ILIM = INTVCC 0 0 –100 –50 0 50 100 TEMPERATURE (°C) 150 200 –5000 –50 –25 3622 G19 0 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 0.5 3622 G20 Sync Mode Out-Of-Phase Operation Out-Of-Phase Operation 1 1.5 LOAD CURRENT (A) 2 3622 G21 ILIM vs Input Voltage 2.0 EXTERNAL CLOCK 2V/DIV SW1 10V/DIV 1.8 1.6 1.4 SW2 10V/DIV ILIM (A) SW1 10V/DIV SW2 10V/DIV 1.2 1.0 0.8 0.6 200ns/DIV VIN = 12V VOUT = 2.5V, VOUT = 3.3V L1 = 4.7µH, L2 = 3.3µH OUT-OF-PHASE OPERATION 3622 G22 200ns/DIV SYNC MODE OPERATION EXTERNAL CLOCK PULSE WIDTH CONTROLS PHASE SHIFT 3622 G23 0.4 TA = 150°C TA = 25°C TA = –45°C 0.2 0 0 3 6 9 12 INPUT VOLTAGE (V) 15 18 3622 G24 3622fc For more information www.linear.com/LTC3622 7 LTC3622/ LTC3622-2/LTC3622-23/5 PIN FUNCTIONS (DFN/MSOP) VIN1 (Pin 1/Pin 1): Input Voltage of Channel 1 Step-Down Regulator. This input also powers the INTVCC LDO. PGOOD1 (Pin 2/Pin 3): Open Drain Power Good Indicator for Channel 1. MODE/SYNC (Pin 3/Pin 4): Burst Mode Select and External Clock Synchronization of the Step-Down Regulator. Tie MODE/SYNC to INTVCC for Burst Mode operation with a 400mA peak current clamp. Tie MODE/SYNC to GND for pulse-skipping operation. Furthermore, connecting this pin to an external clock will synchronize the switch clock to the external clock and put the part in pulse-skipping mode. PHASE (Pin 4/Pin 5): Phase Select Pin. Tie this pin to ground to run the regulators in phase (0° phase shift) between SW rising edge of channel 1 and channel 2. Tie this pin to INTVCC to set 180° phase shift between channels. When this pin is high, the phase shift may also be set by modulating the duty cycle of external clock on the MODE/SYNC pin (channel 1 edge synced to rising edge of external clock, channel 2 edge synced to falling edge of external clock). See Applications Section for more details. PGOOD2 (Pin 5/Pin 6): Open Drain Power Good Indicator for Channel 2. ILIM (Pin 6/Pin 7): Current Limit Select Pin. Tying this pin to ground sets the full current limit for both channels. Tying this pin to INTVCC drops the current limit by a factor of 2 for both channels. Biasing this pin to 1V sets the current on channel 1 to be the full amount, and the current on channel 2 to be dropped by a factor of 2. VIN2 (Pin 7/Pin 8): Input Voltage of Channel 2 Step-Down Regulator. May be a different voltage than VIN1. SW2 (Pin 8/Pin 9): Switch Node Connection to the Inductor of Channel 2 Step-Down Regulator. 8 RUN2 (Pin 9/Pin 10): Logic Controlled RUN Input to Channel 2. Do not leave this pin floating. Logic high activates the step-down regulator. FB2 (Pin 10/Pin 11): Feedback Input to the Error Amplifier of Channel 2 Step-Down Regulator. Connect resistor divider tap to this pin. The output voltage can be adjusted from 0.6V to VIN by: VOUT = 0.6V • [1 + (R2/R1)]. (Figure 2) For fixed VOUT options, connect the FB pin directly to VOUT. INTVCC (Pin 11/Pin 12): Low Dropout Regulator. Bypass with a low ESR capacitor of at least 1µF to ground. FB1 (Pin 12/Pin 13): Feedback Input to the Error Amplifier of Channel 1 Step-Down Regulator. Connect resistor divider tap to this pin. The output voltage can be adjusted from 0.6V to VIN by: VOUT = 0.6V • [1 + (R2/R1)]. (Figure 2) For fixed VOUT options, connect the FB pin directly to VOUT. RUN1 (Pin 13/Pin 14): Logic Controlled RUN Input to Channel 1. Do not leave this pin floating. Logic high activates the step-down regulator. SW1 (Pin 14/Pin 16): Switch Node Connection to the Inductor of Channel 1 Step-Down Regulator. GND (Pin 15/Pin 17): Ground for Power and Signal Ground. The exposed pad must be connected to PCB ground for rated electrical and rated thermal performance. SVIN (NA/Pin 2): Signal VIN Pin. This input powers the INTVCC. May be a different voltage than either VIN1 or VIN2. Connect SVIN to either VIN1 or VIN2 , whichever one is higher. For applications where it is not known which VIN is higher, connect external diode between SVIN to both VIN1 and VIN2 to ensure that SVIN is less than a diode drop from the higher of VIN1 or VIN2. 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 BLOCK DIAGRAM VIN1 0.5ms SOFT-START 0.6V FB1 + + – SLOPE COMPENSATION ERROR AMPLIFIER + BURST COMPARATOR + MAIN I-COMPARATOR – – FIXED VOUT BUCK LOGIC AND GATE DRIVE OVERCURRENT COMPARATOR VIN–5V + – SW1 INTVCC RUN1 PGOOD1 REVERSE CURRENT COMPARATOR + – GND CHANNEL 1 CLK1 MODE/SYNC INTVCC CURRENT LIMIT SELECT OSCILLATOR PHASE LDO ILIM CLK2 SVIN (MSOP ONLY) CHANNEL 2 SAME AS CHANNEL 1 FB2 SW2 RUN2 PGOOD2 VIN2 3622 BD 3622fc For more information www.linear.com/LTC3622 9 LTC3622/ LTC3622-2/LTC3622-23/5 OPERATION The LTC3622 is a dual high efficiency monolithic stepdown regulator, which uses a constant frequency, peak current mode architecture. It operates through a wide VIN range and regulates with ultralow quiescent current. The operation frequency is set at either 2.25MHz or 1MHz and can be synchronized to an external oscillator ±50% of the inherent frequency. To suit a variety of applications, the selectable MODE/SYNC pin allows the user to trade off output ripple for efficiency. For each channel, the output voltage is set by an external divider returned to the FB pin. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. Overvoltage and undervoltage comparators will pull the PGOOD output low if the output voltage is not within 7.5% of the programmed value. The PGOOD output will go high immediately after achieving regulation and will go low 32 clock cycles after falling out of regulation. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle. The inductor current is allowed to ramp up to a peak level. Once the level is reached, the top power switch is turned off and the bottom switch (N-channel MOSFET) is turned on until the next clock cycle. The peak current level is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier compares the FB voltage to the 0.6V internal reference. When the load current increases, the FB voltage decreases slightly below the reference, which causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. 10 Low Current Operation Two discontinuous conduction modes (DCM) are available to control the operation of the LTC3622 at low currents. Both modes, Burst Mode operation and pulse-skipping mode, automatically switch from continuous operation to the selected mode when the load current is low. To optimize efficiency, Burst Mode operation can be selected by tying the MODE/SYNC pin to INTVCC. In Burst Mode operation, the peak inductor current is set to be at least 400mA, even if the output of the error amplifier demands less. Thus, when the switcher is on at relatively light output loads, FB voltage will rise and cause the ITH voltage to drop. Once the ITH voltage drops low enough,the switcher goes into sleep mode with both power switches off. The switchers remain in this sleep state until the external load pulls the output voltage below its regulation point. When both channels are in sleep mode, the part draws an ultralow 5µA of quiescent current from VIN. To minimize VOUT ripple, pulse-skipping mode can be selected by grounding the MODE/SYNC pin. In LTC3622, pulse-skipping mode is implemented similarly to Burst Mode operation with the peak inductor current set to be at above 66mA. This results in lower ripple than in Burst Mode operation with the trade-off being slightly lower efficiency. High Duty Cycle/Dropout Operation When the input supply voltage decreases towards the output voltage, the duty cycle increases and slope compensation is required to maintain the fixed switching frequency. The LTC3622 has internal circuitry to accurately maintain the peak current limit (ILIM) of 1.8A even at high duty cycles. As the duty cycle approaches 100%, the LTC3622 enters dropout operation. During dropout, the part will transition in and out of sleep mode depending on the output load current. This significantly reduces the quiescent current, thus prolonging the use of the input supply. 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 OPERATION VIN Overvoltage Protection In order to protect the internal power MOSFET devices against transient voltage events, the LTC3622 constantly monitors the VIN1 and VIN2 pins for an overvoltage condition. When VIN1 or VIN2 rise above 18.5V, both regulators suspend operation by shutting off both power MOSFETs. Once VIN drops below 18.2V, the regulator immediately resumes normal operation. The regulators execute softstart when exiting an overvoltage condition. Low Supply Operation The LTC3622 incorporates undervoltage lockout circuits which shut down the part when the input voltages drop below 2.5V. As the input voltages rise slightly above the undervoltage threshold, the switchers will begin basic operation. However, the RDS(ON) of the top and bottom switch of each channel will be slightly higher than that specified in the electrical characteristics due to lack of gate drive. Refer to graph of RDS(ON) versus VIN for more details. Crosstalk can generally be avoided by carefully choosing the phase shift such that the SW edges do not coincide. However, there are often situations where this is unavoidable, such as when both channels are operating at near 50% duty cycle. In such cases, the optimized phase shift can be set by modulating the duty cycle of external clock on the MODE/SYNC pin (channel 1 edge synced to rising edge of external clock, channel 2 edge synced to falling edge of external clock), while keeping the PHASE pin voltage high. Figure 1 shows a 90° phase shifting between two channels. Table 1 shows the phase selection by the PHASE pin. EXTERNAL CLOCK SW1 SW2 Phase Selection 500ns/DIV The two channels of LTC3622 can operate in phase, 180° out-of-phase (anti-phase) depending on the state of PHASE pin- low, or high, respectively. Anti-phase generally reduces input voltage and current ripple. Crosstalk between switch nodes SW1, SW2 and components or sensitive lines connected to FBx, can sometimes cause unstable switching waveforms and unexpectedly large input and output voltage ripple. The situation improves if rising and falling edges of the switch nodes are timed carefully not to coincide. Depending on the duty cycle of the two channels, choose the phase difference between the channels to keep edges as far away from each other as possible. 3622 F01 Figure 1. 90° Phase Shift Set by External Clock Table 1. Phase Selection NO EXTERNAL CLK EXTERNAL CLK PHASE = 0 0° Phase Shift 0° Phase Shift PHASE = INTVCC 180° Phase Shift Phase Shift Determined by Clock Edges Soft-Start The LTC3622 has a 500µs soft-start ramp for each channel when enabled. During soft-start operation, the switchers operate in pulse-skipping mode. 3622fc For more information www.linear.com/LTC3622 11 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION Output Voltage Programming For non-fixed output voltage parts, the output voltage is set by external resistive dividers according to the following equation: R2 VOUT = 0.6V • 1+ R1 The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 2. For fixed VOUT parts, tie FB directly to VOUT, as R2 and R1 are matched internal resistors. VOUT R2 LTC3622 FB CFF R1 GND 3622 F02 Figure 2. Setting the Output Voltage Input Capacitor (CIN) Selection The input capacitance, CIN, is needed to filter the square wave current at the drain of the top power MOSFET. To prevent large voltage transients from occurring, a low ESR input capacitor sized for the maximum RMS current should be used. The RMS current calculation is different if the part is used in in-phase or out-of-phase. For "in phase", when VOUT1 = VOUT2 VOUT (VIN – VOUT ) VIN This formula has a maximum at VIN = 2VOUT. This simple worst case is commonly used to determine the highest IRMS. For out-of-phase case, the ripple current can be lower than the "in phase" current. The maximum current typically occurs when VOUT1 – VIN/2 = VOUT2 or when VOUT2 – VIN/2 = VOUT1. As a good rule of thumb, the amount of worst case ripple is about 75% of the worst case ripple in the in-phase mode. Also note that when VOUT1 = VOUT2 = VIN/2 and I1 = I2, the input current ripple is at its minimum. 12 Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For low input voltage applications, sufficient bulk input capacitance may be needed to minimize transient effects during output load changes. Output Capacitor (COUT) Selection The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response. The output ripple, ΔVOUT, is determined by: 1 ΔVOUT < ΔIL +ESR 8 • ƒ • COUT The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer and hybrid conductive polymer capacitors are very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is importance to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capacitors have excellent low ESR characteristics and small footprints. Using Ceramic Input and Output Capacitors Higher capacitance value, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the VIN input. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R and X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Since the ESR of a ceramic capacitor is so low, the input and output capacitor must instead fulfill a charge storage requirement. During a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. Typically, five cycles are required to respond to a load step, but only in the first cycle does the output voltage drop linearly. The output droop, VDROOP, is usually about three times the linear drop of the first cycle. Thus, a good place to start with the output capacitor value is approximately: COUT = 3 ΔIOUT ƒO • VDROOP More capacitance may be required depending on the duty cycle and load step requirements. In most applications, the input capacitor is merely required to supply high frequency bypassing, since the impedance to the supply is very low. A 10µF ceramic capacitor is usually enough for these conditions. Place this input capacitor as close to the VIN1 and VIN2 pins as possible. Output Power Good When the LTC3622’s output voltages are within the ±7.5% window of the regulation point, the output voltages are good and the PGOOD pins are pulled high with external resistors. Otherwise, internal open-drain pull-down devices (275Ω) will pull the PGOOD pins low. To prevent unwanted PGOOD glitches during transients or dynamic VOUT changes, the LTC3622’s PGOOD falling edge includes a blanking delay of approximately 32 switching cycles. Frequency Synchronization Capability The LTC3622 has the capability to synchronize to a ±50% range of the internal programmed frequency. It takes several cycles of external clock to engage the sync mode, and roughly 2μs for the part to detect the absence of the external clock signal. Once engaged in sync, the LTC3622 immediately runs at the external clock frequency. Inductor Selection Given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: ΔIL = VOUT V 1– OUT ƒ • L VIN(MAX) Lower ripple current reduces power losses in the inductor, ESR losses in the output capacitors and output voltage ripple. Highest efficiency operation is obtained at low frequency with small ripple current. However, achieving this requires a large inductor. There is a trade-off between component size, efficiency and operating frequency. A reasonable starting point is to choose a ripple current that is about 50% of IOUT(MAX). To guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: L= VOUT V 1– OUT ƒ • ΔIL(MAX) VIN(MAX) Once the value for L is known, the type of inductor must be selected. Actual core loss is independent of core size for a fixed inductor value, but is very dependent on the inductance selected. As the inductance or frequency increases, core loss decreases. Unfortunately, increased inductance requires more turns of wire and therefore copper losses increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor 3622fc For more information www.linear.com/LTC3622 13 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Toko, Vishay, NEC/Tokin, Cooper, TDK and Würth Elektronik. Refer to Table 2 for more details. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to the ΔILOAD • ESR, where ESR is the effective series Table 2. Inductor Selection Table INDUCTOR INDUCTANCE (μH) DCR (mΩ) MAX CURRENT (A) DIMENSIONS (mm) HEIGHT (mm) IHLP-1616BZ-11 Series 1.0 2.2 4.7 24 61 95 4.5 3.25 1.7 4.3 × 4.7 4.3 × 4.7 4.3 × 4.7 2 2 2 IHLP-2020BZ-01 Series 1 2.2 3.3 4.7 5.6 6.8 18.9 45.6 79.2 108 113 139 7 4.2 3.3 2.8 2.5 2.4 5.4 × 5.7 5.4 × 5.7 5.4 × 5.7 5.4 × 5.7 5.4 × 5.7 5.4 × 5.7 2 2 2 2 2 2 FDV0620 Series 1 2.2 3.3 4.7 18 37 51 68 5.7 4 3.2 2.8 6.7 × 7.4 6.7 × 7.4 6.7 × 7.4 6.7 × 7.4 2 2 2 2 MPLC0525L Series 1 1.5 2.2 16 24 40 6.4 5.2 4.1 6.2 × 5.4 6.2 × 5.4 6.2 × 5.4 2.5 2.5 2.5 HCM0703 Series 1 1.5 2.2 3.3 4.7 9 14 18 28 37 11 9 8 6 5.5 7 × 7.4 7 × 7.4 7 × 7.4 7 × 7.4 7 × 7.4 3 3 3 3 3 RLF7030 Series 1 1.5 2.2 3.3 4.7 6.8 8.8 9.6 12 20 31 45 6.4 6.1 5.4 4.1 3.4 2.8 6.9 × 7.3 6.9 × 7.3 6.9 × 7.3 6.9 × 7.3 6.9 × 7.3 6.9 × 7.3 3.2 3.2 3.2 3.2 3.2 3.2 TDK www.tdk.com WE-TPC 4828 Series 1.2 1.8 2.2 2.7 3.3 3.9 4.7 17 20 23 27 30 47 52 3.1 2.7 2.5 2.35 2.15 1.72 1.55 4.8 × 4.8 4.8 × 4.8 4.8 × 4.8 4.8 × 4.8 4.8 × 4.8 4.8 × 4.8 4.8 × 4.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 Würth Elektronik www.we-online.com XFL4020 Series 1.0 1.5 2.2 3.3 4.7 10.8 14.4 21.35 34.8 52.2 8 6.7 6.0 3.9 3.6 4×4 4×4 4×4 4×4 4×4 2 2 2 2 2 14 MANUFACTURER Vishay www.vishay.com Toko www.toko.com NEC/Tokin www.nec-tokin.com Cooper Bussmann www.cooperbussmann.com Coilcraft www.coilcraft.com 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady state value. During this recovery time, VOUT can be monitored for overshoot or ringing that indicates a stability problem. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/DC ratio cannot be used to determine phase margin. In addition, a feedforward capacitor can be added to improve the high frequency response, shown in Figure 2. Capacitor CFF provides phase lead by creating a high frequency zero with R2, which improves the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and demonstrates the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching in loads with large (>1µF) input capacitors. The discharge input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the switch connecting to load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot Swap controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection and soft-starting. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + …) where L1, L2 etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, three main sources usually account for most of the losses in LTC3622 circuit: 1) I2R losses, 2) switching and biasing losses, 3) other losses. 1. I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L but is “chopped” between the internal top and bottom power MOSFETs. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW =(RDS(ON)TOP)(DC)+(RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus to obtain I2R losses: I2R Losses = IOUT2(RSW + RL) 2. The switching current is the sum of the MOSFET driver and control currents. The power MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a power MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC control bias current. In continuous mode, IGATECHG = fOSC(QT + QB), where QT and QB are the gate charges of the internal top and bottom power MOSFETs and fOSC is the switching frequency. The power loss is thus: Switching Loss = IGATECHG • VIN The gate charge loss is proportional to VIN and fOSC and thus their effects will be more pronounced at higher supply voltages and higher frequencies. 3. Other “hidden” losses such as transition loss and copper trace and internal load resistances can account for additional efficiency degradations in the overall power system. It is very important to include these “system” level losses in the design of a system. Transition loss arises from the brief amount of time the top power MOSFET spends in the saturated region during switch node transitions. The LTC3622 internal power devices switch quickly enough that these loses are not significant compared to other sources. These losses plus other losses, including diode conduction losses during dead time and inductor core losses, generally account for less than 2% total additional loss. 3622fc For more information www.linear.com/LTC3622 15 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION Thermal Conditions In a majority of applications, the LTC3622 does not dissipate much heat due to its high efficiency. However, in applications where the LTC3622 is running at high ambient temperature, high VIN, high switching frequency, and maximum output current load, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 160°C, all power switches will be turned off until the temperature drops about 15°C cooler. To prevent the LTC3622 from exceeding the maximum junction temperature, the user needs to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TRISE = PD • θJA As an example, consider the case when the LTC3622 is used in applications where VIN = 12V, IOUT = IOUT1 = IOUT2 = 1A, ƒ = 2.25MHz, VOUT = VOUT1 = VOUT2 = 1.8V. The equivalent power MOSFET resistance RSW is: RSW = RDS(ON)TOP • = 370mΩ • 16 VOUT +RDS(ON)BOT VIN The active current through VIN at 2.25MHz without load is about 10mA, which includes switching and internal biasing current loss, and transition loss. Therefore, the total power dissipated by the part is: PD = 2 • IOUT2 • RSW + VIN • IIN(Q) = 2 • 1A2 • 183mΩ + 12V • 10mA = 486mW For the DFN package, the θJA is 40°C/W. Therefore, the junction temperature of the regulator operating at 25°C ambient temperature is approximately: TJ = 486mW • 40°C/W + 25°C = 44.4°C Remembering that the above junction temperature is obtained from an RDS(ON) at 25°C, we might recalculate the junction temperature based on a higher RDS(ON) since it increases with temperature. Redoing the calculation assuming that RSW increased 5% at 44.4°C yields a new junction temperature of 45.4°C. If the application calls for a higher ambient temperature and/or higher switching frequency, care should be taken to reduce the temperature rise of the part by using a heat sink or air flow. V • 1– OUT VIN 1.8V 1.8V + 150mΩ • 1– = 183mΩ 12V 12V 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION Board Layout Considerations 4. Solder the exposed pad (Pin 15 for DFN, Pin 17 for MSOP) on the bottom of the package to the GND plane. Connect this GND plane to other layers with thermal vias to help dissipate heat from the LTC3622. When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3622 (refer to Figure 3). Check the following in the layout: 5. Keep sensitive components away from the SW pin. The input capacitor, CIN, feedback resistors, and INTVCC bypass capacitors should be routed away from the SW trace and the inductor. 1. Do the capacitors CIN connect to the VIN and GND as close as possible? These capacitors provide the AC current to the internal power MOSFETs and their drivers. Does CVCC connect to INTVCC as close as possible? 6. A ground plane is highly recommended. 2. Are COUT and L closely connected? The (–) plate of COUT returns current to GND and the (–) plate of CIN. 7. Flood all unused areas on all layers with copper, which reduces the temperature rise of power components. These copper areas should be connected to GND. 3. The resistive divider, R1 and R2, must be connected between the (+) plate of COUT and a ground line terminated near GND. The feedback signal VFB should be routed away from noisy components and traces, such as the SW line, and its trace should be minimized. Keep R1 and R2 close to the IC. GND VIN COUT1 VIAS TO GROUND PLANE L1 CIN SW1 CIN SW2 VIAS TO GROUND PLANE L2 COUT2 VIN GND VIAS TO GROUND PLANE 36222 F03 Figure 3. Layout Diagram 3622fc For more information www.linear.com/LTC3622 17 LTC3622/ LTC3622-2/LTC3622-23/5 APPLICATIONS INFORMATION Design Example Using standard value of 3.3µH and 2.7µH for inductors results in maximum ripple currents of: As a design example, consider using the LTC3622 in an application with the following specifications: VIN1 = VIN1 = 10.8V to 13.2V VOUT1 = 5V VOUT2 = 3.3V IOUT1(MAX) = 1A IOUT2(MAX) = 1A IOUT(MIN) = 0 fSW = 2.25MHz ΔIL2 = 3.3V 3.3V 1– = 0.41A 2.25MHz • 2.7µH 13.2V CIN should be sized for a maximum current rating of: Given the internal oscillator of 2.25MHz, we can calculate the inductors value for about 40% ripple current at maximum VIN: 5 13.2 IRMS1 = 1A – 1 = 0.49A 13.2 5 5V 5V L1= 1– = 3.4µH 2.25MHz • 0.4A 13.2V 3.3 13.2 – 1 = 0.43A IRMS2 = 1A 13.2 3.3 3.3V 3.3V L2 = 1– = 2.75µH 2.25MHz • 0.4A 13.2V CIN 10µF 5V 5V 1– = 0.42A 2.25MHz • 3.3µH 13.2V COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design, a 22µF ceramic capacitor will be used. Because efficiency is important at both high and low load current, Burst Mode operation will be utilized. VIN 17V MAX ΔIL1 = Decoupling the VIN1 and VIN2 pins with 10µF ceramic capacitors is adequate for most applications. VIN1 INTVCC VIN2 MODE/SYNC RUN1 PHASE RUN2 ILIM LTC3622-2 C1 1µF PGOOD1 PGOOD2 3.3µH VOUT1 5V 1A COUT1 22µF 22pF SW2 SW2 619k 619k FB2 84.5k 2.7µH GND 22pF FB2 137k VOUT2 3.3V 1A COUT2 22µF 3622 F04 Figure 4. 5V/3.3V VOUT Burst Mode Operation Application 18 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 TYPICAL APPLICATIONS 5V/3.3V VOUT, Burst Mode Operation, In-Phase Switching VIN 17V MAX CIN 10µF VIN1 INTVCC VIN2 MODE/SYNC RUN1 PHASE RUN2 ILIM LTC3622-2 C1 1µF PGOOD1 PGOOD2 6.8µH VOUT1 5V 1A COUT1 22µF 22pF SW1 SW2 FB1 FB2 619k 84.5k 3.3µH 619k GND 137k 22pF VOUT2 3.3V 1A COUT2 22µF 3622 TA02 Efficiency vs Load Load Step Waveform 100 90 IL 500mA/DIV EFFICIENCY (%) 80 70 60 50 VOUT AC-COUPLED 200mV/DIV 40 30 20 10 VOUT = 5V VOUT = 3.3V VIN = 12V fSW = 2.25MHz Burst Mode OPERATION 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 1 3622 TA02a 40µs/DIV VIN = 12V VOUT1 = 5V ILOAD = 5mA → 500mA Burst Mode OPERATION fSW = 2.25MHz 3622 TA02b 3622fc For more information www.linear.com/LTC3622 19 LTC3622/ LTC3622-2/LTC3622-23/5 TYPICAL APPLICATIONS Dual Output Regulators from Multiple Input Sources 1µF VIN1 12V SVIN VIN1 CIN1 10µF RUN2 PHASE ILIM 3.3µH COUT1 22µF 22pF CIN2 10µF LTC3622 INTVCC MODE/SYNC VOUT1 5V 1A VIN2 5V VIN2 RUN1 PGOOD1 PGOOD2 SW1 SW2 FB1 FB2 C1 1µF 1µH 604k 604k GND 82.5k 134k 22pF VOUT2 3.3V 1A COUT2 22µF 3622 TA06 20 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC3622#packaging for the most recent package drawings. DE Package 14-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708 Rev B) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) R = 0.05 TYP 3.00 ±0.10 (2 SIDES) R = 0.115 TYP 8 0.40 ±0.10 14 3.30 ±0.10 1.70 ±0.10 PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER PIN 1 TOP MARK (SEE NOTE 6) 0.200 REF 0.75 ±0.05 (DE14) DFN 0806 REV B 7 1 0.25 ±0.05 0.50 BSC 3.00 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3622fc For more information www.linear.com/LTC3622 21 LTC3622/ LTC3622-2/LTC3622-23/5 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC3622#packaging for the most recent package drawings. MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 5.10 (.201) MIN 2.845 ±0.102 (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 8 1 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) (.126 – .136) 0.305 ±0.038 (.0120 ±.0015) TYP 16 0.50 (.0197) BSC 4.039 ±0.102 (.159 ±.004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 ±0.076 (.011 ±.003) REF 16151413121110 9 DETAIL “A” 0° – 6° TYP 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 22 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE16) 0213 REV F 3622fc For more information www.linear.com/LTC3622 LTC3622/ LTC3622-2/LTC3622-23/5 REVISION HISTORY REV DATE DESCRIPTION A 03/15 Added LTC3622-23/5 Options in Header. PAGE NUMBER All Added LTC3622-23/5 to Options Table. 1 Added LTC3622-23/5 to Electrical Characteristics. Added MSOP-16E Package Options. B C 8/15 6/16 3 1, 2, 3, 22 Added H-Grade Options. 2, 3, 4 Clarified Pin Functions. 8 Clarified Table 2. 14 Added MSOP-16E in #4. 17 Clarified package description to MSE. 2 Clarified Package Description to MSE, 16-Lead MSOP, exposed die pad. 22 Changed ABS Max Rating of RUN1 and RUN2 pins. 2 3622fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTC3622 23 LTC3622/ LTC3622-2/LTC3622-23/5 TYPICAL APPLICATION 5V/3.3V Series Output, Burst Mode Operation VIN 5V TO 17V INTVCC CIN 10µF 10k 3.3µH VOUT1 5V 1A COUT1 22µF 22pF VIN1 INTVCC MODE/SYNC C1 1µF RUN1 RUN2 PHASE ILIM VIN2 LTC3622-2 PGOOD1 PGOOD2 SW1 SW2 FB1 FB2 1µH 604k 604k 82.5k GND 134k 22pF VOUT2 3.3V 1A COUT2 22µF 3622 TA03 RELATED PARTS PART NUMBER DESCRIPTION LTC3621/ LTC3621-2 1A, 17V, 1/2.25MHz, Synchronous Step-Down Regulator 95% Efficiency, VIN: 2.7V to 17V, VOUT(MIN) = 0.6V, IQ = 3.5µA, ISD < 1µA, 2mm × 3mm DFN-6, MSOP-8E COMMENTS LTC3600 1.5A, 15V, 4MHz Synchronous Rail-to-Rail Single Resistor Step-Down Regulator 95% Efficiency, VIN: 4V to 15V, VOUT(MIN) = 0V, IQ = 700µA, ISD < 1µA, 3mm × 3mm DFN-12, MSOP-12E Packages LTC3601 15V, 1.5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA, ISD < 1µA, 4mm × 4mm QFN-20, MSOP-16E Packages LTC3603 15V, 2.5A (IOUT) 3MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 75µA, ISD < 1µA, 4mm × 4mm QFN-20, MSOP-16E Packages LTC3633A 20V, Dual 3A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 3.6V to 20V, VOUT(MIN) = 0.6V, IQ = 500µA, ISD < 15µA, 4mm × 5mm QFN-28, TSSOP-28E Packages. A Version Up to 20VIN LTC3605A 20V, 5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4V to 20V, VOUT(MIN) = 0.6V, IQ = 2mA, ISD < 15µA, 4mm × 4mm QFN-24 Package. A Version Up to 20VIN LTC3604 15V, 2.5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA, ISD < 14µA, 3mm × 3mm QFN-16, MSOP-16E Packages LTC3624/ LTC3624-2 2A, 17V, 1MHz/2.25MHz Synchronous Step-Down Regulator 95% Efficiency, VIN: 2.7V to 17V, VOUT(MIN) = 0.6V, IQ = 3.5µA, ISD < 1µA, 3mm × 3mm DFN-8 Package 24 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3622 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3622 3622fc LT 0616 REV C • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2014