White Electronic Designs EDI88128CS 128Kx8 Monolithic SRAM, SMD 5962-89598 FEATURES Access Times of 15*, 17, 20, 25, 35, 45, 55ns • 32 pad Ceramic LCC (Package 141) CS# and OE# Functions for Bus Control • 32 lead Ceramic Flatpack (Package 142) 2V Data Retention (EDI88128LPS) TTL Compatible Inputs and Outputs Fully Static, No Clocks Organized as 128Kx8 Commercial, Industrial and Military Temperature Ranges Thru-hole and Surface Mount Packages JEDEC Pinout Single +5V (±10%) Supply OperationThe EDI88128CS is a high speed, high performance, 128Kx8 megabit density Monolithic CMOS Static RAM. The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power version with 2V Data Retention (EDI88128LPS) is also available for battery back-up opperation. Military product is available compliant to MIL-PRF-38535. • 32 pin Ceramic DIP, 400 mil (Package 102) • 32 pin Ceramic DIP, 600 mil (Package 9) • 32 lead Ceramic ZIP (Package 100) * 15ns access time is advanced information, contact factory for availability. • 32 lead Ceramic SOJ (Package 140) This product is subject to change without notice. FIGURE 1 – PIN CONFIGURATION 32 32 32 32 PIN DESCRIPTION DIP SOJ LCC FLATPACK 32 ZIP TOP VIEW NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 I/O0-7 A0-16 WE# CS# OE# VCC VSS NC TOP VIEW 32 VCC 31 A15 30 NC 29 WE# 28 A13 27 A8 26 A9 25 A11 24 OE# 23 A10 22 CS# 21 I/O7 20 I/O6 19 I/O5 18 I/O4 17 I/O3 NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 2 VCC 4 A15 6 NC 8 WE# 10 A13 12 A8 14 A9 16 A11 18 OE# 20 A10 22 CS# 24 I/O7 26 I/O6 28 I/O5 30 I/O4 32 I/O3 Data Inputs/Outputs Address Inputs Write Enable Chip Select Output Enable Power (+5V ±10%) Ground Not Connected BLOCK DIAGRAM Memory Array Address Buffer A0-16 Address Decoder I/O Circuits I/O0-7 WE# CS# OE# White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Military Storage Temperature, Plastic Power Dissipation Output Current Junction Temperature, TJ TRUTH TABLE -0.5 to 7.0 Unit V 0 to +70 -40 to +85 -55 to +125 -65 to +150 1.5 20 175 °C °C °C °C W mA °C OE# X H L X CS# H L L L WE# X H H L Mode Standby Output Deselect Read Write Output High Z High Z Data Out Data In Power Icc2, Icc3 Icc1 Icc1 Icc1 Recommended Operating Conditions Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage NOTE: Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Symbol VCC VSS VIH VIL Min 4.5 0 2.2 -0.3 Typ 5.0 0 — — Max 5.5 0 VCC +0.5 +0.8 Unit V V V V CAPACITANCE TA = +25°C Parameter Symbol Condition Max LLC Address Lines Data Lines CI CO VIN = VCC or VSS, f = 1.0MHz VOUT = VCC or VSS, f = 1.0MHz Unit CSOJ, ZIP, DIP, Flatpack 12 14 pF pF These parameters are sampled, not 100% tested. DC CHARACTERISTICS VCC = 5.0V, -55°C ≤ TA ≤ +125°C Parameter Input Leakage Current Output Leakage Current Symbol ILI ILO Conditions VIN = 0V to VCC VI/O = 0V to VCC Operating Power Supply Current Icc1 WE#, CS# = VIL, II/O = 0mA, CS2 = VIH Standby (TTL) Power Supply Current Icc2 CS# ≥ VIH, VIN ≤ VIH or ≥ VIL Full Standby Power Supply Current Icc3 CS# ≥ VCC -0.2V VIN ≥ VCC -0.2V or VIN ≤ 0.2V Output Low Voltage Output High Voltage VOL VOH IOL = 8.0mA IOH = -4.0mA (15-17ns) (20ns) (25-55ns) (17-55ns) (15ns) CS (17-55ns) CS (15ns) LPS Min — — — — — — — — — — — 2.4 Typ — — 3 — — — — Max ±5 ±10 300 225 200 25 60 10 15 5 0.4 — Units µA µA mA mA mA mA mA mA mA mA V V NOTE: DC test conditions : VIL = 0.3V, VIH = VCC -0.3V White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS AC CHARACTERISTICS – READ CYCLE (15 to 20ns) VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C Parameter Symbol 15ns* JEDEC Alt. Min Read Cycle Time tAVAV tRC 15 Address Access Time tAVQV tAA Chip Enable Access Time tELQV tACS Chip Enable to Output in Low Z (1) tELQX tCLZ Chip Disable to Output in High Z (1) tEHQZ tCHZ Output Hold from Address Change tAVQX tOH Output Enable to Output Valid tGLQV tOE Output Enable to Output in Low Z (1) tGLQX tOLZ Output Disable to Output in High Z(1) tGHQZ tOHZ Chip Enable to Power Up (1) tELICCH tPU Chip Enable to Power Down (1) tEHICCL tPD 17ns Max Min Min 17 15 Max 20 ns 17 15 17 3 3 0 ns 10 ns 8 ns 8 ns 20 ns ns 6 0 0 6 ns 6 0 15 20 0 6 0 ns ns 8 0 20 3 8 0 Units 20ns Max 0 ns 17 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS – READ CYCLE (25 to 55ns) VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C Symbol Parameter 25ns 35ns Min Read Cycle Time tAVAV tRC 25 Address Access Time tAVQV tAA 25 35 45 55 Chip Enable Access Time tELQV tACS 25 35 45 55 Chip Enable to Output in Low Z (1) tELQX tCLZ Chip Disable to Output in High Z (1) tEHQZ tCHZ Output Hold from Address Change tAVQX tOH tGLQV tOE Output Enable to Output in Low Z (1) tGLQX tOLZ Output Disable to Output in High Z(1) tGHQZ tOHZ Chip Enable to Power Up (1) tELICCH tPU Chip Enable to Power Down (1) tEHICCL tPD Min Max 35 3 0 10 0 10 0 25 35 20 ns ns ns 20 25 0 ns ns 20 0 ns ns 0 0 Units ns 20 15 0 Max 3 0 15 0 Min 55 3 20 0 Max 45 3 12 Min 55ns Alt. Output Enable to Output Valid Max 45ns JEDEC 20 0 ns ns 45 55 ns 1. This parameter is guaranteed by design but not tested. AC TEST CONDITIONS Figure 1 Figure 2 Vcc Vcc Input Pulse Levels 480Ω Q Input Rise and Fall Times Input and Output Timing Levels Output Load 480Ω Q 255Ω 30pF 255Ω VSS to 3.0V 5ns 1.5V Figure 1 NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2 5pF White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS AC CHARACTERISTICS – WRITE CYCLE (15 to 20ns) VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C Symbol JEDEC Alt. tWC tAVAV tELWH tCW tELEH tCW tAVWL tAS tAVEL tAS tAW tAVWH tAVEH tAW tWLWH tWP tWLEH tWP tWHAX tWR tEHAX tWR tWHDX tDH tEHDX tDH tWHZ tWLQZ tDVWH tDW tDVEH tDW tWHQX tWLZ Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) 15ns* Min 15 12 12 0 0 12 12 12 12 0 0 0 0 0 7 7 3 17ns Max Min 17 13 13 0 0 13 13 13 13 0 0 0 0 0 8 8 3 7 20ns Max Min 20 15 15 0 0 15 15 15 15 0 0 0 0 0 10 10 3 8 Max 8 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS – WRITE CYCLE (25 to 55ns) VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) Symbol JEDEC Alt. tAVAV tWC tCW tE1LWH tELEH tCW tAVWL tAS tAVEL tAS tAVWH tAW tAVEH tAW tWLWH tWP tWLEH tWP tWR tWHAX tEHAX tWR tWHDX tDH tEHDX tDH tWLQZ tWHZ tDVWH tDW tDVEH tDW tWHQX tWLZ Min 25 20 20 0 0 20 20 20 20 0 0 0 0 0 15 15 3 25ns Max 10 Min 35 25 25 0 0 25 25 30 30 0 0 0 0 0 20 20 3 35ns Max 13 Min 45 35 35 0 0 35 35 30 30 5 5 0 0 0 20 20 3 45ns Max 15 Min 55 45 45 0 0 45 45 35 35 5 5 0 0 0 25 25 3 55ns Max 20 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 1. This parameter is guaranteed by design but not tested. White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS FIGURE 2 – TIMING WAVEFORM - READ CYCLE tAVAV ADDRESS tAVQV tAVAV ADDRESS CS# ADDRESS 1 ADDRESS 2 tAVQV tAVQX tELQV tELQX tELICCH tEHQZ tEHICCL Icc DATA I/O DATA 1 DATA 2 OE# READ CYCLE 1 (WE# HIGH; OE#, CS# LOW) tGLQV tGLQX tGHQZ DATA I/O READ CYCLE 2 (WE# HIGH) FIGURE 3 – WRITE CYCLE - WE# CONTROLLED tAVAV ADDRESS tAVWH tELWH tWHAX CS# tAVWL tWLWH WE# tDVWH DATA IN tWHDX DATA VALID tWLQZ tWHQX HIGH Z DATA OUT WRITE CYCLE 1, WE# CONTROLLED FIGURE 4 – WRITE CYCLE - CS# CONTROLLED tAVAV ADDRESS tAVEH tELEH tEHAX CS# tAVEL tWLEH WE# tDVEH DATA IN tEHDX DATA VALID HIGH Z DATA OUT WRITE CYCLE 2, CS# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS DATA RETENTION CHARACTERISTICS (EDI88128LPA only) -55°C ≤ TA ≤ +125°C Characteristic Low Power Version only Sym Conditions Data Retention Voltage Data Retention Quiescent Current VCC ICCDR Chip Disable to Data Retention Time (1) Operation Recovery Time (1) TCDR TR Min Typ Max Units VCC = 2.0V CS# ≥ VCC -0.2V 2 – – 0.5 – 2 V mA VIN ≥ VCC -0.2V or VIN ≤ 0.2V 0 TAVAV* – – – – ns ns NOTE: 1. Parameter guaranteed by design, but not tested. * Read Cycle Time FIGURE 5 – DATA RETENTION - CS# CONTROLLED Data Retention Mode 4.5V Vcc VCC 4.5V tCDR CS# tR CS# = VCC -0.2V DATA RETENTION, CS# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600mils wide) 1.616 1.584 0.620 0.600 0.060 0.040 Pin 1 Indicator 0.200 0.125 0.061 0.017 0.155 0.115 0.100 TYP 0.020 0.016 0.600 NOM 15 x 0.100 = 1.500 ALL DIMENSIONS ARE IN INCHES PACKAGE 100: 32 LEAD CERAMIC ZIP 1.65 MAX 0.125 MAX 0.500 MAX 0.040 0.020 0.155 0.125 0.100 NOM 0.040 MIN 0.050 31 x 0.050 = 1.550 ALL DIMENSIONS ARE IN INCHES PACKAGE 102: 32 PIN SIDEBRAZED CERAMIC DIP (400mils wide) 1.616 1.584 0.420 0.400 0.060 0.040 Pin 1 Indicator 0.175 0.125 0.061 0.017 0.155 0.115 0.100 TYP 0.020 0.016 0.400 NOM 15 x 0.100 = 1.500 ALL DIMENSIONS ARE IN INCHES White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS PACKAGE 140: 32 LEAD CERAMIC SOJ 0.010 0.006 0.019 0.015 0.840 0.820 0.444 0.430 0.050 TYP 0.379 0.155 0.106 ALL DIMENSIONS ARE IN INCHES PACKAGE 141: 32 PAD CERAMIC LCC 0.096 0.080 0.028 0.022 0.840 0.820 0.050 TYP 0.405 0.395 ALL DIMENSIONS ARE IN INCHES PACKAGE 142: 32 PIN CERAMIC FLATPACK 0.830 0.810 0.007 0.003 1.00 REF 0.290 0.270 0.420 0.400 0.040 0.030 Pin 1 0.045 0.020 0.370 0.250 0.019 0.015 0.116 0.100 0.050 TYP ALL DIMENSIONS ARE IN INCHES White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 8 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88128CS ORDERING INFORMATION EDI 8 8 128 CS X X X WHITE ELECTRONIC DESIGNS SRAM ORGANIZATION, 128Kx8 TECHNOLOGY: CS = CMOS Standard Power LPS = Low Power ACCESS TIME (ns) PACKAGE TYPE: C = 32 lead Sidebrazed DIP, 600 mil (Package 9) F = 32 lead Ceramic Flatpack (Package 142) L = 32 pad Ceramic LCC (Package 141) N = 32 lead Ceramic SOJ (Package 140) T = 32 lead Sidebrazed DIP, 400 mil (Package 102) Z = 32 lead Ceramic ZIP (Package 100) DEVICE GRADE: B = MIL-STD-883 Compliant M = Military Screened I = Industrial C = Commercial -55°C to +125°C -40°C to +85°C 0°C to +70°C White Electronic Designs Corp. reserves the right to change products or specifications without notice. February 2000 Rev. 10 9 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com