TEMEX CIF06 Ci f06 expander and compressor Datasheet

Digital pulse compression module
CI F06 Expander and Compressor
To make an enquiry please email: [email protected]
Product description
CI F06 unit includes a digital pulse expander and the
matched digital pulse compressor housed in a single
unit.
The pulse expander generates a frequency coded pulse,
also called a chirp. Pulse output is IF analog.
The pulse compressor performs matched filtering of the
expanded chirp. Compressor pulse input and output are
IF analog.
CI F06 may be customized to generate and match linear
or non linear chirps.
CI F06 may be used as a replacement of existing SAW
based pulse expander and/or compressor to overcome
device obsolescence or enhance RADAR performances.
CI F06 behavior and performances are reproducible from
one unit to the other. No matching is needed. CI F06
may be used with CI F04/05 to get multiple compressor
channels, also without matching required from one unit
to the other.
Rakon will customize pulse expander chirp and pulse
compression filter according to the characteristics
requested by the customer (Chirp duration, bandwidth,
compressed pulse width, chirp slope …).
The unit is provided with FPGA firmware loaded,
including pulse expander waveforms and pulse
compression filter.
Features







Single channel pulse expander unit
Single channel pulse compressor unit
IF analog I/Os
2 selectable waveforms for expander
and compressor
High precision clock
BITE function
High BxT compression gain
Applications

SAW based pulse compression RADARS upgrade
Oct 16th, 2015
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Digital pulse compression module
CI F06 Expander and Compressor
Technical description
CI F06 functional block diagram is featured on Fig. 1.
FPGA
Wa veform
selection
WF MS el_E
Trigger
Tim ing
Stored
Wa veforms
To
F0
DA C
FIR
Filter
To
F0
DA C
Out_E
Wa veform
selection
WF MS el_C
In_ C
To
Ba seBa nd
ADC
Out_C
Sy stem
Clock
Clock
Power
Control
Power S upply
Connect
JTA G
Program
FPGA
Superv ision
BIT E
Unit_O K
Fig. 1 : CI F06 functional block diagram
Unit description.
The internal low noise system clock is locked on an external clock (derived from the RADAR system clock). For
proper operation, the clock should be a good quality clock, with a low phase noise close to the carrier.
CI F06 unit is provided with FPGA firmware loaded. Functions, and channels specifications (time dispersion,
compressed pulse width, side lobes level…) should be provided by customer; Rakon will customize the FPGA
program to fulfill customer requirements.
CI F06 unit continuously monitors internal power supply and FPGA program integrity. If voltage exceeds nominal
levels, or if FPGA program is corrupted, Unit_OK output is deasserted, and LED is turned off. The Unit_OK output
indicates the GO-NOGO state of the compressor.
Pulse expander channel description.
After each Trigger pulse, a chirp defined by the samples set selected by WFMSel_E is generated, and presented
to the DAC input to be translated into an analog signal. Trigger input have to be synchronized with Clock input.
For better compatibility with old SAW based subsystems, an adjustable additional delay may be inserted.
Expander waveform is selected among 2 possible waveforms, using WFMSel_E input, as presented in Table 1.
Each time WFMSel_E signal changes, the new set of waveform coefficients will be active for the next trigger
pulse.
Table 1 : Expander waveform selection
WFMSel_E
Expander waveform
0
1
Waveform E0 (TBD)
Waveform E1 (TBD)
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Digital pulse compression module
CI F06 Expander and Compressor
Pulse compressor channel description.
Input chirps are filtered (anti-aliasing filter), sampled and down-converted to baseband. I and Q baseband data
are processed by FIR filters whose coefficients are matched with the expander chirp characteristics. Digital
baseband I/Q compressed pulse is then up-converted to carrier frequency and converted into analog signal.
As inputs and outputs are IF analog signals, CI F06 is well suited to upgrade SAW based pulse compression
Radars. For better compatibility with old SAW based subsystems, an adjustable additional delay may be inserted.
Fig. 2 gives the maximum chirp duration value vs. bandwidth achievable for the compressor channel.
Compressor waveform is selected among 2 possible waveforms, using WFMSel_C input, as presented in Table 2.
Each time WFMSel_C signal changes, the new set of waveform coefficients will be active 50 µs later.
Table 2 : Compressor waveform selection
WFMSel_C
Compressor waveform
0
1
Waveform C0 (TBD)
Waveform C1 (TBD)
Fig. 2 : Accessible B x T area
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Digital pulse compression module
CI F06 Expander and Compressor
Specifications
1
Environmental conditions
Line
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Procedures and conditions refer to MIL-STD-810G
1.1
Temperature operating
-25
+60
°C
1.2
Temperature storage
-40
+85
°C
1.3
Humidity operating
@ 30 °C, (non condensing)
95
% RH
1.4
Shock
11 ms, 3 axes, 2 dir, half sine
pulse
30
g
1.5
Random Vibration
20 to 500 Hz, 3 axes
0.1
g /Hz
1.6
EMI - EMC
In accordance with MIL-STD 461 E
2
Electrical Interface
Line
Parameter
Test Condition
Min.
Typ.
Max.
2
Unit
Power supply
2.1
2.2
Voltage
Current
11
@ Power supply = 15 V
26
600
(1)
V
mA
Clock Input
Refers to Clock
2.3
Input level
-10
2.4
Frequency
0
2.5
Phase noise @ 1 kHz
2.6
VSWR
0
For a 20 MHz clock input
10
dBm
250
MHz
-130
dBc/Hz
1.5:1
RF Input signal
Refers to In_C
2.7
Maximum input level
2.8
Input noise floor
2.9
VSWR
10
Inside chirp bandwidth
dBm
-130
dBm/Hz
1.3:1
1
Current highly depends on waveform characteristics (B, T, …)
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Digital pulse compression module
CI F06 Expander and Compressor
2
Electrical Interface
Line
Parameter
Test Condition
Min.
Typ.
Max.
Unit
RF expander output signal
Refers to Out_E
2.10
Maximum output level
2.11
Output level variation with
temperature
2.12
Maximum time domain amplitude
ripple
2.13
Rise / Fall time
2.14
Spurious harmonic level
2.15
Output noise floor
2.16
Maximum phase error within the
chirp
2.17
VSWR
10
dBm
±1
± 0.1
From 10 % to 90 % max level
Inside chirp bandwidth
dB
dB
50
ns
-70
dBc
-140
dBm/Hz
±2
Deg.
1.3:1
RF compressor output signal
Refers to Out_C
2.18
Maximum output level
2.19
Output noise floor
2.20
VSWR
0
Inside chirp bandwidth
dBm
-150
dBm/Hz
1.3:1
RS-422 control inputs
Refers to Trigger, WFMSel_E, WFMSel_C inputs
2.21
Impedance
120
Ω
2.22
Setup time
To clock rising edge
50
ns
2.23
Hold time
From clock rising edge
50
ns
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Digital pulse compression module
CI F06 Expander and Compressor
3
CI F06 expander operation Performances
Line
Parameter
3.1
Center frequency (F0)
3.2
Maximum bandwidth (B)
3.3
Maximum time dispersion (T)
Test Condition
Min.
Typ.
Max.
75 –
B/2
45
Unit
MHz
MHz
1000
µs
Minimal expander delay (TE)
Measured from first Clock
rising edge after Trigger low
to high transition, to the
center of the output chirp.
T/2 +
0.3
µs
3.5
Maximal additional expander delay (TE)
Measured from first Clock
rising edge after Trigger low
to high transition, to the
center of the output chirp.
1
ms
3.6
Modulation slope
3.7
Modulation type
3.4
Up-chirp / Down-chirp
Linear / Non linear
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Digital pulse compression module
CI F06 Expander and Compressor
4
CI F06 compressor operation Performances
Line
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Note: Values given bellow are typical values given as a rough guide. Depending on the required parameters
(B, T,…) other limitations may rise, e.g. side lobe levels highly depends on bandwidth (B) and time dispersion
(T), τ-3dB highly depends on bandwidth (B), …
4.1
Center frequency (F0)
4.2
Maximum bandwidth (B)
75 –
B/2
MHz
45
MHz
Maximum time dispersion (T)
4.3
B < 3 MHz
950
µs
4.4
B < 7 MHz
170
µs
4.5
B < 20 MHz
17
µs
35
ns
35 to
45
dB
T/2 +
2.5
µs
1
ms
25
dB
4.6
Minimum compressed pulse width @ -3
dB (τ-3dB)
4.7
Side lobe level (SLL)
4.8
Minimal compressor delay (TC)
Measured from the center of
the input chirp, to the center
of the compressed pulse
output
4.9
Maximal additional Compressor delay
(TC)
Measured from the center of
the input chirp, to the center
of the compressed pulse
output
4.10
CW Insertion loss @ F0
4.11
Modulation slope
Up-chirp / Down-chirp
4.12
Modulation type
Linear / Non linear
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Digital pulse compression module
CI F06 Expander and Compressor
Mechanical features
5
Mechanical features
Line
Parameter
5.1
Unit outline without connectors
5.2
Unit weight
5.3
Material
AG4.5MC
5.4
Treatment
Ni15 / Zn1
5.5
Screws
Test Condition
Min.
Typ.
Max.
175 x 152 x 27.1
< 0.6
Unit
3
mm
kg
A4-70 stainless steel
Fig. 3 : Mechanical drawing
Reliability
6
Reliability information
Line
Parameter
Test Condition
6.1
Estimated mean time between failure
FIDES 2004, 30°C ambient
Value
> 250 000
Unit
H
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Digital pulse compression module
CI F06 Expander and Compressor
Interfaces description
7
Interfaces description
Line
Pin number
Name
Description
J1 to J4 : SMA – Jack
7.1
J1
Clock
7.2
J2
In_C
7.3
J3
Out_E
7.4
J4
Out_C
Reference clock input
AC, 50 Ω
Compressor RF chirp input
AC, 50 Ω
Expander RF chirp output
AC, 50 Ω
Compressor RF compressed pulse output
AC, 50 Ω
FL01 to FL04 : By-pass filter
7.5
FL01
Power supply return
Power supply return
7.6
FL02
Power supply
Power supply
7.7
FL03
Pi filter
Not used
7.8
FL04
Pi filter
Not used
7.9
7.10
P1 : MIL-C-24308 15-pin SubD Connector
P1 – 3 /
WFMSel_E +/P1 – 11
P1 – 4 /
WFMSel_C +/P1 – 12
7.11
P1 – 2 /
P1 – 10
Trigger +/-
7.12
P1 – 5 /
P1 – 13
Unit_OK +/-
7.13
P1 – 8
GND
Ground
OC Unit OK
Open Collector BITE Input-Output
TTL Level with 300 Ω internal pull-up, Logic 1 = Unit OK
Indicates the GO-NOGO state of the unit
May be tied to other OC Unit OK to generate a global
System OK when 2 or more CI F06 units are used
7.14
P1 – 15
Expander Waveform selection input
RS-422 compatible input, 120 Ω differential impedance
Compressor Waveform selection input
RS-422 compatible input, 120 Ω differential impedance
Trigger input
Time reference = First clock rising edge following Trigger
low to high transition.
RS-422 compatible input, 120 Ω differential impedance
BITE output
RS-422 level, Logic 1 = Unit OK
Indicates the GO-NOGO state of the unit
P3 : MOLEX type 87833-1420
7.15
P3
JTAG
JTAG interface for program download
Oct 16th, 2015
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