Fairchild MM74C150 16-line to 1-line multiplexer 3-state . 16-line to 1-line multiplexer Datasheet

Revised January 1999
MM74C150 • MM82C19
16-Line to 1-Line Multiplexer 3-STATE •
16-Line to 1-Line Multiplexer
General Description
The MM74C150 and MM82C19 multiplex 16 digital lines to
1 output. A 4-bit address code determines the particular 1of-16 inputs which is routed to the output. The data is
inverted from input to output.
A strobe override places the output of MM74C150 in the
logical “1” state and the output of MM82C19 in the highimpedance state.
All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
Features
■ Wide supply voltage range:
■ Guaranteed noise margin:
■ High noise immunity:
3.0V to 15V
1.0V
0.45 VCC (typ.)
■ TTL compatibility: Drive 1 TTL Load
Ordering Code:
Order Number
Package Number
Package Description
MM74C150N
N24A
24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
MM82C19N
N24A
24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Connection Diagram
Pin Assignments for DIP
© 1999 Fairchild Semiconductor Corporation
DS005891.prf
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MM74C150 • MM82C19 16-Line to 1-Line Multiplexer 3-STATE • 16-Line to 1-Line Multiplexer
October 1987
MM74C150 • MM82C19
Truth Table
MM74C150
Inputs
Output
D
C
B
A STROBE E0
E1
E2
E3
E4
E5
E6
E7
E8
E9 E10 E11 E12 E13 E14 E15
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1 (Note 1)
0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
0
0
0
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
0
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
0
0
0
1
0
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
1
0
0
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
1
0
0
1
0
0
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
1
1
0
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
1
0
0
1
1
0
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
0
0
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
1
0
1
0
0
0
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
1
0
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
1
0
1
0
1
0
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
0
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
1
0
1
1
0
0
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
0
0
1
1
1
0
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
1
0
1
1
1
0
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
0
1
0
0
0
0
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
1
1
0
0
0
0
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
0
1
0
0
1
0
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
1
1
0
0
1
0
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
0
1
0
1
0
0
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
1
1
0
1
0
0
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
0
1
0
1
1
0
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
1
1
0
1
1
0
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
0
1
1
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
1
1
1
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
0
1
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
1
1
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
0
1
1
1
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
1
1
1
1
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
0
1
1
1
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
1
1
1
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
0
Note 1: For MM72C19/MM82C19 this would be Hi-Z, everything else is the same.
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2
W
MM74C150 • MM82C19
Logic Diagrams
MM74C150
3
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MM74C150 • MM82C19
Logic Diagrams
(Continued)
MM82C19
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4
VCC
−0.3V to VCC+0.3V
Voltage at Any Pin
Operating Temperature Range
Storage Temperature Range
(soldering, 10 seconds)
−40°C to +85°C
−65°C to +150°C
700 mW
Small Outline
500 mW
Operating VCC Range
260°C
Note 2: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristic table provides conditions
for actual device operation.
Power Dissipation
Dual-In-Line
18V
Lead Temperature
3.0V to 15V
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS to CMOS
VIN(1)
VIN(0)
VOUT(1)
VOUT(0)
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
VCC = 5.0V
3.5
V
VCC = 10V
8.0
V
VCC = 5.0V
1.5
V
VCC = 10V
2.0
V
VCC = 5.0V, IO = −10 µA
4.5
V
VCC = 10V, IO = −10 µA
9.0
V
VCC = 5.0V, IO = +10 µA
0.5
VCC = 10V, IO = +10 µA
1.0
V
1.0
V
IIN(1)
Logical “1” Input Current
VCC = 15V, VIN = 15V
IIN(0)
Logical “0” Input Current
VCC = 15V, VIN = 0V
IOZ
Output Current in High
0.005
−1.0
−0.005
−1.0
−0.005
V
µA
Impedance State
MM82C19
VCC = 15V, VO = 15V
VCC = 15V, VO = 0V
ICC
Supply Current
0.005
VCC = 15V
0.05
1.0
µA
µA
300
µA
0.8
V
0.4
V
CMOS/LPTTL Interface
VIN(1)
Logical “1” Input Voltage
74C, 82C, VCC = 4.75V
VIN(0)
Logical “0” Input Voltage
74C, 82C, VCC = 4.75V
VOUT(1)
Logical “1” Output Voltage
74C, 82C, VCC = 4.75V, IO = −1.6 mA
VOUT(0)
Logical “0” Output Voltage
74C, 82C, VCC = 4.75V, IO = 1.6 mA
VCC−1.5
V
2.4
V
Output Drive (Short Circuit Current)
ISOURCE
Output Source Current
VCC = 5.0V, VOUT = 0V, TA = 25°C
−4.35
−8
mA
VCC = 10V, VOUT = 0V, TA = 25°C
−20
−40
mA
VCC = 5.0V, VOUT = VCC, TA = 25°C
4.35
8
mA
VCC = 10V, VOUT = VCC, TA = 25°C
20
40
mA
(P-Channel)
ISOURCE
Output Source Current
(P-Channel)
ISINK
Output Sink Current
(N-Channel)
ISINK
Output Sink Current
(N-Channel)
5
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MM74C150 • MM82C19
Absolute Maximum Ratings(Note 2)
MM74C150 • MM82C19
AC Electrical Characteristics
(Note 3)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
tpd0, tpd1
Typ
Max
Propagation Delay Time to a
Parameter
VCC = 5.0V
250
600
ns
Logical “0” or Logical “1”
VCC = 10V
110
300
ns
Min
Units
VCC = 5.0V, CL = 150 pF
290
650
ns
VCC = 10V, CL = 150 pF
120
330
ns
Propagation Delay Time to a
VCC = 5.0V
290
650
ns
Logical “0” or Logical “1”
VCC = 10V
120
330
ns
Propagation Delay Time to a
VCC = 5.0V
120
300
ns
Logical “0” or Logical “1”
VCC = 10V
55
150
ns
Delay from Strobe to High
VCC = 5.0V, RL = 10k, CL = 5 pF
80
200
ns
Impedance State
VCC = 10V, RL = 10k, CL = 5 pF
60
150
ns
Delay from Strobe to Logical
VCC = 5.0V, RL = 10k, CL = 5 pF
80
250
ns
“1” Level or to Logical “0”
VCC = 10V, RL = 10k, CL = 5 pF
30
120
ns
from Data Inputs to Output
tpd0, tpd1
Conditions
from Data Select Inputs to
Output
tpd0, tpd1
from Strobe to Output
MM74C150
t1H, t0H
MM82C19
tH1, tH0
Level (from High Impedance State)
MM82C19
CIN
Input Capacitance
Any Input (Note 4)
5.0
pF
COUT
Output Capacitance
(Note 4)
11.0
pF
(Note 5)
100
pF
MM82C19
CPD
Power Dissipation Capacitance
Note 3: AC Parameters are guaranteed by DC correlated testing.
Note 4: Capacitance is guaranteed by periodic testing.
Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, application note
AN-90.
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6
MM74C150 • MM82C19
Switching Time Waveforms
CMOS to CMOS
t1H and tH1
t1H
tH1
t0H and tH0
t0H
tH0
Note: Delays measured with input t r, tf ≤ 20 ns.
7
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MM74C150 • MM82C19 16-Line to 1-Line Multiplexer 3-STATE • 16-Line to 1-Line Multiplexer
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Package Number N24A
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.