MIC5821/5822 Micrel MIC5821/5822 8-Bit Serial-Input Latched Drivers General Description Features BiCMOS technology gives the MIC5821/5822 family flexibility beyond the reach of standard logic buffers and power driver arrays. These devices each have an eight-bit CMOS shift register, CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sink Darlington output drivers. The 500mA outputs are suitable for use with incandescent bulbs and other moderate to high current loads. The drivers can be operated with a split supply where the negative supply is down to –20V. Except for maximum driver output voltage ratings, the MIC5821 and MIC5822 are identical. • • • • • • Part Number Temperature Range These devices have greatly improved data-input rates. With a 5V logic supply they will typically operate faster than 5 MHz. With a 12V supply significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS logic levels. TTL and DTL circuits may require the use of appropriate pull-up resistors. By using the serial data output, the drivers can be cascaded for interface applications requiring additional drive lines. MIC5821BN –40°C to +85°C 16-Pin Plastic DIP MIC5822BN –40°C to +85°C 16-Pin Plastic DIP 3.3 MHz Minimum Data-Input Rate CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Down or Pull-Up Resistors Low-Power CMOS Logic and Latches High-Voltage Current-Sink Outputs Single or Split Supply Operation Ordering Information Package 7 Functional Diagram CLOCK 5 8-BIT SERIAL-PARALLEL SHIFT REGISTER 1 16 OUT1 SERIAL DATA IN 2 15 OUT2 14 OUT3 13 OUT4 12 OUT5 11 OUT6 10 OUT7 9 OUT8 2 4 VSS SERIAL DATA OUT 3 VDD STROBE LATCHES V SS 3 VDD 4 SERIAL DATA OUT 5 STROBE 6 OUTPUT ENABLE 7 VEE 8 6 7 OUTPUT ENABLE (ACTIVE LOW) LATCHES SERIAL DATA IN 1 SHIFT REGISTER CLK Pin Configuration MOS Bipolar Sub 8 16 OUT1 15 14 13 12 11 10 9 GND SUB VEE OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 (Plastic DIP) October 1998 7-37 MIC5821/5822 Micrel Typical Input Circuits Absolute Maximum Ratings (Note 1) at 25°C Free-Air Temperature and VSS = 0V (MIC5821) 50V (MIC5822) 80V Output Voltage, VCE SUS (MIC5821)(Note 3) 35V (MIC5822)(Note 3) 50V Logic Supply Voltage, VDD 15V Input Voltage Range, VIN –0.3V to VDD + 0.3V VDD – VEE 25V Emitter Supply Voltage, VEE –20V Continuous Output Current, IOUT 500mA Package Power Dissipation, PD(Note 1) 1.67W Operating Temperature Range, TA –55°C to +85°C Storage Temperature Range, TS –65°C to +150°C Output Voltage, VCE V DD STROBE OUTPUT ENABLE Note 1: Derate at the rate of 16.7mW/°C above TA = 25°C. Note 2: CMOS devices have input static protection but are susceptible to damage when exposed to extremely high static electrical charges. Note 3: For inductive load applications. V SS Typical Output Driver V DD OUT N CLOCK SERIAL DATA IN 7.2K V SS 3K VEE SUB Maximum Allowable Duty Cycle (Plastic DIP) Number of Outputs ON (IOUT = 200mA Maximum Allowable Duty Cycle at Ambient Temperature of VDD = 12V) 25°C 40°C 50°C 60°C 70°C 8 73% 62% 55% 47% 40% 7 83% 71% 62% 54% 46% 6 97% 82% 72% 63% 53% 5 100% 98% 87% 75% 63% 4 100% 100% 100% 93% 79% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 100% 100% 100% 7-38 October 1998 MIC5821/5822 Micrel Electrical Characteristics at TA = 25°C VDD = 5V, VEE = VSS = 0V (unless otherwise specified) Applicable Characteristic Output Leakage Current Devices Test Conditions ICEX MIC5821 MIC5822 Collector-Emitter VCE(SAT) Both Saturation Voltage Input Voltage Input Resistance Supply Current Limits Symbol VIN(0) Both VIN(1) Both RIN Both IDD(ON) Both Min. Max. Unit VOUT = 50V 50 µA VOUT = 50V, TA = +70°C 100 VOUT = 80V 50 VOUT = 80V, TA = +70°C 100 IOUT = 100mA 1.1 IOUT = 200mA 1.3 IOUT = 350mA, VDD = 7.0V 1.6 0.8 VDD = 12V 10.5 VDD = 10V 8.5 VDD = 5.0V 3.5 VDD = 12V 50 VDD = 10V 50 VDD = 5.0V 50 Electrical Characteristics Both V kΩ One Driver ON, VDD = 12V 4.5 One Driver ON, VDD = 10V 3.9 One Driver ON, VDD = 5.0V 2.4 All Drivers ON, VDD = 12V 16 All Drivers ON, VDD = 10V 14 All Drivers ON, VDD = 5.0V IDD(OFF) V mA 8 All Drivers OFF, VDD = 5.0V, All Inputs = 0V 1.6 All Drivers OFF, VDD = 12V, All Inputs= 0V 2.9 7 TA = –55°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Limits Characteristic Output Leakage Current Collector-Emitter Symbol ICEX VCE(SAT) Saturation Voltage Input Voltage Input Resistance Supply Current Test Conditions Min. Unit 50 µA IOUT = 100mA 1.3 V IOUT = 200mA 1.5 IOUT = 350mA, VDD = 7.0V 1.8 VIN0) 0.8 VIN(1) VDD = 12V 10.5 VDD = 5.0V 3.5 RIN VDD = 12V 35 VDD = 10V 35 VDD = 5.0V 35 IDD(ON) IDD(OFF) October 1998 Max. VOUT = 80V kΩ One Driver ON, VDD = 12V 5.5 One Driver ON, VDD = 10V 4.5 One Driver ON, VDD = 5.0V 3.0 All Drivers ON, VDD = 12V 16 All Drivers ON, VDD = 10V 14 All Drivers ON, VDD = 5.0V 10 All Drivers OFF, VDD = 12V 3.5 All Drivers OFF, VDD = 5.0V 2.0 7-39 V mA MIC5821/5822 Micrel Electrical Characteristics TA = +125°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Limits Characteristic Symbol Output Leakage Current Test Conditions ICEX Collector-Emitter VCE(SAT) Saturation Voltage Input Voltage Min. Max. Unit VOUT = 80V 500 µA IOUT = 100mA 1.3 V IOUT = 200mA 1.5 IOUT = 350mA, VDD = 7.0V 1.8 VIN(0) 0.8 VIN(1) Input Resistance RIN Supply Current IDD(ON) IDD(OFF) VDD = 12V 10.5 VDD = 5.0V 3.5 VDD = 12V 50 VDD = 10V 50 VDD = 5.0V 50 V kΩ One Driver ON, VDD = 12V 4.5 One Driver ON, VDD = 10V 3.9 One Driver ON, VDD = 5.0V 2.4 All Drivers ON, VDD = 12V 16 All Drivers ON, VDD = 10V 14 All Drivers ON, VDD = 5.0V 8 All Drivers OFF, VDD = 12V 2.9 All Drivers OFF, VDD = 5.0V 1.6 mA MIC5821/5822 Family Truth Table Serial Data Input Clock Input Shift Register Contents Serial I1 Data Strobe Output Input I2 I3 …… I8 H H R1 R2 …… R7 R7 L L R1 R2 …… R7 R7 X R1 R2 R3 …… R8 R8 L = Low Logic Level …… Latch Contents I1 I2 I3 …… Output Contents I8 Output Enable I1 I2 I3 P3 …… P8 H …… H X X X X X L R1 R2 R3 …… R8 P1 P2 P3 …… P8 P8 H P1 P2 P3 …… P8 L P1 P2 X X X H H H H = High Logic Level X = Irrelevant …… X …… I8 P = Present State R = Previous State Timing Diagram CLOCK A D B DATA IN E STROBE F C OUTPUT ENABLE G OUT N 7-40 October 1998 MIC5821/5822 Micrel Timing Conditions (TA = +25°C, Logic Levels are VDD and VSS) VDD = 5.0V A. B. C. D. E. F. G. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ....................................................................... 75 ns Minimum Data Active Time After Clock Pulse (Data Hold Time) ............................................................................. 75 ns Minimum Data Pulse Width .................................................................................................................................... 150 ns Minimum Clock Pulse Width ................................................................................................................................... 150 ns Minimum Time Between Clock Activation and Strobe ............................................................................................ 300 ns Minimum Strobe Pulse Width .................................................................................................................................. 100 ns Typical Time Between Strobe Activation and Output Transition ............................................................................. 500 ns SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the rising edge of the CLOCK input waveform. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the ENABLE input be high during serial entry. When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting the information stored in the latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches. Typical Applications MIC5822 Level Shifting Lamp Driver with Darlington Emitters Tied to a Negative Supply SERIAL DATA CLOCK 7 -9V 2 15 3 14 +5V 4 5 6 0.1µ LATCHES 16 SHIFT REGISTER 1 8 11 9 SUB October 1998 12 10 7 + 13 100µ 7-41